ITMI20042452A1 - Procedimenti di programmazione impostata e circuiti di pilotaggio di scrittura per una matyrice di memoria a cambiamento di fase - Google Patents

Procedimenti di programmazione impostata e circuiti di pilotaggio di scrittura per una matyrice di memoria a cambiamento di fase

Info

Publication number
ITMI20042452A1
ITMI20042452A1 IT002452A ITMI20042452A ITMI20042452A1 IT MI20042452 A1 ITMI20042452 A1 IT MI20042452A1 IT 002452 A IT002452 A IT 002452A IT MI20042452 A ITMI20042452 A IT MI20042452A IT MI20042452 A1 ITMI20042452 A1 IT MI20042452A1
Authority
IT
Italy
Prior art keywords
phase
memory
pilot circuits
programming procedures
writing
Prior art date
Application number
IT002452A
Other languages
English (en)
Inventor
Su-Jin Ahn
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI20042452A1 publication Critical patent/ITMI20042452A1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0092—Write characterized by the shape, e.g. form, length, amplitude of the write pulse
IT002452A 2003-12-30 2004-12-22 Procedimenti di programmazione impostata e circuiti di pilotaggio di scrittura per una matyrice di memoria a cambiamento di fase ITMI20042452A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020030100549A KR100564602B1 (ko) 2003-12-30 2003-12-30 상 변화 메모리 어레이의 셋 프로그래밍 방법 및 기입드라이버 회로

Publications (1)

Publication Number Publication Date
ITMI20042452A1 true ITMI20042452A1 (it) 2005-03-22

Family

ID=34698777

Family Applications (1)

Application Number Title Priority Date Filing Date
IT002452A ITMI20042452A1 (it) 2003-12-30 2004-12-22 Procedimenti di programmazione impostata e circuiti di pilotaggio di scrittura per una matyrice di memoria a cambiamento di fase

Country Status (6)

Country Link
US (2) US7149103B2 (it)
JP (1) JP4847008B2 (it)
KR (1) KR100564602B1 (it)
CN (1) CN1637948B (it)
DE (1) DE102004063767B4 (it)
IT (1) ITMI20042452A1 (it)

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Also Published As

Publication number Publication date
KR20050070700A (ko) 2005-07-07
JP2005196954A (ja) 2005-07-21
DE102004063767B4 (de) 2013-02-07
CN1637948A (zh) 2005-07-13
JP4847008B2 (ja) 2011-12-28
US20050141261A1 (en) 2005-06-30
US20070041245A1 (en) 2007-02-22
US7480167B2 (en) 2009-01-20
KR100564602B1 (ko) 2006-03-29
US7149103B2 (en) 2006-12-12
DE102004063767A1 (de) 2005-08-04
CN1637948B (zh) 2011-02-23

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