FR2389236A1 - Transistors bipolaires et procede de fabrication - Google Patents
Transistors bipolaires et procede de fabricationInfo
- Publication number
- FR2389236A1 FR2389236A1 FR7812083A FR7812083A FR2389236A1 FR 2389236 A1 FR2389236 A1 FR 2389236A1 FR 7812083 A FR7812083 A FR 7812083A FR 7812083 A FR7812083 A FR 7812083A FR 2389236 A1 FR2389236 A1 FR 2389236A1
- Authority
- FR
- France
- Prior art keywords
- base
- region
- manufacturing process
- bipolar transistors
- emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 229920005591 polysilicon Polymers 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/3115—Doping the insulating layers
- H01L21/31155—Doping the insulating layers by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3215—Doping the layers
- H01L21/32155—Doping polycristalline - or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Bipolar Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
L'invention concerne un transistor bipolaire. Selon l'invention, autour de la limite de la surface d'une région de base 21 formée sur un substrat semi-conducteur 10, est formée une base 24 ayant une largeur constante inférieure à 1 mu et faite en silicium polycristallin; une région d'émetteur 22 configurée en îlot est formée dans la région de base et un émetteur est formé à la surface de la région d'émetteur; l'électrode 23 est électriquement isolée de la base 24 par une pellicule isolante 20 qui s'étend entre le pourtour de la région d'émetteur et la base. L'invention s'applique notamment aux transistors du type planar.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4673777A JPS53132275A (en) | 1977-04-25 | 1977-04-25 | Semiconductor device and its production |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2389236A1 true FR2389236A1 (fr) | 1978-11-24 |
FR2389236B1 FR2389236B1 (fr) | 1982-04-16 |
Family
ID=12755633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7812083A Granted FR2389236A1 (fr) | 1977-04-25 | 1978-04-24 | Transistors bipolaires et procede de fabrication |
Country Status (8)
Country | Link |
---|---|
US (2) | US4531282A (fr) |
JP (1) | JPS53132275A (fr) |
CA (1) | CA1093703A (fr) |
DE (1) | DE2818090A1 (fr) |
FR (1) | FR2389236A1 (fr) |
GB (1) | GB1573496A (fr) |
IT (1) | IT1095322B (fr) |
NL (1) | NL189220C (fr) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2463507A1 (fr) * | 1979-08-10 | 1981-02-20 | Rca Corp | Procede de fabrication d'une couche de silicium polycristallin a basse resistivite |
EP0029887A1 (fr) * | 1979-12-03 | 1981-06-10 | International Business Machines Corporation | Procédé de fabrication d'un transistor PNP bipolaire vertical et transistor ainsi obtenu |
FR2501912A1 (fr) * | 1981-03-13 | 1982-09-17 | Efcis | Transistor bipolaire lateral sur isolant et son procede de fabrication |
FR2508704A1 (fr) * | 1981-06-26 | 1982-12-31 | Thomson Csf | Procede de fabrication de transistors bipolaires integres de tres petites dimensions |
EP0076106A2 (fr) * | 1981-09-28 | 1983-04-06 | Fujitsu Limited | Procédé de fabrication d'un transistor bipolaire |
EP0216380A2 (fr) * | 1985-09-26 | 1987-04-01 | Kabushiki Kaisha Toshiba | Dispositif semi-conducteur ayant une électrode à structure de plaque de champ |
Families Citing this family (79)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53132275A (en) * | 1977-04-25 | 1978-11-17 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its production |
US4157269A (en) * | 1978-06-06 | 1979-06-05 | International Business Machines Corporation | Utilizing polysilicon diffusion sources and special masking techniques |
CA1129118A (fr) * | 1978-07-19 | 1982-08-03 | Tetsushi Sakai | Dispositifs a semi-conducteurs et methode de fabrication |
US4209349A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching |
US4209350A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming diffusions having narrow dimensions utilizing reactive ion etching |
CA1131367A (fr) * | 1978-11-13 | 1982-09-07 | Keming W. Yeh | Mesfet auto-aligne a resistance serie reduite |
DE3051130C2 (de) * | 1979-06-18 | 1997-07-31 | Hitachi Ltd | Verfahren zur Herstellung eines Bipolartransistors |
JPS561556A (en) | 1979-06-18 | 1981-01-09 | Hitachi Ltd | Semiconductor device |
JPS5676562A (en) * | 1979-11-29 | 1981-06-24 | Toshiba Corp | Manufacture of semiconductor integrated circuit |
JPS5676563A (en) * | 1979-11-29 | 1981-06-24 | Toshiba Corp | Manufacture of semiconductor integrated circuit |
JPS5688352A (en) * | 1979-12-21 | 1981-07-17 | Toshiba Corp | Manufacture of semiconductor integrated circuit |
JPS5676561A (en) * | 1979-11-29 | 1981-06-24 | Toshiba Corp | Manufacture of semiconductor integrated circuit |
US4319932A (en) * | 1980-03-24 | 1982-03-16 | International Business Machines Corporation | Method of making high performance bipolar transistor with polysilicon base contacts |
JPS56135964A (en) * | 1980-03-28 | 1981-10-23 | Nec Corp | Semiconductor device |
JPS56148825A (en) * | 1980-04-21 | 1981-11-18 | Nec Corp | Manufacture of semiconductor device |
JPS57206071A (en) * | 1981-06-12 | 1982-12-17 | Fujitsu Ltd | Semiconductor device and manufacture thereof |
JPS5852817A (ja) * | 1981-09-25 | 1983-03-29 | Hitachi Ltd | 半導体装置及びその製造方法 |
US4665424A (en) * | 1984-03-30 | 1987-05-12 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
US4640721A (en) * | 1984-06-06 | 1987-02-03 | Hitachi, Ltd. | Method of forming bipolar transistors with graft base regions |
JPS6146063A (ja) * | 1984-08-10 | 1986-03-06 | Hitachi Ltd | 半導体装置の製造方法 |
JPH0611053B2 (ja) * | 1984-12-20 | 1994-02-09 | 三菱電機株式会社 | 半導体装置の製造方法 |
GB2172744B (en) * | 1985-03-23 | 1989-07-19 | Stc Plc | Semiconductor devices |
US5049964A (en) * | 1985-05-07 | 1991-09-17 | Nippon Telegraph & Telephone Corp. | Bipolar transistor and method of manufacturing the same |
JPH0658912B2 (ja) * | 1985-05-07 | 1994-08-03 | 日本電信電話株式会社 | バイポーラトランジスタの製造方法 |
JPS6246545A (ja) * | 1985-08-23 | 1987-02-28 | Nec Corp | 半導体装置の製造方法 |
EP0216945B1 (fr) * | 1985-09-21 | 1989-07-05 | Deutsche ITT Industries GmbH | Procédé pour appliquer un contact sur une plage de contact d'un substrat semi-conducteur |
US4843033A (en) * | 1985-09-27 | 1989-06-27 | Texas Instruments Incorporated | Method for outdiffusion of zinc into III-V substrates using zinc tungsten silicide as dopant source |
DE3680520D1 (de) * | 1986-03-22 | 1991-08-29 | Itt Ind Gmbh Deutsche | Verfahren zum herstellen einer monolithisch integrierten schaltung mit mindestens einem bipolaren planartransistor. |
JPH0628266B2 (ja) * | 1986-07-09 | 1994-04-13 | 株式会社日立製作所 | 半導体装置の製造方法 |
US4722908A (en) * | 1986-08-28 | 1988-02-02 | Fairchild Semiconductor Corporation | Fabrication of a bipolar transistor with a polysilicon ribbon |
JPS6362272A (ja) * | 1986-09-02 | 1988-03-18 | Seiko Instr & Electronics Ltd | 半導体装置の製造方法 |
US4883772A (en) * | 1986-09-11 | 1989-11-28 | National Semiconductor Corporation | Process for making a self-aligned silicide shunt |
US4700461A (en) * | 1986-09-29 | 1987-10-20 | Massachusetts Institute Of Technology | Process for making junction field-effect transistors |
JPS63193562A (ja) * | 1987-02-06 | 1988-08-10 | Toshiba Corp | バイポ−ラトランジスタの製造方法 |
US4734382A (en) * | 1987-02-20 | 1988-03-29 | Fairchild Semiconductor Corporation | BiCMOS process having narrow bipolar emitter and implanted aluminum isolation |
US4916083A (en) * | 1987-05-11 | 1990-04-10 | International Business Machines Corporation | High performance sidewall emitter transistor |
US4847670A (en) * | 1987-05-11 | 1989-07-11 | International Business Machines Corporation | High performance sidewall emitter transistor |
US5051805A (en) * | 1987-07-15 | 1991-09-24 | Rockwell International Corporation | Sub-micron bipolar devices with sub-micron contacts |
US4839303A (en) * | 1987-10-13 | 1989-06-13 | Northrop Corporation | Planar bipolar transistors including heterojunction transistors and method |
GB2218565B (en) * | 1988-05-10 | 1992-04-01 | Stc Plc | Varicap diode structure |
US5244822A (en) * | 1988-05-16 | 1993-09-14 | Kabushiki Kaisha Toshiba | Method of fabricating bipolar transistor using self-aligned polysilicon technology |
US5096842A (en) * | 1988-05-16 | 1992-03-17 | Kabushiki Kaisha Toshiba | Method of fabricating bipolar transistor using self-aligned polysilicon technology |
US5468989A (en) * | 1988-06-02 | 1995-11-21 | Hitachi, Ltd. | Semiconductor integrated circuit device having an improved vertical bipolar transistor structure |
JPH027529A (ja) * | 1988-06-27 | 1990-01-11 | Nec Corp | バイポーラトランジスタ及びその製造方法 |
US5204276A (en) * | 1988-12-06 | 1993-04-20 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
US5109263A (en) * | 1989-07-28 | 1992-04-28 | Hitachi, Ltd. | Semiconductor device with optimal distance between emitter and trench isolation |
US4980304A (en) * | 1990-02-20 | 1990-12-25 | At&T Bell Laboratories | Process for fabricating a bipolar transistor with a self-aligned contact |
US4997775A (en) * | 1990-02-26 | 1991-03-05 | Cook Robert K | Method for forming a complementary bipolar transistor structure including a self-aligned vertical PNP transistor |
EP0464567B1 (fr) * | 1990-06-25 | 1997-08-06 | Matsushita Electronics Corporation | Elément à cathode froide. |
US5126285A (en) * | 1990-07-02 | 1992-06-30 | Motorola, Inc. | Method for forming a buried contact |
US5290396A (en) * | 1991-06-06 | 1994-03-01 | Lsi Logic Corporation | Trench planarization techniques |
US5413966A (en) * | 1990-12-20 | 1995-05-09 | Lsi Logic Corporation | Shallow trench etch |
JP2625602B2 (ja) * | 1991-01-18 | 1997-07-02 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 集積回路デバイスの製造プロセス |
US5252503A (en) * | 1991-06-06 | 1993-10-12 | Lsi Logic Corporation | Techniques for forming isolation structures |
US5248625A (en) * | 1991-06-06 | 1993-09-28 | Lsi Logic Corporation | Techniques for forming isolation structures |
US5225358A (en) * | 1991-06-06 | 1993-07-06 | Lsi Logic Corporation | Method of forming late isolation with polishing |
JP3061891B2 (ja) * | 1991-06-21 | 2000-07-10 | キヤノン株式会社 | 半導体装置の製造方法 |
JPH04373133A (ja) * | 1991-06-24 | 1992-12-25 | Hitachi Ltd | 半導体装置 |
JPH07501181A (ja) * | 1991-10-23 | 1995-02-02 | マイクロユニティ システムズ エンジニアリング,インコーポレイテッド | ベータ特性とパンチスルー特性を改良したバイポーラジャンクショントランジスタ |
US5286996A (en) * | 1991-12-31 | 1994-02-15 | Purdue Research Foundation | Triple self-aligned bipolar junction transistor |
DE4308958A1 (de) * | 1993-03-21 | 1994-09-22 | Prema Paezisionselektronik Gmb | Verfahren zur Herstellung von Bipolartransistoren |
US5420051A (en) * | 1993-12-28 | 1995-05-30 | Intel Corporation | Pre-poly emitter implant |
US5932922A (en) * | 1994-08-08 | 1999-08-03 | Semicoa Semiconductors | Uniform current density and high current gain bipolar transistor |
US5545574A (en) * | 1995-05-19 | 1996-08-13 | Motorola, Inc. | Process for forming a semiconductor device having a metal-semiconductor compound |
US5705846A (en) * | 1995-07-31 | 1998-01-06 | National Semiconductor Corporation | CMOS-compatible active pixel image array using vertical pnp cell |
KR100191270B1 (ko) * | 1995-09-29 | 1999-06-15 | 윤종용 | 바이폴라 반도체장치 및 그의 제조방법 |
KR100190029B1 (ko) * | 1996-03-19 | 1999-06-01 | 윤종용 | 바이씨모스 에스램 소자의 제조방법 |
JP3688816B2 (ja) * | 1996-07-16 | 2005-08-31 | 株式会社東芝 | 半導体装置の製造方法 |
KR100248504B1 (ko) * | 1997-04-01 | 2000-03-15 | 윤종용 | 바이폴라 트랜지스터 및 그의 제조 방법 |
US6136674A (en) * | 1999-02-08 | 2000-10-24 | Advanced Micro Devices, Inc. | Mosfet with gate plug using differential oxide growth |
US7494887B1 (en) * | 2004-08-17 | 2009-02-24 | Hrl Laboratories, Llc | Method and apparatus for fabricating heterojunction bipolar transistors with simultaneous low base resistance and short base transit time |
US7625776B2 (en) * | 2006-06-02 | 2009-12-01 | Micron Technology, Inc. | Methods of fabricating intermediate semiconductor structures by selectively etching pockets of implanted silicon |
US7709341B2 (en) * | 2006-06-02 | 2010-05-04 | Micron Technology, Inc. | Methods of shaping vertical single crystal silicon walls and resulting structures |
US7628932B2 (en) | 2006-06-02 | 2009-12-08 | Micron Technology, Inc. | Wet etch suitable for creating square cuts in si |
JP2008135504A (ja) * | 2006-11-28 | 2008-06-12 | Elpida Memory Inc | 半導体装置の製造方法 |
FR3100381B1 (fr) * | 2019-08-29 | 2021-08-20 | Commissariat Energie Atomique | Procédé de fabrication d’une cellule photovoltaïque |
US11355585B2 (en) | 2019-10-01 | 2022-06-07 | Analog Devices International Unlimited Company | Bipolar junction transistor, and a method of forming a charge control structure for a bipolar junction transistor |
US11404540B2 (en) | 2019-10-01 | 2022-08-02 | Analog Devices International Unlimited Company | Bipolar junction transistor, and a method of forming a collector for a bipolar junction transistor |
US11563084B2 (en) | 2019-10-01 | 2023-01-24 | Analog Devices International Unlimited Company | Bipolar junction transistor, and a method of forming an emitter for a bipolar junction transistor |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3843425A (en) * | 1971-04-05 | 1974-10-22 | Rca Corp | Overlay transistor employing highly conductive semiconductor grid and method for making |
US3847687A (en) * | 1972-11-15 | 1974-11-12 | Motorola Inc | Methods of forming self aligned transistor structure having polycrystalline contacts |
GB1384206A (en) * | 1972-06-07 | 1975-02-19 | Suwa Seikosha Kk | Method of forming a resistance layer in a semiconductor integrated circuit device |
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JPS53132275A (en) * | 1977-04-25 | 1978-11-17 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its production |
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US4417385A (en) * | 1982-08-09 | 1983-11-29 | General Electric Company | Processes for manufacturing insulated-gate semiconductor devices with integral shorts |
-
1977
- 1977-04-25 JP JP4673777A patent/JPS53132275A/ja active Granted
-
1978
- 1978-04-21 CA CA301,731A patent/CA1093703A/fr not_active Expired
- 1978-04-24 FR FR7812083A patent/FR2389236A1/fr active Granted
- 1978-04-25 GB GB16189/78A patent/GB1573496A/en not_active Expired
- 1978-04-25 NL NLAANVRAGE7804432,A patent/NL189220C/xx not_active IP Right Cessation
- 1978-04-25 DE DE19782818090 patent/DE2818090A1/de active Granted
- 1978-04-26 IT IT22688/78A patent/IT1095322B/it active
-
1984
- 1984-01-17 US US06/571,453 patent/US4531282A/en not_active Expired - Lifetime
-
1985
- 1985-03-14 US US06/710,950 patent/US4920401A/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3843425A (en) * | 1971-04-05 | 1974-10-22 | Rca Corp | Overlay transistor employing highly conductive semiconductor grid and method for making |
GB1384206A (en) * | 1972-06-07 | 1975-02-19 | Suwa Seikosha Kk | Method of forming a resistance layer in a semiconductor integrated circuit device |
US3847687A (en) * | 1972-11-15 | 1974-11-12 | Motorola Inc | Methods of forming self aligned transistor structure having polycrystalline contacts |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2463507A1 (fr) * | 1979-08-10 | 1981-02-20 | Rca Corp | Procede de fabrication d'une couche de silicium polycristallin a basse resistivite |
EP0029887A1 (fr) * | 1979-12-03 | 1981-06-10 | International Business Machines Corporation | Procédé de fabrication d'un transistor PNP bipolaire vertical et transistor ainsi obtenu |
FR2501912A1 (fr) * | 1981-03-13 | 1982-09-17 | Efcis | Transistor bipolaire lateral sur isolant et son procede de fabrication |
EP0060761A1 (fr) * | 1981-03-13 | 1982-09-22 | Societe Pour L'etude Et La Fabrication De Circuits Integres Speciaux - E.F.C.I.S. | Transistor bipolaire latéral sur isolant et son procédé de fabrication |
FR2508704A1 (fr) * | 1981-06-26 | 1982-12-31 | Thomson Csf | Procede de fabrication de transistors bipolaires integres de tres petites dimensions |
EP0071494A1 (fr) * | 1981-06-26 | 1983-02-09 | Thomson-Csf | Procédé de fabrication de transistors bipolaires intégrés de très petites dimensions |
US4481706A (en) * | 1981-06-26 | 1984-11-13 | Thomson-Csf | Process for manufacturing integrated bi-polar transistors of very small dimensions |
EP0076106A2 (fr) * | 1981-09-28 | 1983-04-06 | Fujitsu Limited | Procédé de fabrication d'un transistor bipolaire |
EP0076106A3 (en) * | 1981-09-28 | 1985-01-23 | Fujitsu Limited | Method for producing a bipolar transistor |
EP0216380A2 (fr) * | 1985-09-26 | 1987-04-01 | Kabushiki Kaisha Toshiba | Dispositif semi-conducteur ayant une électrode à structure de plaque de champ |
EP0216380A3 (en) * | 1985-09-26 | 1987-12-09 | Kabushiki Kaisha Toshiba | Semiconductor device with a field plate electrode structure |
Also Published As
Publication number | Publication date |
---|---|
IT7822688A0 (it) | 1978-04-26 |
CA1093703A (fr) | 1981-01-13 |
NL189220B (nl) | 1992-09-01 |
JPS5527469B2 (fr) | 1980-07-21 |
DE2818090C2 (fr) | 1989-02-23 |
US4531282A (en) | 1985-07-30 |
IT1095322B (it) | 1985-08-10 |
GB1573496A (en) | 1980-08-28 |
FR2389236B1 (fr) | 1982-04-16 |
NL7804432A (nl) | 1978-10-27 |
DE2818090A1 (de) | 1978-11-02 |
US4920401A (en) | 1990-04-24 |
NL189220C (nl) | 1993-02-01 |
JPS53132275A (en) | 1978-11-17 |
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