JPS57206071A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPS57206071A JPS57206071A JP9132281A JP9132281A JPS57206071A JP S57206071 A JPS57206071 A JP S57206071A JP 9132281 A JP9132281 A JP 9132281A JP 9132281 A JP9132281 A JP 9132281A JP S57206071 A JPS57206071 A JP S57206071A
- Authority
- JP
- Japan
- Prior art keywords
- film
- layer
- substrate
- window
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 239000000758 substrate Substances 0.000 abstract 5
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 2
- 239000007943 implant Substances 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 230000001590 oxidative effect Effects 0.000 abstract 1
- 230000001681 protective effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To augment the reliability of the base electroce wiring comprising the multicrystal Si layers by a method wherein Si3N4 is substituted for the protective mask comprising SiO2 film. CONSTITUTION:The field film 2 is selectively formed on the N type semiconductor substrate or semiconductor layer 1 to divide the element forming region. Firstly the multicrystal Si layer 3 is laminated on the substrate or layer 1 and the film 2 and then Si3N4 film 10 is further laminated on the film 3. Secondly the window for forming the internal base and emitter is opened through the film 10 and the layer 3. Thirdly the SiO2 film 12 is formed on the sides of the polycrystal Si layer 3 exposed to the inside of the window 11 by means of the high temperature heattreatment in the oxidizing atmosphere and likewise the SiO2 film 12' is formed on the surface of the exposed substrate or layer 1. At this time, B is simultaneously diffused from the layer 3 to the substrate or layer 1 by means of the high temperature treatment to form the ring like external base region 13. Fourthly only the film 12' on the substrate in the window 11 is removed by etching process to implant B ion into the window 11 forming the P type internal base region 14 and then to implant P ion forming the N<+> type emitter region 15.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9132281A JPS57206071A (en) | 1981-06-12 | 1981-06-12 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9132281A JPS57206071A (en) | 1981-06-12 | 1981-06-12 | Semiconductor device and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57206071A true JPS57206071A (en) | 1982-12-17 |
| JPH0235458B2 JPH0235458B2 (en) | 1990-08-10 |
Family
ID=14023214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9132281A Granted JPS57206071A (en) | 1981-06-12 | 1981-06-12 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57206071A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61183964A (en) * | 1985-02-08 | 1986-08-16 | Matsushita Electronics Corp | Manufacture of semiconductor device |
| JPS6233457A (en) * | 1985-08-06 | 1987-02-13 | Nec Corp | Semiconductor integrated circuit device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53132275A (en) * | 1977-04-25 | 1978-11-17 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its production |
| JPS551183A (en) * | 1978-06-06 | 1980-01-07 | Ibm | Method of forming bipolar structure |
-
1981
- 1981-06-12 JP JP9132281A patent/JPS57206071A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53132275A (en) * | 1977-04-25 | 1978-11-17 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its production |
| JPS551183A (en) * | 1978-06-06 | 1980-01-07 | Ibm | Method of forming bipolar structure |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61183964A (en) * | 1985-02-08 | 1986-08-16 | Matsushita Electronics Corp | Manufacture of semiconductor device |
| JPS6233457A (en) * | 1985-08-06 | 1987-02-13 | Nec Corp | Semiconductor integrated circuit device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0235458B2 (en) | 1990-08-10 |
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