EP2067174A2 - Procede de realisation de cellule photovoltaique a heterojonction en face arriere - Google Patents
Procede de realisation de cellule photovoltaique a heterojonction en face arriereInfo
- Publication number
- EP2067174A2 EP2067174A2 EP07803574A EP07803574A EP2067174A2 EP 2067174 A2 EP2067174 A2 EP 2067174A2 EP 07803574 A EP07803574 A EP 07803574A EP 07803574 A EP07803574 A EP 07803574A EP 2067174 A2 EP2067174 A2 EP 2067174A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- sacrificial
- mask
- layer
- sacrificial mask
- amorphous semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
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- 239000004065 semiconductor Substances 0.000 claims abstract description 40
- 238000002161 passivation Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 238000007650 screen-printing Methods 0.000 claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 claims abstract description 11
- 238000000151 deposition Methods 0.000 claims description 64
- 238000005530 etching Methods 0.000 claims description 55
- 238000001465 metallisation Methods 0.000 claims description 23
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 10
- 229920000642 polymer Polymers 0.000 claims description 8
- 238000004544 sputter deposition Methods 0.000 claims description 6
- 230000008020 evaporation Effects 0.000 claims description 5
- 238000001704 evaporation Methods 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 claims description 4
- 238000004049 embossing Methods 0.000 claims description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 24
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 9
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 8
- 239000002253 acid Substances 0.000 description 4
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- 238000006243 chemical reaction Methods 0.000 description 2
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- 239000000075 oxide glass Substances 0.000 description 2
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- 238000005215 recombination Methods 0.000 description 2
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- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
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- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the invention relates to the production of photovoltaic cells, particularly contact and heterojunction cells of the amorphous / crystalline type on the rear face.
- Two types of photovoltaic structure currently make it possible to obtain conversion efficiencies greater than 21% in laboratory tests and close to 20% in industrial production.
- the first structure commonly called
- HIT Heterojunction with Intrinsic Thin Layers
- a heterojunction formed by the deposition of thin layers of amorphous silicon on a crystalline silicon base.
- This structure made entirely at low temperature, that is to say at temperatures of less than or equal to about 200 ° C., makes it possible to obtain good surface passivations and to reach high values of voltages in an open circuit compared to conventional photovoltaic cell production methods whose temperatures reached during their implementation is approximately 850 ° C. US 5,213,628 describes such a structure.
- the second structure comprises a junction and a set of contacts on an opposite face, called the rear face, to the front face of the photovoltaic cell, that is to say the face intended to receive light radiation.
- This structure is commonly referred to as RCC (Rear Contact Cells) or IBC
- WO 03/083955 and FR 2 880 989 describe this type of structure.
- An object of the present invention is to provide a process for producing a photovoltaic cell with heterojunction on the back which is industrially viable and improving the performance of cells manufactured.
- the present invention proposes a method for producing a photovoltaic cell, comprising at least the steps of: a) depositing a passivation layer based on at least one intrinsic amorphous semiconductor on a rear face of a substrate based on at least one crystalline semiconductor, b) screen-printing on the passivation layer of a first sacrificial mask having at least one through opening, c) depositing a doped amorphous semiconductor layer of a first conductivity type at least in the opening, d) removing the first sacrificial mask, leaving, at the opening of the first sacrificial mask, the minus a doped amorphous semiconductor pad of the first conductivity type.
- Step b) of producing the first etching mask may be implemented at a temperature less than or equal to approximately 250 ° C., or less than or equal to approximately 200 ° C.
- the techniques employed in this method allow the photovoltaic cell to be exposed only at temperatures substantially lower than or equal to approximately 250 ° C. or 200 ° C. during the production of the rear face of the cell, which would not be possible. possible with, for example, a passivation layer on the rear face based on silicon nitride.
- the use of intrinsic amorphous semiconductor on the rear face of the substrate makes it possible to obtain excellent passivation of the rear face of this substrate.
- a standard sacrificial layer deposition method for example based on semiconductor oxide, which is generally carried out at high temperature, for example 1000 ° C.
- the production of a screen-printing etching mask at a temperature less than 250 0 C or 200 0 C makes it possible not to deteriorate the passivation layer on which is deposited the etching mask and improve the performance of the cell thus produced.
- the present invention also relates to a method for producing a photovoltaic cell, comprising at least the steps of: a) depositing a passivation layer based on at least one intrinsic amorphous semiconductor on a rear face of a substrate to base of at least one crystalline semiconductor, b) screen-printing on the passivation layer of a first sacrificial mask, c) deposition, in at least one pattern formed by the first etching mask, of a layer of amorphous semiconductor doped with a first type of conductivity, d) removing the first sacrificial mask.
- the method, object of the present invention may further comprise, after step d) at least the steps of: e) screen-printing a second sacrificial mask, the second sacrificial mask covering at least the doped amorphous semiconductor of the first type of conductivity, f) depositing, in at least one pattern formed by the second sacrificial mask, a doped amorphous semiconductor layer of a second conductivity type, opposite to the first conductivity type, g) deleting the second sacrificial mask, leaving the pattern of the second sacrificial mask, at least one doped amorphous semiconductor pad of the second conductivity type.
- the areas of doped amorphous silicon on the back face form the heterojunction of the photovoltaic cell.
- the realization of the heterojunction is made with a high precision (+/- 20 ⁇ m) compared to conventional techniques of PECVD or catalytic CVD deposition through metal masks, the precisions achieved being of the order of about +/- 500 microns with these techniques.
- the properties of the plasma may be modified according to the number of deposits established on the masks to form the heterojunction.
- sacrificial masks makes it possible to have an industrially viable process, unlike the methods of the prior art using layers of the photovoltaic cell also serving as etching masks, these layers being able to be damaged during the etching steps.
- this method makes it possible to obtain photovoltaic cells with a high conversion efficiency, for example greater than 22%.
- the method may comprise, before step a) of deposition of the passivation layer, a step of depositing a layer based on at least one amorphous semiconductor on a front face of the substrate, opposite to the rear face of the substrate.
- the amorphous semiconductor of the layer deposited on the side of the front face of the substrate may be intrinsic or doped of the same or opposite type of conductivity as the conductivity type of the substrate. It is thus possible to make a surface field on the front face, reducing the recombinations at this face, when the doping type is opposite to that of the substrate, or a floating junction when the doping is similar to that of the substrate.
- the method may include, after the step of depositing the amorphous semiconductor-based layer on the front face of the substrate, a step of depositing an antireflection layer on said amorphous semiconductor layer.
- Step b) of making the first sacrificial mask may comprise the steps of:
- first sacrificial layer based on silicon oxide, and / or silicon carbide and / or silicon nitride on the passivation layer
- the step b) of producing the first sacrificial mask may comprise the steps of:
- first sacrificial layer based on silicon oxide, and / or silicon carbide and / or silicon nitride on the passivation layer
- step b) of producing the first sacrificial mask may comprise a screen-printing deposit of a polymer-based paste and / or oxide forming the first sacrificial mask.
- the step e) of producing the second sacrificial mask can comprise the steps of:
- the step e) of producing the second sacrificial mask may comprise the steps of:
- the step e) of producing the second sacrificial mask may comprise a screen-printing deposit of a polymer-based paste and / or oxide forming the second sacrificial mask.
- the method may comprise, before step d) of removing the first sacrificial mask, a metallization deposition step.
- the method may comprise, before step g) of removing the second sacrificial mask, a metallization deposition step.
- the method may comprise, after step g) of removing the second sacrificial mask, a metallization deposition step on the doped amorphous semiconductor of the first conductivity type and on the doped amorphous semiconductor of second type of conductivity by evaporation and / or sputtering through a metal mask.
- the metallizations are carried out by evaporation or sputtering through a metal mask, the deposition precisions are greater than the accuracies obtained by a plasma assisted deposition.
- the metallizations can cover a maximum surface area on the doped amorphous semiconductor, thus optimizing the optical confinement of the incoming light rays in the photovoltaic cell.
- the use of evaporation and sputtering techniques makes it possible to obtain low contact resistance metallizations between these and the doped amorphous semiconductor.
- the method may further comprise, before the metallization deposition step or steps, a conductive transparent oxide sputtering deposition step on the doped amorphous semiconductor, the metallizations being then deposited on the transparent conductive oxide.
- FIGS. 1A to 1R represent the steps of a method for producing photovoltaic cell, object of the present invention, according to a first embodiment
- FIGS. 2A to 21 represent the steps of a method of making a cell photovoltaic, object of the present invention, according to a second embodiment.
- FIGS. 1A to 1R represent the steps of a method for producing a photovoltaic cell 100 according to a first embodiment.
- a substrate 2 based on at least one semiconductor Figure IA
- This substrate 2 has a textured front face 4 and a polished back face 6.
- the substrate 2 may be based on monocrystalline silicon or multicrystalline, P or N type.
- a first layer 8 for example a thin layer with a thickness between about 1 nm and 5 nm, of hydrogenated amorphous silicon, doped or intrinsic, is deposited on the front face 4 of the substrate 2.
- layer 8 can also be based on hydrogenated amorphous silicon carbide, doped or intrinsic.
- the first layer 8 has a large bandgap (greater than 1.8 eV or 2 eV) to limit the absorption of the solar spectrum.
- This first layer 8 is deposited by PECVD (chemical vapor deposition assisted by plasma) at a temperature for example between about 200 0 C and 400 0 C, this temperature being adapted depending on the nature of the first layer 8.
- the first layer 8 is doped with the conductivity type opposite to the conductivity type of the substrate 2, during operation of the photovoltaic cell 100, a front surface field is formed at the front face 4 and the first layer 8, allowing the reduction of recombinations at this interface. It is also possible to form a floating junction if the first doped layer 8 is of the same type of conductivity as the substrate 2.
- This layer 10 may, for example have a thickness between about 60 nm and 80 nm.
- a passivation layer 12 based on hydrogenated intrinsic amorphous silicon a-Si: H is deposited by PECVD on the rear face 6 of the substrate 2 (FIG. The thickness of this passivation layer 12 may for example be between about 1 nm and 50 nm.
- a first sacrificial layer 14 is then deposited on the passivation layer 12, as shown in FIG.
- This first sacrificial layer 14 is deposited by PECVD at a temperature of less than or equal to about 200 ° C. or 250 ° C. in order not to recrystallize the amorphous silicon previously deposited from the layers 8 and 12, and thus to minimize the degradations of the layers 8 and 12 of amorphous silicon.
- a heating support for receiving the substrate is first heated at low temperature (less than or equal to about 250 0 C or 200 0 C).
- the deposition chamber used is then purged via a neutral gas, for example helium, in order to eliminate the air and more generally the oxygen present in the deposition chamber capable of oxidizing the substrate.
- the substrate is then deposited on the previously heated support.
- the plasma is then ignited from the SiH 4 gas alone or a mixture of SiH 4 and N 2 O, at a high pressure (for example greater than about 333 Pa).
- N 2 O is then injected into the deposition chamber, thus forming the sacrificial layer 14.
- This first sacrificial layer 14 may be based on silicon oxide, and / or silicon carbide, and / or silicon nitride .
- the ion bombardment undergone by the amorphous semiconductor is minimized, for example by increasing the working pressure (for example greater than about 333 Pa).
- a first etching mask 16 is deposited on the first sacrificial layer 14 (FIG.
- This first etching mask 16 is made by screen printing an acid-resistant polymer paste that can be dissolved by a solvent.
- the use of a pattern recognition system provides excellent accuracy, for example between about 50 microns and 100 microns, in terms of serigraphy alignment.
- FIG. 1G the portions of the first sacrificial layer 14 not covered by the first etching mask 16 are etched in contact with a hydrofluoric acid bath. Only the portions of the first sacrificial layer 14 under the patterns formed by the first etching mask 16 are still present. Thus, the pattern formed by the first etching mask 16 is transferred to the level of the first sacrificial layer 14. The passivation layer 12 is not attacked by the acid.
- the first mask 16 is then removed by a solvent ( Figure IH). We then obtain a first sacrificial mask 14.
- a first variant it is possible to replace the deposition steps of the first etching mask 16, etching of the portions of the first sacrificial layer 14 not covered by the first etching mask 16 and of removing the first etching mask 16, that is to say, the three steps shown in Figures IF to IH, by a step of deposition by screen printing of a so-called "HF" paste, in a reverse pattern to the pattern of the first mask of etching 16, directly etching the first sacrificial layer after activation by heating (for example between 130 0 C and 150 0 C) locally to form the first sacrificial mask 14.
- a rinsing step makes it possible to eliminate the etching residues and the HF paste .
- a layer 18 of doped amorphous silicon of a first type of conductivity, here N, is deposited by PECVD at a temperature of about 200 ° C., on the first sacrificial mask 14 and on the parts of the passivation layer 12 not covered by the first sacrificial mask 14.
- This layer 18 has for example a thickness between about 5 nm and 30 nm.
- the first sacrificial mask 14 is etched with hydrofluoric acid and the doped amorphous silicon of the layer 18 on the first sacrificial mask 14 is removed, for example by "lift-off" (delamination by removal of the underlayer ) (figure IJ).
- pads 20 of N-doped amorphous silicon are formed on the intrinsic amorphous silicon layer 12.
- a second sacrificial layer 22 (FIG. 1K) is deposited by PECVD, for example at a temperature of less than or equal to approximately 200 ° C. in order not to recrystallize the amorphous silicon previously deposited from the layers 8 and 12 and the pads 20 on the silicon. amorphous of the layer 12 and the pads 20.
- This second sacrificial layer 22 may for example be based on silicon oxide, and / or silicon carbide and / or silicon nitride.
- a second etching mask 24 is deposited on the second sacrificial layer 22, at the level of the pads 20 of N-doped amorphous silicon (FIG.
- This second etching mask 24 is deposited by screen printing an acid-resistant polymer paste that can be dissolved by a solvent.
- a pattern recognition system provides accuracies, for example between about 50 microns and 100 microns, in terms of alignment screen printing.
- the portions of the second sacrificial layer 22 not covered by the second etching mask 24 are etched in contact with a hydrofluoric acid bath. Only the portions of the second sacrificial layer 22 under the patterns formed by the second etching mask 24 are still present. Thus, the pattern formed by the second etching mask 24 is transferred to the level of the second sacrificial layer 22, making a second sacrificial mask 22. The passivation layer 12 is not attacked by the acid. The second etching mask 24 is then removed by a solvent (FIG.
- the deposition steps of the second sacrificial layer 22, the deposition of the second etching mask 24, etching of the portions of the second sacrificial layer 22 not covered by the second etching mask 24 and the suppression of the second mask of 24, can be replaced by a step of direct deposition by screen printing of a paste based on polymer or oxide, such as oxide glass, in a pattern identical to the pattern of the second sacrificial mask 22 shown in FIG. .
- a layer 26 of doped amorphous silicon of a second type of conductivity, here P, is deposited by PECVD at a temperature of about 200 ° C., on the second mask sacrificial 22 and the portions of the passivation layer 12 not covered by the second sacrificial mask 22.
- This layer 26 has for example a thickness between about 5 nm and 30 nm.
- the second sacrificial mask 22 is etched with hydrofluoric acid and the doped amorphous silicon of the layer 26 on the second sacrificial mask 22 is removed by "lift-off" (FIG. IP).
- pads 28 of P-doped amorphous silicon are formed on the intrinsic amorphous silicon layer 12.
- a heterojunction is thus obtained formed by the pads 20, 28 of amorphous silicon N and P and the substrate 2 based on crystalline silicon. at the rear face of the photovoltaic cell 100.
- the metallizations of the solar cell 100 are then carried out.
- a metal 30, for example based on aluminum, and / or copper and / or copper, is selectively deposited.
- silver for example by evaporation, through a mask whose pattern is substantially similar to the pattern formed by the pads 20 and 28 of amorphous silicon doped N and P, or such that the deposited metallizations are arranged on the pads 20 and 28 ( figure IQ).
- the metallization surface deposited is preferably as large as possible in order to improve the optical confinement when using a thin silicon substrate (thickness less than about 200 ⁇ m).
- the thickness of the contacts 30 can be increased to a thickness of, for example, about 20 ⁇ m by autocatalytic deposition or by electrodeposition (IR Figure). We then obtain metallizations allowing an excellent conduction of the current, thus limiting the losses by resistance.
- FIGS. 2A to 21 partially represent the steps of making a photovoltaic cell 200 according to a second embodiment.
- the substrate 2 having at the front face the first layer 8 and the antireflection layer 10, and at the rear face the passivation layer 12 on which are arranged the pads of the first sacrificial mask 14 covered with the layer N-doped amorphous silicon 18.
- a conductive transparent oxide (ITO) layer 32 and metallizations 30 are deposited, for example by sputtering.
- the first sacrificial mask 14 is etched, then forming pads 20 of N-doped amorphous silicon coated with the ITO layer 32 and the metallizations 30 (FIG. 2B).
- the oxide 32 and the metallizations 30 on the first sacrificial mask 14 are eliminated during the etching step of the first sacrificial mask 14.
- a conductive transparent oxide layer (ITO) 32 and metallizations 30 are deposited ( Figure 2H).
- ITO conductive transparent oxide layer
- 32 oxide and metallizations 30 arranged on the second sacrificial mask 22 are eliminated during the etching step of the second sacrificial mask 22, the oxide 32 and the metallizations 30 remaining only on the pads 28 of P-doped amorphous silicon.
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Sustainable Development (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0653943A FR2906406B1 (fr) | 2006-09-26 | 2006-09-26 | Procede de realisation de cellule photovoltaique a heterojonction en face arriere. |
PCT/EP2007/060016 WO2008037658A2 (fr) | 2006-09-26 | 2007-09-21 | Procede de realisation de cellule photovoltaique a heterojonction en face arriere |
Publications (1)
Publication Number | Publication Date |
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EP2067174A2 true EP2067174A2 (fr) | 2009-06-10 |
Family
ID=37963592
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07803574A Withdrawn EP2067174A2 (fr) | 2006-09-26 | 2007-09-21 | Procede de realisation de cellule photovoltaique a heterojonction en face arriere |
Country Status (5)
Country | Link |
---|---|
US (1) | US7972894B2 (fr) |
EP (1) | EP2067174A2 (fr) |
JP (1) | JP2010504636A (fr) |
FR (1) | FR2906406B1 (fr) |
WO (1) | WO2008037658A2 (fr) |
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2007
- 2007-09-21 WO PCT/EP2007/060016 patent/WO2008037658A2/fr active Application Filing
- 2007-09-21 US US12/442,853 patent/US7972894B2/en not_active Expired - Fee Related
- 2007-09-21 EP EP07803574A patent/EP2067174A2/fr not_active Withdrawn
- 2007-09-21 JP JP2009528733A patent/JP2010504636A/ja active Pending
Non-Patent Citations (1)
Title |
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See references of WO2008037658A3 * |
Also Published As
Publication number | Publication date |
---|---|
FR2906406B1 (fr) | 2008-12-19 |
FR2906406A1 (fr) | 2008-03-28 |
WO2008037658A3 (fr) | 2008-05-22 |
JP2010504636A (ja) | 2010-02-12 |
US7972894B2 (en) | 2011-07-05 |
US20100087031A1 (en) | 2010-04-08 |
WO2008037658A2 (fr) | 2008-04-03 |
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