DE69529367D1 - Halbleiterspeicheranordnung und hochspannungsschaltende Schaltung - Google Patents

Halbleiterspeicheranordnung und hochspannungsschaltende Schaltung

Info

Publication number
DE69529367D1
DE69529367D1 DE69529367T DE69529367T DE69529367D1 DE 69529367 D1 DE69529367 D1 DE 69529367D1 DE 69529367 T DE69529367 T DE 69529367T DE 69529367 T DE69529367 T DE 69529367T DE 69529367 D1 DE69529367 D1 DE 69529367D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
switching circuit
voltage switching
memory arrangement
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69529367T
Other languages
English (en)
Other versions
DE69529367T2 (de
Inventor
Toru Tanzawa
Tomoharu Tanaka
Ken Takeuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP19582394A external-priority patent/JP3197161B2/ja
Priority claimed from JP21803194A external-priority patent/JP3176011B2/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69529367D1 publication Critical patent/DE69529367D1/de
Application granted granted Critical
Publication of DE69529367T2 publication Critical patent/DE69529367T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004—Voltage
DE69529367T 1994-08-19 1995-08-18 Halbleiterspeicheranordnung und hochspannungsschaltende Schaltung Expired - Lifetime DE69529367T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP21803194 1994-08-19
JP19582394A JP3197161B2 (ja) 1994-08-19 1994-08-19 高電圧切り換え回路
JP21803194A JP3176011B2 (ja) 1994-08-19 1994-08-19 半導体記憶装置
JP19582394 1994-08-19

Publications (2)

Publication Number Publication Date
DE69529367D1 true DE69529367D1 (de) 2003-02-20
DE69529367T2 DE69529367T2 (de) 2004-01-22

Family

ID=26509369

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69529367T Expired - Lifetime DE69529367T2 (de) 1994-08-19 1995-08-18 Halbleiterspeicheranordnung und hochspannungsschaltende Schaltung

Country Status (4)

Country Link
US (3) US5708606A (de)
EP (1) EP0697702B1 (de)
KR (1) KR100221939B1 (de)
DE (1) DE69529367T2 (de)

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JPH1166874A (ja) * 1997-08-08 1999-03-09 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPH1173791A (ja) * 1997-08-28 1999-03-16 Sharp Corp 不揮発性半導体記憶装置
JP3558510B2 (ja) * 1997-10-30 2004-08-25 シャープ株式会社 不揮発性半導体記憶装置
JPH11177071A (ja) * 1997-12-11 1999-07-02 Toshiba Corp 不揮発性半導体記憶装置
US6069519A (en) * 1998-06-10 2000-05-30 Integrated Silicon Solution Inc. Leakage improved charge pump for nonvolatile memory device
JP3688899B2 (ja) * 1998-09-08 2005-08-31 株式会社東芝 半導体集積回路装置
KR100328359B1 (ko) * 1999-06-22 2002-03-13 윤종용 기판 전압 바운싱을 최소화할 수 있는 플래시 메모리 장치 및그것의 프로그램 방법
US6550028B1 (en) * 1999-10-19 2003-04-15 Advanced Micro Devices, Inc. Array VT mode implementation for a simultaneous operation flash memory device
JP3913952B2 (ja) * 1999-12-28 2007-05-09 株式会社東芝 半導体記憶装置
EP1118867B1 (de) * 2000-01-18 2005-10-19 STMicroelectronics S.r.l. Verfahren zur Prüfung einer CMOS integrierten Schaltung
US6618289B2 (en) 2001-10-29 2003-09-09 Atmel Corporation High voltage bit/column latch for Vcc operation
US6977850B2 (en) * 2001-12-27 2005-12-20 Kabushiki Kaisha Toshiba Semiconductor device having switch circuit to supply voltage
US6714458B2 (en) * 2002-02-11 2004-03-30 Micron Technology, Inc. High voltage positive and negative two-phase discharge system and method for channel erase in flash memory devices
US6570811B1 (en) * 2002-04-04 2003-05-27 Oki Electric Industry Co., Ltd. Writing operation control circuit and semiconductor memory using the same
JP2004226115A (ja) * 2003-01-20 2004-08-12 Elpida Memory Inc 半導体装置及びその試験方法
US7046555B2 (en) * 2003-09-17 2006-05-16 Sandisk Corporation Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance
JP2005243164A (ja) * 2004-02-27 2005-09-08 Toshiba Corp 半導体記憶装置
JP2007102865A (ja) * 2005-09-30 2007-04-19 Toshiba Corp 半導体集積回路装置
JP4199765B2 (ja) * 2005-12-02 2008-12-17 マイクロン テクノロジー，インコーポレイテッド 高電圧スイッチング回路
US7705600B1 (en) * 2006-02-13 2010-04-27 Cypress Semiconductor Corporation Voltage stress testing of core blocks and regulator transistors
JP4818024B2 (ja) * 2006-08-23 2011-11-16 株式会社東芝 半導体記憶装置
JP2008146772A (ja) * 2006-12-12 2008-06-26 Toshiba Corp 半導体記憶装置
JP2009043358A (ja) * 2007-08-10 2009-02-26 Toshiba Corp 半導体記憶装置
US8000151B2 (en) * 2008-01-10 2011-08-16 Micron Technology, Inc. Semiconductor memory column decoder device and method
US8125829B2 (en) 2008-05-02 2012-02-28 Micron Technology, Inc. Biasing system and method
IT1392921B1 (it) * 2009-02-11 2012-04-02 St Microelectronics Srl Regioni allocabili dinamicamente in memorie non volatili
US8593869B2 (en) 2011-07-27 2013-11-26 Micron Technology, Inc. Apparatuses and methods including memory array and data line architecture
US8792263B2 (en) 2011-12-22 2014-07-29 Micron Technology, Inc. Apparatuses and methods including memory with top and bottom data lines
US8797804B2 (en) 2012-07-30 2014-08-05 Micron Technology, Inc. Vertical memory with body connection
US8780631B2 (en) 2012-08-21 2014-07-15 Micron Technology, Inc. Memory devices having data lines included in top and bottom conductive lines
US9595533B2 (en) 2012-08-30 2017-03-14 Micron Technology, Inc. Memory array having connections going through control gates
JP5626812B2 (ja) * 2012-08-30 2014-11-19 ウィンボンド エレクトロニクス コーポレーション 半導体記憶装置
US9064578B2 (en) 2012-12-18 2015-06-23 Micron Technology, Inc. Enable/disable of memory chunks during memory access
US9285997B2 (en) 2013-10-30 2016-03-15 Intel Corporation Independently selective tile group access with data structuring
JP2017174484A (ja) * 2016-03-25 2017-09-28 ルネサスエレクトロニクス株式会社 半導体記憶装置
US10360948B2 (en) * 2017-06-26 2019-07-23 Samsung Electronics Co., Ltd. Memory device and operating method of memory device

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US4673829A (en) * 1982-02-08 1987-06-16 Seeq Technology, Inc. Charge pump for providing programming voltage to the word lines in a semiconductor memory array
US5155701A (en) * 1985-02-08 1992-10-13 Hitachi, Ltd. Semiconductor integrated circuit device and method of testing the same
JPS6252797A (ja) * 1985-08-30 1987-03-07 Mitsubishi Electric Corp 半導体記憶装置
US5101381A (en) * 1987-08-31 1992-03-31 Oki Electric Industry Co., Ltd. Control circuit for EEPROM
NL8800408A (nl) * 1988-02-18 1989-09-18 Philips Nv Geintegreerde geheugenschakeling met een hoogspanningsschakelaar tussen een programmeerspanningsgenerator en een wisbaar programmeerbaar geheugen, hoogspanningsschakelaar geschikt voor toepassing in een dergelijke geheugenschakeling.
JP2590574B2 (ja) * 1989-12-06 1997-03-12 松下電器産業株式会社 高電圧スイッチング回路
US5132567A (en) * 1991-04-18 1992-07-21 International Business Machines Corporation Low threshold BiCMOS circuit
US5245572A (en) * 1991-07-30 1993-09-14 Intel Corporation Floating gate nonvolatile memory with reading while writing capability
JPH05102438A (ja) * 1991-10-04 1993-04-23 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP3158542B2 (ja) * 1991-10-09 2001-04-23 日本電気株式会社 半導体メモリ装置
US5313429A (en) * 1992-02-14 1994-05-17 Catalyst Semiconductor, Inc. Memory circuit with pumped voltage for erase and program operations
US5420822A (en) * 1992-03-31 1995-05-30 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
US5267218A (en) * 1992-03-31 1993-11-30 Intel Corporation Nonvolatile memory card with a single power supply input
US5422855A (en) * 1992-03-31 1995-06-06 Intel Corporation Flash memory card with all zones chip enable circuitry
JP2735435B2 (ja) * 1992-06-01 1998-04-02 三菱電機株式会社 メモリカードのメモリ制御用回路
JP3526894B2 (ja) * 1993-01-12 2004-05-17 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US5381369A (en) * 1993-02-05 1995-01-10 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device using a command control system
US5455784A (en) * 1993-08-09 1995-10-03 Nec Corporation Associative memory device with small memory cells selectively storing data bits and don't care bits
JP3919213B2 (ja) * 1993-09-30 2007-05-23 マクロニクス インターナショナル カンパニイ リミテッド 不揮発性状態書込みを備えた自動テスト回路
JPH07235193A (ja) * 1993-12-28 1995-09-05 Toshiba Corp 半導体記憶装置
GB9417266D0 (en) * 1994-08-26 1994-10-19 Inmos Ltd Testing a non-volatile memory
US5790459A (en) * 1995-08-04 1998-08-04 Micron Quantum Devices, Inc. Memory circuit for performing threshold voltage tests on cells of a memory array

Also Published As

Publication number Publication date
US5909398A (en) 1999-06-01
EP0697702B1 (de) 2003-01-15
DE69529367T2 (de) 2004-01-22
US5828621A (en) 1998-10-27
US5708606A (en) 1998-01-13
EP0697702A2 (de) 1996-02-21
KR100221939B1 (ko) 1999-09-15
EP0697702A3 (de) 1999-01-07
KR960008848A (ko) 1996-03-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition