DE69626607D1 - Halbleiterspeicheranordnung mit Spannungsgeneratorschaltung - Google Patents

Halbleiterspeicheranordnung mit Spannungsgeneratorschaltung

Info

Publication number
DE69626607D1
DE69626607D1 DE69626607T DE69626607T DE69626607D1 DE 69626607 D1 DE69626607 D1 DE 69626607D1 DE 69626607 T DE69626607 T DE 69626607T DE 69626607 T DE69626607 T DE 69626607T DE 69626607 D1 DE69626607 D1 DE 69626607D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
voltage generator
generator circuit
memory arrangement
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69626607T
Other languages
English (en)
Other versions
DE69626607T2 (de
Inventor
Tatsuya Matano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69626607D1 publication Critical patent/DE69626607D1/de
Application granted granted Critical
Publication of DE69626607T2 publication Critical patent/DE69626607T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Dc-Dc Converters (AREA)
DE69626607T 1995-11-29 1996-11-27 Halbleiterspeicheranordnung mit Spannungsgeneratorschaltung Expired - Fee Related DE69626607T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7311241A JP2830807B2 (ja) 1995-11-29 1995-11-29 半導体メモリ装置

Publications (2)

Publication Number Publication Date
DE69626607D1 true DE69626607D1 (de) 2003-04-17
DE69626607T2 DE69626607T2 (de) 2003-12-18

Family

ID=18014797

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69626607T Expired - Fee Related DE69626607T2 (de) 1995-11-29 1996-11-27 Halbleiterspeicheranordnung mit Spannungsgeneratorschaltung

Country Status (6)

Country Link
US (1) US6137343A (de)
EP (1) EP0777231B1 (de)
JP (1) JP2830807B2 (de)
KR (1) KR100211481B1 (de)
DE (1) DE69626607T2 (de)
TW (1) TW310436B (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001297584A (ja) * 2000-04-13 2001-10-26 Nec Corp 半導体記憶装置の昇圧回路
JP4960544B2 (ja) * 2000-07-06 2012-06-27 エルピーダメモリ株式会社 半導体記憶装置及びその制御方法
KR100518399B1 (ko) * 2000-07-25 2005-09-29 엔이씨 일렉트로닉스 가부시키가이샤 내부 전압 레벨 제어 회로 및 반도체 기억 장치 및 그들의제어 방법
KR100391152B1 (ko) * 2000-11-23 2003-07-12 삼성전자주식회사 조기동작 고전압 발생기를 가지는 반도체 장치 및 그에따른 고전압 공급방법
JP4834261B2 (ja) * 2001-09-27 2011-12-14 Ｏｋｉセミコンダクタ株式会社 昇圧電源発生回路
KR100469153B1 (ko) * 2002-08-30 2005-02-02 주식회사 하이닉스반도체 강유전체 메모리 장치
KR100727440B1 (ko) * 2005-03-31 2007-06-13 주식회사 하이닉스반도체 내부전원 생성장치
KR100732756B1 (ko) * 2005-04-08 2007-06-27 주식회사 하이닉스반도체 전압 펌핑장치
IL172864A0 (en) * 2005-12-28 2007-02-11 Camero Tech Ltd Automatic delay calibration and tracking for ultrawideband antenna array
US8040175B2 (en) * 2007-10-24 2011-10-18 Cypress Semiconductor Corporation Supply regulated charge pump system
KR100927406B1 (ko) * 2008-02-29 2009-11-19 주식회사 하이닉스반도체 내부 전압 생성 회로
KR20100049758A (ko) * 2008-11-04 2010-05-13 삼성전자주식회사 승압 회로 및 이를 포함하는 반도체 장치
JP2010136573A (ja) * 2008-12-08 2010-06-17 Elpida Memory Inc 昇圧電圧発生回路、負電圧発生回路および降圧電圧発生回路
US8054694B2 (en) * 2009-03-24 2011-11-08 Atmel Corporation Voltage generator for memory array
KR101222062B1 (ko) 2011-01-27 2013-01-15 에스케이하이닉스 주식회사 반도체 집적회로
US11676652B2 (en) * 2020-12-16 2023-06-13 Honeywell International Inc. Wordline boost driver

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6445157A (en) * 1987-08-13 1989-02-17 Toshiba Corp Semiconductor integrated circuit
DE3931596A1 (de) * 1989-03-25 1990-10-04 Eurosil Electronic Gmbh Spannungsvervielfacherschaltung
JP2805210B2 (ja) * 1989-06-09 1998-09-30 日本テキサス・インスツルメンツ株式会社 昇圧回路
JP2748733B2 (ja) * 1991-08-26 1998-05-13 日本電気株式会社 半導体メモリ
KR940005691B1 (ko) * 1991-10-25 1994-06-22 삼성전자 주식회사 기판전압 발생 장치의 차아지 펌프회로
IT1258242B (it) 1991-11-07 1996-02-22 Samsung Electronics Co Ltd Dispositivo di memoria a semiconduttore includente circuiteria di pompaggio della tensione di alimentazione
KR940003301B1 (ko) * 1991-12-20 1994-04-20 주식회사 금성사 Ce버스 심볼 엔코딩 처리회로
KR950002015B1 (ko) * 1991-12-23 1995-03-08 삼성전자주식회사 하나의 오실레이터에 의해 동작되는 정전원 발생회로
JPH05234373A (ja) * 1992-02-20 1993-09-10 Oki Micro Design Miyazaki:Kk 半導体記憶装置
KR950002726B1 (ko) * 1992-03-30 1995-03-24 삼성전자주식회사 기판전압 발생기의 전하 펌프 회로
JP2632112B2 (ja) * 1992-07-27 1997-07-23 三菱電機株式会社 電圧発生回路
JPH0660653A (ja) * 1992-08-12 1994-03-04 Hitachi Ltd 電源回路、及び半導体記憶装置
KR950006067Y1 (ko) * 1992-10-08 1995-07-27 문정환 반도체 메모리 장치
JPH0745074A (ja) * 1993-07-29 1995-02-14 Mitsubishi Electric Corp 半導体記憶装置
JP3244601B2 (ja) * 1994-12-09 2002-01-07 富士通株式会社 半導体集積回路

Also Published As

Publication number Publication date
TW310436B (de) 1997-07-11
EP0777231A3 (de) 1998-08-05
KR970029842A (ko) 1997-06-26
KR100211481B1 (ko) 1999-08-02
US6137343A (en) 2000-10-24
JPH09153284A (ja) 1997-06-10
DE69626607T2 (de) 2003-12-18
JP2830807B2 (ja) 1998-12-02
EP0777231B1 (de) 2003-03-12
EP0777231A2 (de) 1997-06-04

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee