DE69333124D1 - Halbleiteranordnung und Schaltung - Google Patents
Halbleiteranordnung und SchaltungInfo
- Publication number
- DE69333124D1 DE69333124D1 DE69333124T DE69333124T DE69333124D1 DE 69333124 D1 DE69333124 D1 DE 69333124D1 DE 69333124 T DE69333124 T DE 69333124T DE 69333124 T DE69333124 T DE 69333124T DE 69333124 D1 DE69333124 D1 DE 69333124D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US985095 | 1992-11-30 | ||
US07/985,095 US5457068A (en) | 1992-11-30 | 1992-11-30 | Monolithic integration of microwave silicon devices and low loss transmission lines |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69333124D1 true DE69333124D1 (de) | 2003-09-04 |
DE69333124T2 DE69333124T2 (de) | 2004-05-06 |
Family
ID=25531193
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69333124T Expired - Fee Related DE69333124T2 (de) | 1992-11-30 | 1993-11-30 | Halbleiteranordnung und Schaltung |
Country Status (4)
Country | Link |
---|---|
US (2) | US5457068A (de) |
EP (1) | EP0600436B1 (de) |
JP (1) | JPH0750339A (de) |
DE (1) | DE69333124T2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5939739A (en) * | 1996-05-31 | 1999-08-17 | The Whitaker Corporation | Separation of thermal and electrical paths in flip chip ballasted power heterojunction bipolar transistors |
US5976941A (en) * | 1997-06-06 | 1999-11-02 | The Whitaker Corporation | Ultrahigh vacuum deposition of silicon (Si-Ge) on HMIC substrates |
US6002375A (en) * | 1997-09-02 | 1999-12-14 | Motorola, Inc. | Multi-substrate radio-frequency circuit |
US5841184A (en) * | 1997-09-19 | 1998-11-24 | The Whitaker Corporation | Integrated emitter drain bypass capacitor for microwave/RF power device applications |
US7164186B2 (en) * | 2002-09-30 | 2007-01-16 | Texas Instruments Incorporated | Structure of semiconductor device with sinker contact region |
US9520356B1 (en) * | 2015-09-09 | 2016-12-13 | Analog Devices, Inc. | Circuit with reduced noise and controlled frequency |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1527898A (fr) * | 1967-03-16 | 1968-06-07 | Radiotechnique Coprim Rtc | Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication |
EP0048175B1 (de) * | 1980-09-17 | 1986-04-23 | Hitachi, Ltd. | Halbleiterbauelement und Verfahren zu dessen Herstellung |
GB2100925B (en) * | 1981-06-25 | 1985-06-05 | Standard Telephones Cables Ltd | Fabricating integrated circuits |
JPS58105551A (ja) * | 1981-11-20 | 1983-06-23 | Fujitsu Ltd | 半導体装置 |
US4473598A (en) * | 1982-06-30 | 1984-09-25 | International Business Machines Corporation | Method of filling trenches with silicon and structures |
US4611384A (en) * | 1985-04-30 | 1986-09-16 | Gte Laboratories Incorporated | Method of making junction field effect transistor of static induction type |
JPH07105436B2 (ja) * | 1986-07-18 | 1995-11-13 | 株式会社東芝 | 半導体装置の製造方法 |
US4807022A (en) * | 1987-05-01 | 1989-02-21 | Raytheon Company | Simultaneous formation of via hole and tub structures for GaAs monolithic microwave integrated circuits |
FR2631488B1 (fr) * | 1988-05-10 | 1990-07-27 | Thomson Hybrides Microondes | Circuit integre hyperfrequence de type planar, comportant au moins un composant mesa, et son procede de fabrication |
EP0343269B1 (de) * | 1988-05-26 | 1993-05-12 | Fairchild Semiconductor Corporation | Verbindungssystem von hoher Leistungsfähigkeit für eine integrierte Schaltung |
DE4006158A1 (de) * | 1990-02-27 | 1991-09-12 | Fraunhofer Ges Forschung | Verfahren zum erzeugen einer isolierten, einkristallinen siliziuminsel |
US5145795A (en) * | 1990-06-25 | 1992-09-08 | Motorola, Inc. | Semiconductor device and method therefore |
JPH0488657A (ja) * | 1990-07-31 | 1992-03-23 | Toshiba Corp | 半導体装置とその製造方法 |
US5091330A (en) * | 1990-12-28 | 1992-02-25 | Motorola, Inc. | Method of fabricating a dielectric isolated area |
US5254491A (en) * | 1991-09-23 | 1993-10-19 | Motorola, Inc. | Method of making a semiconductor device having improved frequency response |
-
1992
- 1992-11-30 US US07/985,095 patent/US5457068A/en not_active Expired - Lifetime
-
1993
- 1993-11-29 JP JP5298455A patent/JPH0750339A/ja active Pending
- 1993-11-30 DE DE69333124T patent/DE69333124T2/de not_active Expired - Fee Related
- 1993-11-30 EP EP93119271A patent/EP0600436B1/de not_active Expired - Lifetime
-
1995
- 1995-04-25 US US08/427,761 patent/US5612556A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0600436A3 (de) | 1997-10-01 |
EP0600436B1 (de) | 2003-07-30 |
DE69333124T2 (de) | 2004-05-06 |
EP0600436A2 (de) | 1994-06-08 |
US5612556A (en) | 1997-03-18 |
US5457068A (en) | 1995-10-10 |
JPH0750339A (ja) | 1995-02-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |