FR1527898A - Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication - Google Patents

Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication

Info

Publication number
FR1527898A
FR1527898A FR99074A FR99074A FR1527898A FR 1527898 A FR1527898 A FR 1527898A FR 99074 A FR99074 A FR 99074A FR 99074 A FR99074 A FR 99074A FR 1527898 A FR1527898 A FR 1527898A
Authority
FR
France
Prior art keywords
arrangement
manufacturing
semiconductor devices
common support
devices carried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR99074A
Other languages
English (en)
Inventor
Jean-Claude Frouin
Michel De Brebisson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RADIOTECHNIQUE COPRIM RTC
Original Assignee
RADIOTECHNIQUE COPRIM RTC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RADIOTECHNIQUE COPRIM RTC filed Critical RADIOTECHNIQUE COPRIM RTC
Priority to FR99074A priority Critical patent/FR1527898A/fr
Priority to NL6803688A priority patent/NL6803688A/xx
Priority to GB02703/68A priority patent/GB1214203A/en
Priority to ES351652A priority patent/ES351652A1/es
Priority to CH384768A priority patent/CH466873A/de
Priority to DE19681639364 priority patent/DE1639364A1/de
Priority to BE712370D priority patent/BE712370A/xx
Priority to US713662A priority patent/US3500139A/en
Application granted granted Critical
Publication of FR1527898A publication Critical patent/FR1527898A/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
    • H03F3/347—DC amplifiers in which all stages are DC-coupled with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/036—Diffusion, nonselective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/05—Etch and refill
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
FR99074A 1967-03-16 1967-03-16 Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication Expired FR1527898A (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR99074A FR1527898A (fr) 1967-03-16 1967-03-16 Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication
NL6803688A NL6803688A (fr) 1967-03-16 1968-03-14
GB02703/68A GB1214203A (en) 1967-03-16 1968-03-15 Improvements in and relating to integrated semiconductor circuits
ES351652A ES351652A1 (es) 1967-03-16 1968-03-15 Un dispositivo semiconductor integrado.
CH384768A CH466873A (de) 1967-03-16 1968-03-15 Integrierte Halbleitervorrichtung
DE19681639364 DE1639364A1 (de) 1967-03-16 1968-03-15 Integrierte Halbleiterschaltung
BE712370D BE712370A (fr) 1967-03-16 1968-03-18
US713662A US3500139A (en) 1967-03-16 1968-03-18 Integrated circuit utilizing dielectric plus junction isolation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR99074A FR1527898A (fr) 1967-03-16 1967-03-16 Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication

Publications (1)

Publication Number Publication Date
FR1527898A true FR1527898A (fr) 1968-06-07

Family

ID=8627031

Family Applications (1)

Application Number Title Priority Date Filing Date
FR99074A Expired FR1527898A (fr) 1967-03-16 1967-03-16 Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication

Country Status (8)

Country Link
US (1) US3500139A (fr)
BE (1) BE712370A (fr)
CH (1) CH466873A (fr)
DE (1) DE1639364A1 (fr)
ES (1) ES351652A1 (fr)
FR (1) FR1527898A (fr)
GB (1) GB1214203A (fr)
NL (1) NL6803688A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2080989A1 (fr) * 1970-02-13 1971-11-26 Texas Instruments Inc

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5696402A (en) * 1965-09-28 1997-12-09 Li; Chou H. Integrated circuit device
US6849918B1 (en) * 1965-09-28 2005-02-01 Chou H. Li Miniaturized dielectrically isolated solid state device
US7038290B1 (en) 1965-09-28 2006-05-02 Li Chou H Integrated circuit device
US6979877B1 (en) * 1965-09-28 2005-12-27 Li Chou H Solid-state device
US4946800A (en) * 1965-09-28 1990-08-07 Li Chou H Method for making solid-state device utilizing isolation grooves
US3894893A (en) * 1968-03-30 1975-07-15 Kyodo Denshi Gijyutsu Kk Method for the production of monocrystal-polycrystal semiconductor devices
US3753803A (en) * 1968-12-06 1973-08-21 Hitachi Ltd Method of dividing semiconductor layer into a plurality of isolated regions
FR2080849A6 (fr) * 1970-02-06 1971-11-26 Radiotechnique Compelec
NL169936C (nl) * 1970-07-10 1982-09-01 Philips Nv Halfgeleiderinrichting omvattende een halfgeleiderlichaam met een althans ten dele in het halfgeleiderlichaam verzonken oxydepatroon.
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
NL166156C (nl) * 1971-05-22 1981-06-15 Philips Nv Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan.
US3912556A (en) * 1971-10-27 1975-10-14 Motorola Inc Method of fabricating a scannable light emitting diode array
US3859127A (en) * 1972-01-24 1975-01-07 Motorola Inc Method and material for passivating the junctions of mesa type semiconductor devices
US3772577A (en) * 1972-02-10 1973-11-13 Texas Instruments Inc Guard ring mesa construction for low and high voltage npn and pnp transistors and diodes and method of making same
SE361232B (fr) * 1972-11-09 1973-10-22 Ericsson Telefon Ab L M
US3932927A (en) * 1973-03-05 1976-01-20 Motorola, Inc. Scannable light emitting diode array and method
US3913124A (en) * 1974-01-03 1975-10-14 Motorola Inc Integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector including fabrication method therefor
US4042949A (en) * 1974-05-08 1977-08-16 Motorola, Inc. Semiconductor devices
US3998673A (en) * 1974-08-16 1976-12-21 Pel Chow Method for forming electrically-isolated regions in integrated circuits utilizing selective epitaxial growth
JPS5146083A (en) * 1974-10-18 1976-04-20 Hitachi Ltd Handotaisochino seizohoho
US4032950A (en) * 1974-12-06 1977-06-28 Hughes Aircraft Company Liquid phase epitaxial process for growing semi-insulating gaas layers
US4542579A (en) * 1975-06-30 1985-09-24 International Business Machines Corporation Method for forming aluminum oxide dielectric isolation in integrated circuits
US4048649A (en) * 1976-02-06 1977-09-13 Transitron Electronic Corporation Superintegrated v-groove isolated bipolar and vmos transistors
US4104086A (en) * 1977-08-15 1978-08-01 International Business Machines Corporation Method for forming isolated regions of silicon utilizing reactive ion etching
US4140558A (en) * 1978-03-02 1979-02-20 Bell Telephone Laboratories, Incorporated Isolation of integrated circuits utilizing selective etching and diffusion
US4240843A (en) * 1978-05-23 1980-12-23 Western Electric Company, Inc. Forming self-guarded p-n junctions by epitaxial regrowth of amorphous regions using selective radiation annealing
US4670769A (en) * 1979-04-09 1987-06-02 Harris Corporation Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
US4255207A (en) * 1979-04-09 1981-03-10 Harris Corporation Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
JPS5636143A (en) * 1979-08-31 1981-04-09 Hitachi Ltd Manufacture of semiconductor device
USRE32090E (en) * 1980-05-07 1986-03-04 At&T Bell Laboratories Silicon integrated circuits
US4771328A (en) * 1983-10-13 1988-09-13 International Business Machine Corporation Semiconductor device and process
US4574469A (en) * 1984-09-14 1986-03-11 Motorola, Inc. Process for self-aligned buried layer, channel-stop, and isolation
US4573257A (en) * 1984-09-14 1986-03-04 Motorola, Inc. Method of forming self-aligned implanted channel-stop and buried layer utilizing non-single crystal alignment key
US4583282A (en) * 1984-09-14 1986-04-22 Motorola, Inc. Process for self-aligned buried layer, field guard, and isolation
US4983226A (en) * 1985-02-14 1991-01-08 Texas Instruments, Incorporated Defect free trench isolation devices and method of fabrication
US4767722A (en) * 1986-03-24 1988-08-30 Siliconix Incorporated Method for making planar vertical channel DMOS structures
US5049968A (en) * 1988-02-08 1991-09-17 Kabushiki Kaisha Toshiba Dielectrically isolated substrate and semiconductor device using the same
US5332920A (en) * 1988-02-08 1994-07-26 Kabushiki Kaisha Toshiba Dielectrically isolated high and low voltage substrate regions
US5512774A (en) * 1988-02-08 1996-04-30 Kabushiki Kaisha Toshiba Dielectrically isolated substrate and semiconductor device using the same
JP2788269B2 (ja) * 1988-02-08 1998-08-20 株式会社東芝 半導体装置およびその製造方法
JP2685244B2 (ja) * 1988-09-30 1997-12-03 株式会社日本自動車部品総合研究所 半導体装置の製造方法
US5066603A (en) * 1989-09-06 1991-11-19 Gte Laboratories Incorporated Method of manufacturing static induction transistors
US5457068A (en) * 1992-11-30 1995-10-10 Texas Instruments Incorporated Monolithic integration of microwave silicon devices and low loss transmission lines
KR940016546A (ko) * 1992-12-23 1994-07-23 프레데릭 얀 스미트 반도체 장치 및 제조방법
JP2003282939A (ja) * 2002-03-26 2003-10-03 Oki Degital Imaging:Kk 半導体発光装置及びその製造方法

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US3271685A (en) * 1963-06-20 1966-09-06 Westinghouse Electric Corp Multipurpose molecular electronic semiconductor device for performing amplifier and oscillator-mixer functions including degenerative feedback means
US3370995A (en) * 1965-08-02 1968-02-27 Texas Instruments Inc Method for fabricating electrically isolated semiconductor devices in integrated circuits
US3400309A (en) * 1965-10-18 1968-09-03 Ibm Monolithic silicon device containing dielectrically isolatng film of silicon carbide

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2080989A1 (fr) * 1970-02-13 1971-11-26 Texas Instruments Inc

Also Published As

Publication number Publication date
US3500139A (en) 1970-03-10
NL6803688A (fr) 1968-09-17
GB1214203A (en) 1970-12-02
BE712370A (fr) 1968-09-18
DE1639364A1 (de) 1971-02-25
CH466873A (de) 1968-12-31
ES351652A1 (es) 1969-06-01

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