DE69832359D1 - Halbleitervorrichtung -anordnung und -schaltungen - Google Patents
Halbleitervorrichtung -anordnung und -schaltungenInfo
- Publication number
- DE69832359D1 DE69832359D1 DE69832359T DE69832359T DE69832359D1 DE 69832359 D1 DE69832359 D1 DE 69832359D1 DE 69832359 T DE69832359 T DE 69832359T DE 69832359 T DE69832359 T DE 69832359T DE 69832359 D1 DE69832359 D1 DE 69832359D1
- Authority
- DE
- Germany
- Prior art keywords
- circuits
- semiconductor device
- device arrangement
- arrangement
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9715168A GB9715168D0 (en) | 1997-07-19 | 1997-07-19 | Semiconductor device assemblies and circuits |
GB9715168 | 1997-07-19 | ||
GBGB9801240.4A GB9801240D0 (en) | 1998-01-22 | 1998-01-22 | Semiconductor device assemblies and circuits |
GB9801240 | 1998-01-22 | ||
PCT/IB1998/000994 WO1999004433A2 (en) | 1997-07-19 | 1998-06-29 | Mcm semiconductor device assemblies and circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69832359D1 true DE69832359D1 (de) | 2005-12-22 |
DE69832359T2 DE69832359T2 (de) | 2006-08-03 |
Family
ID=26311900
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69832359T Expired - Fee Related DE69832359T2 (de) | 1997-07-19 | 1998-06-29 | Halbleitervorrichtung -anordnung und -schaltungen |
Country Status (6)
Country | Link |
---|---|
US (1) | US6055148A (de) |
EP (1) | EP0927433B1 (de) |
JP (1) | JP4014652B2 (de) |
KR (1) | KR100632137B1 (de) |
DE (1) | DE69832359T2 (de) |
WO (1) | WO1999004433A2 (de) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000164800A (ja) | 1998-11-30 | 2000-06-16 | Mitsubishi Electric Corp | 半導体モジュール |
DE19935100B4 (de) * | 1999-07-27 | 2004-10-28 | Infineon Technologies Ag | Halbbrückenkonfiguration |
US6392864B1 (en) * | 1999-09-10 | 2002-05-21 | Alliedsignal Truck Brake Systems Co. | Electrical driver circuit for direct acting cantilever solenoid valve |
DE10030875C1 (de) * | 2000-06-23 | 2002-03-07 | Compact Dynamics Gmbh | Halbbrückenbaugruppe |
JP4146607B2 (ja) * | 2000-07-28 | 2008-09-10 | 三菱電機株式会社 | パワーモジュール |
DE10038968A1 (de) * | 2000-08-10 | 2002-03-07 | Infineon Technologies Ag | Schaltungsanordnung mit wenigstens zwei Halbleiterkörpern und einem Kühlkörper |
EP1221718A1 (de) | 2001-01-08 | 2002-07-10 | STMicroelectronics S.r.l. | Integriertes Leistungsbauelement mit verbesserter Effizienz und reduzierten Gesamtabmessungen |
KR20030031234A (ko) * | 2001-10-12 | 2003-04-21 | 주식회사 만도 | 고속 턴 온 다이오드를 이용한 솔레노이드 구동장치 |
ITMI20012284A1 (it) * | 2001-10-30 | 2003-04-30 | St Microelectronics Srl | Metodo per il perfezionamento della connessione elettrica tra un dispositivo elettronico di potenza ed il suo package |
JP2003258180A (ja) * | 2002-02-27 | 2003-09-12 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP2005011986A (ja) * | 2003-06-19 | 2005-01-13 | Sanyo Electric Co Ltd | 半導体装置 |
JPWO2005018001A1 (ja) * | 2003-08-18 | 2007-10-04 | サンケン電気株式会社 | 半導体装置 |
KR100618435B1 (ko) * | 2004-06-01 | 2006-08-30 | 국방과학연구소 | 직류 전동기 구동장치 |
US7898092B2 (en) * | 2007-11-21 | 2011-03-01 | Alpha & Omega Semiconductor, | Stacked-die package for battery power management |
US7884454B2 (en) | 2005-01-05 | 2011-02-08 | Alpha & Omega Semiconductor, Ltd | Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package |
US7511361B2 (en) * | 2005-01-05 | 2009-03-31 | Xiaotian Zhang | DFN semiconductor package having reduced electrical resistance |
US20060145312A1 (en) * | 2005-01-05 | 2006-07-06 | Kai Liu | Dual flat non-leaded semiconductor package |
ES2313626T3 (es) | 2005-03-21 | 2009-03-01 | Pfizer Limited | Derivados de triazol sustituidos como antagonistas de oxitocina. |
US8901699B2 (en) | 2005-05-11 | 2014-12-02 | Cree, Inc. | Silicon carbide junction barrier Schottky diodes with suppressed minority carrier injection |
JP2007019215A (ja) * | 2005-07-07 | 2007-01-25 | Sanken Electric Co Ltd | 半導体装置及びその製法 |
JP2007027432A (ja) * | 2005-07-15 | 2007-02-01 | Sanken Electric Co Ltd | 半導体装置 |
DE102005034012A1 (de) * | 2005-07-18 | 2006-11-09 | Infineon Technologies Ag | Leistungshalbleiterbauteil, insbesondere für das Treiben induktionsarmer Lasten, und Verfahren zur Herstellung eines Leistungshalbleiterbauteils |
KR100821127B1 (ko) * | 2006-09-28 | 2008-04-14 | 한국전자통신연구원 | 열전대를 구비하는 고전력 소자 및 그 제조방법 |
US7996987B2 (en) * | 2006-10-17 | 2011-08-16 | Broadcom Corporation | Single footprint family of integrated power modules |
JP2008244388A (ja) * | 2007-03-29 | 2008-10-09 | Nec Electronics Corp | 半導体装置 |
JP4600576B2 (ja) * | 2008-05-08 | 2010-12-15 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP4962409B2 (ja) * | 2008-05-19 | 2012-06-27 | サンケン電気株式会社 | 半導体装置及びその製法 |
JP2008258643A (ja) * | 2008-05-19 | 2008-10-23 | Sanken Electric Co Ltd | 半導体装置 |
JP5560538B2 (ja) * | 2008-05-22 | 2014-07-30 | 富士電機株式会社 | 半導体装置の製造方法 |
JP2010171169A (ja) * | 2009-01-22 | 2010-08-05 | Sanken Electric Co Ltd | 半導体モジュール及びその制御方法 |
US8164199B2 (en) * | 2009-07-31 | 2012-04-24 | Alpha and Omega Semiconductor Incorporation | Multi-die package |
US9257375B2 (en) | 2009-07-31 | 2016-02-09 | Alpha and Omega Semiconductor Inc. | Multi-die semiconductor package |
DE102011115886B4 (de) | 2011-10-15 | 2020-06-18 | Danfoss Silicon Power Gmbh | Verfahren zur Schaffung einer Verbindung eines Leistungshalbleiterchips mit oberseitigen Potentialflächen zu Dickdrähten |
DE102011115887A1 (de) * | 2011-10-15 | 2013-04-18 | Danfoss Silicon Power Gmbh | Leistungshalbleiterchip mit oberseitigen Potentialflächen |
US8766430B2 (en) | 2012-06-14 | 2014-07-01 | Infineon Technologies Ag | Semiconductor modules and methods of formation thereof |
US9041460B2 (en) | 2013-08-12 | 2015-05-26 | Infineon Technologies Ag | Packaged power transistors and power packages |
EP3018710B1 (de) * | 2014-11-10 | 2020-08-05 | Nxp B.V. | Anordnung von Halbleiterbauelementen |
US9870984B2 (en) * | 2014-12-10 | 2018-01-16 | Texas Instruments Incorporated | Power field-effect transistor (FET), pre-driver, controller, and sense resistor integration for multi-phase power applications |
DE102015113421B4 (de) | 2015-08-14 | 2019-02-21 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen von Halbleiterchips |
JP7059677B2 (ja) * | 2018-02-16 | 2022-04-26 | 富士電機株式会社 | 積層型集積回路 |
DE102021202583A1 (de) | 2021-03-17 | 2022-09-22 | Robert Bosch Gesellschaft mit beschränkter Haftung | Verfahren zur Überprüfung von Mehrfachbondverbindungen |
KR102585000B1 (ko) | 2021-12-15 | 2023-10-06 | 한국생산기술연구원 | GaN 하이브리드 모듈 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5030428B1 (de) * | 1969-03-31 | 1975-10-01 | ||
JPS5929143B2 (ja) * | 1978-01-07 | 1984-07-18 | 株式会社東芝 | 電力用半導体装置 |
US4402004A (en) * | 1978-01-07 | 1983-08-30 | Tokyo Shibaura Denki Kabushiki Kaisha | High current press pack semiconductor device having a mesa structure |
DE2812700A1 (de) * | 1978-03-23 | 1979-12-06 | Bbc Brown Boveri & Cie | Halbleiteranordnung mit zwei halbleiterelementen |
JPS5892231A (ja) * | 1981-11-28 | 1983-06-01 | Mitsubishi Electric Corp | 半導体素子のボンデイング方法 |
US4802099A (en) * | 1986-01-03 | 1989-01-31 | International Business Machines Corporation | Physical parameter balancing of circuit islands in integrated circuit wafers |
US5444219A (en) * | 1990-09-24 | 1995-08-22 | U.S. Philips Corporation | Temperature sensing device and a temperature sensing circuit using such a device |
GB2248151A (en) * | 1990-09-24 | 1992-03-25 | Philips Electronic Associated | Temperature sensing and protection circuit. |
DE69109468T2 (de) * | 1991-05-23 | 1995-12-14 | Sgs Thomson Microelectronics | Elektronische Leistungsanordnung realisiert durch eine Reihe elementarer Halbleiterbauelemente in Parallelverbindung und verwandtes Herstellungsverfahren. |
JPH065778A (ja) * | 1992-06-19 | 1994-01-14 | Fujitsu Ltd | 半導体装置 |
AU4926396A (en) * | 1995-02-16 | 1996-09-04 | Micromodule Systems, Inc. | Multiple chip module mounting assembly and computer using same |
GB9513420D0 (en) * | 1995-06-30 | 1995-09-06 | Philips Electronics Uk Ltd | Power semiconductor devices |
-
1998
- 1998-06-29 DE DE69832359T patent/DE69832359T2/de not_active Expired - Fee Related
- 1998-06-29 JP JP50678599A patent/JP4014652B2/ja not_active Expired - Lifetime
- 1998-06-29 KR KR1019997002339A patent/KR100632137B1/ko not_active IP Right Cessation
- 1998-06-29 EP EP98925881A patent/EP0927433B1/de not_active Expired - Lifetime
- 1998-06-29 WO PCT/IB1998/000994 patent/WO1999004433A2/en active IP Right Grant
- 1998-07-16 US US09/116,768 patent/US6055148A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP4014652B2 (ja) | 2007-11-28 |
EP0927433A2 (de) | 1999-07-07 |
DE69832359T2 (de) | 2006-08-03 |
WO1999004433A3 (en) | 1999-04-15 |
WO1999004433A2 (en) | 1999-01-28 |
JP2001501043A (ja) | 2001-01-23 |
KR100632137B1 (ko) | 2006-10-19 |
US6055148A (en) | 2000-04-25 |
KR20000068590A (ko) | 2000-11-25 |
EP0927433B1 (de) | 2005-11-16 |
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