DE69521095T2 - Dynamischer Speicher mit geteilten Leseverstärkern - Google Patents

Dynamischer Speicher mit geteilten Leseverstärkern

Info

Publication number
DE69521095T2
DE69521095T2 DE69521095T DE69521095T DE69521095T2 DE 69521095 T2 DE69521095 T2 DE 69521095T2 DE 69521095 T DE69521095 T DE 69521095T DE 69521095 T DE69521095 T DE 69521095T DE 69521095 T2 DE69521095 T2 DE 69521095T2
Authority
DE
Germany
Prior art keywords
data
sub
memory
arrays
sense amplifiers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69521095T
Other languages
German (de)
English (en)
Other versions
DE69521095D1 (de
Inventor
Masaki Ogihara
Kiyofumi Sakurai
Satoru Takase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69521095D1 publication Critical patent/DE69521095D1/de
Application granted granted Critical
Publication of DE69521095T2 publication Critical patent/DE69521095T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
DE69521095T 1994-09-22 1995-09-20 Dynamischer Speicher mit geteilten Leseverstärkern Expired - Lifetime DE69521095T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06227639A JP3135795B2 (ja) 1994-09-22 1994-09-22 ダイナミック型メモリ

Publications (2)

Publication Number Publication Date
DE69521095D1 DE69521095D1 (de) 2001-07-05
DE69521095T2 true DE69521095T2 (de) 2001-10-25

Family

ID=16864038

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69521095T Expired - Lifetime DE69521095T2 (de) 1994-09-22 1995-09-20 Dynamischer Speicher mit geteilten Leseverstärkern
DE69536100T Expired - Lifetime DE69536100D1 (de) 1994-09-22 1995-09-20 Dynamischer Speicher

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69536100T Expired - Lifetime DE69536100D1 (de) 1994-09-22 1995-09-20 Dynamischer Speicher

Country Status (7)

Country Link
US (1) US5586078A (enExample)
EP (2) EP0704847B1 (enExample)
JP (1) JP3135795B2 (enExample)
KR (1) KR0184091B1 (enExample)
CN (1) CN1134016C (enExample)
DE (2) DE69521095T2 (enExample)
TW (1) TW303522B (enExample)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
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US5901105A (en) * 1995-04-05 1999-05-04 Ong; Adrian E Dynamic random access memory having decoding circuitry for partial memory blocks
US5787267A (en) * 1995-06-07 1998-07-28 Monolithic System Technology, Inc. Caching method and circuit for a memory system with circuit module architecture
JPH09161476A (ja) 1995-10-04 1997-06-20 Toshiba Corp 半導体メモリ及びそのテスト回路、並びにデ−タ転送システム
JP3277108B2 (ja) * 1995-10-31 2002-04-22 インターナショナル・ビジネス・マシーンズ・コーポレーション Ｄｒａｍアレイ
TW348266B (en) 1996-03-11 1998-12-21 Toshiba Co Ltd Semiconductor memory device
JP3477018B2 (ja) * 1996-03-11 2003-12-10 株式会社東芝 半導体記憶装置
JPH09288888A (ja) 1996-04-22 1997-11-04 Mitsubishi Electric Corp 半導体記憶装置
JP2927344B2 (ja) * 1996-08-09 1999-07-28 日本電気株式会社 半導体記憶回路
US6044433A (en) * 1996-08-09 2000-03-28 Micron Technology, Inc. DRAM cache
JP3280867B2 (ja) * 1996-10-03 2002-05-13 シャープ株式会社 半導体記憶装置
US6134172A (en) * 1996-12-26 2000-10-17 Rambus Inc. Apparatus for sharing sense amplifiers between memory banks
US6075743A (en) * 1996-12-26 2000-06-13 Rambus Inc. Method and apparatus for sharing sense amplifiers between memory banks
WO1998029874A1 (en) * 1996-12-26 1998-07-09 Rambus, Inc. Method and apparatus for sharing sense amplifiers between memory banks
KR100242998B1 (ko) * 1996-12-30 2000-02-01 김영환 잡음특성을 개선한 셀 어레이 및 센스앰프의 구조
US5774408A (en) * 1997-01-28 1998-06-30 Micron Technology, Inc. DRAM architecture with combined sense amplifier pitch
US5995437A (en) * 1997-06-02 1999-11-30 Townsend And Townsend And Crew Llp Semiconductor memory and method of accessing memory arrays
US6084816A (en) 1998-04-16 2000-07-04 Kabushiki Kaisha Toshiba Semiconductor memory device
US6141286A (en) * 1998-08-21 2000-10-31 Micron Technology, Inc. Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines
US6442666B1 (en) * 1999-01-28 2002-08-27 Infineon Technologies Ag Techniques for improving memory access in a virtual memory system
KR100363079B1 (ko) * 1999-02-01 2002-11-30 삼성전자 주식회사 이웃한 메모리 뱅크들에 의해 입출력 센스앰프가 공유된 멀티 뱅크 메모리장치
US6118717A (en) * 1999-07-15 2000-09-12 Stmicroelectronics, Inc. Method and apparatus for loading directly onto bit lines in a dynamic random access memory
TW434538B (en) * 1999-07-28 2001-05-16 Sunplus Technology Co Ltd Cache data access memory structure
KR100339428B1 (ko) * 1999-09-07 2002-05-31 박종섭 불휘발성 강유전체 메모리의 셀 블록 구조
WO2001069605A1 (de) * 2000-03-13 2001-09-20 Infineon Technologies Ag Schreib-leseverstärker für eine dram-speicherzelle sowie dram-speicher
US7215595B2 (en) * 2003-11-26 2007-05-08 Infineon Technologies Ag Memory device and method using a sense amplifier as a cache
US6990036B2 (en) 2003-12-30 2006-01-24 Intel Corporation Method and apparatus for multiple row caches per bank
US7050351B2 (en) * 2003-12-30 2006-05-23 Intel Corporation Method and apparatus for multiple row caches per bank
KR100533977B1 (ko) * 2004-05-06 2005-12-07 주식회사 하이닉스반도체 셀영역의 면적을 감소시킨 반도체 메모리 장치
KR101149816B1 (ko) * 2004-05-28 2012-05-25 삼성전자주식회사 캐쉬 메모리의 캐쉬 히트 로직
DE102004059723B4 (de) * 2004-12-11 2010-02-25 Qimonda Ag Speicherbauelement mit neuer Anordnung der Bitleitungen
KR100735527B1 (ko) * 2006-02-13 2007-07-04 삼성전자주식회사 2개의 패드 행을 포함하는 반도체 메모리 장치
JP2009009633A (ja) * 2007-06-27 2009-01-15 Elpida Memory Inc 半導体記憶装置
JP5743045B2 (ja) * 2008-07-16 2015-07-01 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体記憶装置及び半導体記憶装置におけるメモリアクセス方法
JP2011146094A (ja) * 2010-01-14 2011-07-28 Renesas Electronics Corp 半導体集積回路
US10355002B2 (en) 2016-08-31 2019-07-16 Micron Technology, Inc. Memory cells, methods of forming an array of two transistor-one capacitor memory cells, and methods used in fabricating integrated circuitry
EP3507832B1 (en) 2016-08-31 2025-07-23 Micron Technology, Inc. Memory cells and memory arrays
WO2018044453A1 (en) 2016-08-31 2018-03-08 Micron Technology, Inc. Memory cells and memory arrays
WO2018044454A1 (en) 2016-08-31 2018-03-08 Micron Technology, Inc. Memory cells and memory arrays
CN109155145B (zh) 2016-08-31 2022-11-01 美光科技公司 存储器阵列
US10115438B2 (en) 2016-08-31 2018-10-30 Micron Technology, Inc. Sense amplifier constructions
KR102223551B1 (ko) 2016-08-31 2021-03-08 마이크론 테크놀로지, 인크 메모리 셀 및 메모리 어레이
CN110192280A (zh) 2017-01-12 2019-08-30 美光科技公司 存储器单元、双晶体管单电容器存储器单元阵列、形成双晶体管单电容器存储器单元阵列的方法及用于制造集成电路的方法
WO2019045882A1 (en) * 2017-08-29 2019-03-07 Micron Technology, Inc. MEMORY CIRCUITS
KR102792404B1 (ko) * 2021-08-17 2025-04-04 연세대학교 산학협력단 Ram 메모리에 기반한 pim 연산 장치 및 ram 메모리에 기반한 pim 연산 방법
GB2634496A (en) * 2023-10-04 2025-04-16 Ibm Banked sense amplifier circuit for a memory core and a memory core complex

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0814985B2 (ja) 1989-06-06 1996-02-14 富士通株式会社 半導体記憶装置
EP0428785B1 (de) * 1989-11-24 1994-02-16 Siemens Aktiengesellschaft Halbleiterspeicher
DE69114345T2 (de) * 1990-03-28 1996-05-23 Nippon Electric Co Halbleiterspeichereinrichtung.
JPH05274879A (ja) * 1992-03-26 1993-10-22 Nec Corp 半導体装置
US5384745A (en) * 1992-04-27 1995-01-24 Mitsubishi Denki Kabushiki Kaisha Synchronous semiconductor memory device
KR970004460B1 (ko) 1992-06-30 1997-03-27 니뽄 덴끼 가부시끼가이샤 반도체 메모리 회로

Also Published As

Publication number Publication date
DE69521095D1 (de) 2001-07-05
JP3135795B2 (ja) 2001-02-19
EP0704847B1 (en) 2001-05-30
TW303522B (enExample) 1997-04-21
US5586078A (en) 1996-12-17
EP0704847A1 (en) 1996-04-03
EP1081711B1 (en) 2010-09-01
EP1081711A2 (en) 2001-03-07
CN1142115A (zh) 1997-02-05
DE69536100D1 (de) 2010-10-14
JPH0896571A (ja) 1996-04-12
KR960012008A (ko) 1996-04-20
CN1134016C (zh) 2004-01-07
EP1081711A3 (en) 2008-04-09
KR0184091B1 (ko) 1999-04-15

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Legal Events

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