DE69027630D1 - Verfahren zu Herstellung eines Halbleiterbauelements mit Stufenübegang - Google Patents
Verfahren zu Herstellung eines Halbleiterbauelements mit StufenübegangInfo
- Publication number
- DE69027630D1 DE69027630D1 DE69027630T DE69027630T DE69027630D1 DE 69027630 D1 DE69027630 D1 DE 69027630D1 DE 69027630 T DE69027630 T DE 69027630T DE 69027630 T DE69027630 T DE 69027630T DE 69027630 D1 DE69027630 D1 DE 69027630D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- step transition
- transition
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 230000007704 transition Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
- H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0688—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions characterised by the particular shape of a junction between semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/965—Shaped junction formation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Thyristors (AREA)
- Bipolar Transistors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/358,057 US4927772A (en) | 1989-05-30 | 1989-05-30 | Method of making high breakdown voltage semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69027630D1 true DE69027630D1 (de) | 1996-08-08 |
DE69027630T2 DE69027630T2 (de) | 1997-02-13 |
Family
ID=23408114
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69027630T Expired - Fee Related DE69027630T2 (de) | 1989-05-30 | 1990-05-25 | Verfahren zu Herstellung eines Halbleiterbauelements mit Stufenübegang |
Country Status (5)
Country | Link |
---|---|
US (1) | US4927772A (de) |
EP (1) | EP0400934B1 (de) |
JP (1) | JP3398377B2 (de) |
KR (1) | KR0148369B1 (de) |
DE (1) | DE69027630T2 (de) |
Families Citing this family (88)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3942861A1 (de) * | 1989-12-23 | 1991-06-27 | Bosch Gmbh Robert | Verfahren zur bestimmung der lage eines pn-uebergangs |
JPH0468566A (ja) * | 1990-07-09 | 1992-03-04 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US5204273A (en) * | 1990-08-20 | 1993-04-20 | Siemens Aktiengesellschaft | Method for the manufacturing of a thyristor with defined lateral resistor |
US5246870A (en) * | 1991-02-01 | 1993-09-21 | North American Philips Corporation | Method for making an improved high voltage thin film transistor having a linear doping profile |
EP0519741B1 (de) * | 1991-06-21 | 1997-05-02 | Kabushiki Kaisha Toshiba | Halbleiteranordnung mit hoher Durchbruchsspannung |
KR100243961B1 (ko) * | 1991-07-02 | 2000-02-01 | 요트.게.아. 롤페즈 | 반도체장치 |
US5150176A (en) * | 1992-02-13 | 1992-09-22 | Motorola, Inc. | PN junction surge suppressor structure with moat |
EP0584436A1 (de) * | 1992-08-26 | 1994-03-02 | Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Verfahren zur Herstellung von vergrabenen Dotierungsgebieten mit verschiedenen Konzentrationen in monolithischen Halbleiterbauelementen |
US5426325A (en) * | 1993-08-04 | 1995-06-20 | Siliconix Incorporated | Metal crossover in high voltage IC with graduated doping control |
GB9326344D0 (en) * | 1993-12-23 | 1994-02-23 | Texas Instruments Ltd | High voltage transistor for sub micron cmos processes |
US5500377A (en) * | 1994-09-06 | 1996-03-19 | Motorola, Inc. | Method of making surge suppressor switching device |
US5798554A (en) * | 1995-02-24 | 1998-08-25 | Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | MOS-technology power device integrated structure and manufacturing process thereof |
US5967795A (en) * | 1995-08-30 | 1999-10-19 | Asea Brown Boveri Ab | SiC semiconductor device comprising a pn junction with a voltage absorbing edge |
DE19536753C1 (de) * | 1995-10-02 | 1997-02-20 | El Mos Elektronik In Mos Techn | MOS-Transistor mit hoher Ausgangsspannungsfestigkeit |
EP0768714B1 (de) * | 1995-10-09 | 2003-09-17 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe | Herstellungsverfahren für Leistungsanordnung mit Schutzring |
DE69533134T2 (de) * | 1995-10-30 | 2005-07-07 | Stmicroelectronics S.R.L., Agrate Brianza | Leistungsbauteil hoher Dichte in MOS-Technologie |
EP0772242B1 (de) * | 1995-10-30 | 2006-04-05 | STMicroelectronics S.r.l. | Leistungsbauteil in MOS-Technologie mit einer einzelnen kritischen Grösse |
EP0772244B1 (de) * | 1995-11-06 | 2000-03-22 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno | Leistungsbauelement in MOS-Technologie mit niedrigem Ausgangswiderstand und geringer Kapazität und dessen Herstellungsverfahren |
US6228719B1 (en) | 1995-11-06 | 2001-05-08 | Stmicroelectronics S.R.L. | MOS technology power device with low output resistance and low capacitance, and related manufacturing process |
DE69518653T2 (de) * | 1995-12-28 | 2001-04-19 | St Microelectronics Srl | MOS-Technologie-Leistungsanordnung in integrierter Struktur |
US5677562A (en) * | 1996-05-14 | 1997-10-14 | General Instrument Corporation Of Delaware | Planar P-N junction semiconductor structure with multilayer passivation |
US6002159A (en) * | 1996-07-16 | 1999-12-14 | Abb Research Ltd. | SiC semiconductor device comprising a pn junction with a voltage absorbing edge |
GB9700923D0 (en) * | 1997-01-17 | 1997-03-05 | Philips Electronics Nv | Semiconductor devices |
SE9700156D0 (sv) * | 1997-01-21 | 1997-01-21 | Abb Research Ltd | Junction termination for Si C Schottky diode |
JP4167313B2 (ja) * | 1997-03-18 | 2008-10-15 | 株式会社東芝 | 高耐圧電力用半導体装置 |
US6011278A (en) * | 1997-10-28 | 2000-01-04 | Philips Electronics North America Corporation | Lateral silicon carbide semiconductor device having a drift region with a varying doping level |
US6555894B2 (en) | 1998-04-20 | 2003-04-29 | Intersil Americas Inc. | Device with patterned wells and method for forming same |
EP0961325B1 (de) | 1998-05-26 | 2008-05-07 | STMicroelectronics S.r.l. | MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte |
EP1017092A1 (de) * | 1998-12-29 | 2000-07-05 | STMicroelectronics S.r.l. | Herstellung eines in einer integrierten Schaltung verwendeten Widerstands |
US6215168B1 (en) | 1999-07-21 | 2001-04-10 | Intersil Corporation | Doubly graded junction termination extension for edge passivation of semiconductor devices |
US6420757B1 (en) | 1999-09-14 | 2002-07-16 | Vram Technologies, Llc | Semiconductor diodes having low forward conduction voltage drop, low reverse current leakage, and high avalanche energy capability |
US6433370B1 (en) * | 2000-02-10 | 2002-08-13 | Vram Technologies, Llc | Method and apparatus for cylindrical semiconductor diodes |
US6642558B1 (en) * | 2000-03-20 | 2003-11-04 | Koninklijke Philips Electronics N.V. | Method and apparatus of terminating a high voltage solid state device |
DE10051909B4 (de) * | 2000-10-19 | 2007-03-22 | Infineon Technologies Ag | Randabschluss für Hochvolt-Halbleiterbauelement und Verfahren zum Herstellen eines Isolationstrenches in einem Halbleiterkörper für solchen Randabschluss |
US6580150B1 (en) | 2000-11-13 | 2003-06-17 | Vram Technologies, Llc | Vertical junction field effect semiconductor diodes |
US6537921B2 (en) | 2001-05-23 | 2003-03-25 | Vram Technologies, Llc | Vertical metal oxide silicon field effect semiconductor diodes |
US7692211B1 (en) * | 2001-07-03 | 2010-04-06 | Silicon Power Corporation | Super GTO-based power blocks |
US7033950B2 (en) * | 2001-12-19 | 2006-04-25 | Auburn University | Graded junction termination extensions for electronic devices |
US6958275B2 (en) * | 2003-03-11 | 2005-10-25 | Integrated Discrete Devices, Llc | MOSFET power transistors and methods |
US7037814B1 (en) * | 2003-10-10 | 2006-05-02 | National Semiconductor Corporation | Single mask control of doping levels |
US20050259368A1 (en) * | 2003-11-12 | 2005-11-24 | Ted Letavic | Method and apparatus of terminating a high voltage solid state device |
DE102004012884B4 (de) * | 2004-03-16 | 2011-07-21 | IXYS Semiconductor GmbH, 68623 | Leistungs-Halbleiterbauelement in Planartechnik |
US7144797B2 (en) * | 2004-09-24 | 2006-12-05 | Rensselaer Polytechnic Institute | Semiconductor device having multiple-zone junction termination extension, and method for fabricating the same |
US7304363B1 (en) | 2004-11-26 | 2007-12-04 | United States Of America As Represented By The Secretary Of The Army | Interacting current spreader and junction extender to increase the voltage blocked in the off state of a high power semiconductor device |
JP4186919B2 (ja) | 2004-12-07 | 2008-11-26 | 三菱電機株式会社 | 半導体装置 |
DE102005031908B3 (de) * | 2005-07-07 | 2006-10-19 | Infineon Technologies Ag | Halbleiterbauelement mit einer Kanalstoppzone |
US8192905B2 (en) * | 2006-04-20 | 2012-06-05 | Ricoh Company, Ltd. | Electrophotographic photoconductor, image forming apparatus, and process cartridge |
US7541660B2 (en) * | 2006-04-20 | 2009-06-02 | Infineon Technologies Austria Ag | Power semiconductor device |
US7586156B2 (en) * | 2006-07-26 | 2009-09-08 | Fairchild Semiconductor Corporation | Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device |
US7728402B2 (en) * | 2006-08-01 | 2010-06-01 | Cree, Inc. | Semiconductor devices including schottky diodes with controlled breakdown |
US8432012B2 (en) | 2006-08-01 | 2013-04-30 | Cree, Inc. | Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same |
JP5645404B2 (ja) | 2006-08-17 | 2014-12-24 | クリー インコーポレイテッドCree Inc. | 高電力絶縁ゲート・バイポーラ・トランジスタ |
JP2008103529A (ja) * | 2006-10-19 | 2008-05-01 | Toyota Central R&D Labs Inc | 半導体装置 |
US8835987B2 (en) * | 2007-02-27 | 2014-09-16 | Cree, Inc. | Insulated gate bipolar transistors including current suppressing layers |
US7790589B2 (en) * | 2007-04-30 | 2010-09-07 | Nxp B.V. | Method of providing enhanced breakdown by diluted doping profiles in high-voltage transistors |
JP5372002B2 (ja) * | 2007-11-09 | 2013-12-18 | クリー インコーポレイテッド | メサ構造とメサ段差を含むバッファ層とを備えた電力半導体デバイス |
US9640609B2 (en) * | 2008-02-26 | 2017-05-02 | Cree, Inc. | Double guard ring edge termination for silicon carbide devices |
US8232558B2 (en) | 2008-05-21 | 2012-07-31 | Cree, Inc. | Junction barrier Schottky diodes with current surge capability |
US8097919B2 (en) * | 2008-08-11 | 2012-01-17 | Cree, Inc. | Mesa termination structures for power semiconductor devices including mesa step buffers |
US8497552B2 (en) * | 2008-12-01 | 2013-07-30 | Cree, Inc. | Semiconductor devices with current shifting regions and related methods |
US8106487B2 (en) | 2008-12-23 | 2012-01-31 | Pratt & Whitney Rocketdyne, Inc. | Semiconductor device having an inorganic coating layer applied over a junction termination extension |
US8294507B2 (en) | 2009-05-08 | 2012-10-23 | Cree, Inc. | Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits |
US8637386B2 (en) * | 2009-05-12 | 2014-01-28 | Cree, Inc. | Diffused junction termination structures for silicon carbide devices and methods of fabricating silicon carbide devices incorporating same |
US8193848B2 (en) | 2009-06-02 | 2012-06-05 | Cree, Inc. | Power switching devices having controllable surge current capabilities |
US8629509B2 (en) * | 2009-06-02 | 2014-01-14 | Cree, Inc. | High voltage insulated gate bipolar transistors with minority carrier diverter |
US8541787B2 (en) * | 2009-07-15 | 2013-09-24 | Cree, Inc. | High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability |
US8354690B2 (en) | 2009-08-31 | 2013-01-15 | Cree, Inc. | Solid-state pinch off thyristor circuits |
US7964485B1 (en) * | 2009-10-23 | 2011-06-21 | National Semiconductor Corporation | Method of forming a region of graded doping concentration in a semiconductor device and related apparatus |
US9117739B2 (en) | 2010-03-08 | 2015-08-25 | Cree, Inc. | Semiconductor devices with heterojunction barrier regions and methods of fabricating same |
JP5072991B2 (ja) * | 2010-03-10 | 2012-11-14 | 株式会社東芝 | 半導体装置 |
TWI405250B (zh) * | 2010-04-13 | 2013-08-11 | Richtek Technology Corp | 半導體元件雜質濃度分布控制方法與相關半導體元件 |
US8415671B2 (en) | 2010-04-16 | 2013-04-09 | Cree, Inc. | Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices |
US8461620B2 (en) | 2010-05-21 | 2013-06-11 | Applied Pulsed Power, Inc. | Laser pumping of thyristors for fast high current rise-times |
US8803277B2 (en) | 2011-02-10 | 2014-08-12 | Cree, Inc. | Junction termination structures including guard ring extensions and methods of fabricating electronic devices incorporating same |
US9318623B2 (en) | 2011-04-05 | 2016-04-19 | Cree, Inc. | Recessed termination structures and methods of fabricating electronic devices including recessed termination structures |
US9673283B2 (en) | 2011-05-06 | 2017-06-06 | Cree, Inc. | Power module for supporting high current densities |
US9142662B2 (en) | 2011-05-06 | 2015-09-22 | Cree, Inc. | Field effect transistor devices with low source resistance |
US9029945B2 (en) | 2011-05-06 | 2015-05-12 | Cree, Inc. | Field effect transistor devices with low source resistance |
FR2977072A1 (fr) * | 2011-06-27 | 2012-12-28 | St Microelectronics Crolles 2 | Procede de dopage d'un substrat semi-conducteur |
US9373617B2 (en) | 2011-09-11 | 2016-06-21 | Cree, Inc. | High current, low switching loss SiC power module |
US8680587B2 (en) | 2011-09-11 | 2014-03-25 | Cree, Inc. | Schottky diode |
US8664665B2 (en) | 2011-09-11 | 2014-03-04 | Cree, Inc. | Schottky diode employing recesses for elements of junction barrier array |
US8618582B2 (en) | 2011-09-11 | 2013-12-31 | Cree, Inc. | Edge termination structure employing recesses for edge termination elements |
US9640617B2 (en) | 2011-09-11 | 2017-05-02 | Cree, Inc. | High performance power module |
EP2845219B1 (de) | 2012-05-02 | 2019-07-17 | Elmos Semiconductor Aktiengesellschaft | Verfahren zur herstellung eines pmos-transistors mit niedriger schwellspannung |
US9899477B2 (en) | 2014-07-18 | 2018-02-20 | Infineon Technologies Americas Corp. | Edge termination structure having a termination charge region below a recessed field oxide region |
JPWO2021107037A1 (de) | 2019-11-28 | 2021-06-03 | ||
US11817478B2 (en) | 2020-12-23 | 2023-11-14 | Semiconductor Components Industries, Llc | Termination structures with reduced dynamic output capacitance loss |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4374389A (en) * | 1978-06-06 | 1983-02-15 | General Electric Company | High breakdown voltage semiconductor device |
IT1214805B (it) * | 1984-08-21 | 1990-01-18 | Ates Componenti Elettron | Spositivi a semiconduttore con giunprocesso per la fabbricazione di dizioni planari a concentrazione di carica variabile e ad altissima tensione di breakdown |
DE3581348D1 (de) * | 1984-09-28 | 1991-02-21 | Siemens Ag | Verfahren zum herstellen eines pn-uebergangs mit hoher durchbruchsspannung. |
US4648174A (en) * | 1985-02-05 | 1987-03-10 | General Electric Company | Method of making high breakdown voltage semiconductor device |
GB2193596A (en) * | 1986-08-08 | 1988-02-10 | Philips Electronic Associated | A semiconductor diode |
-
1989
- 1989-05-30 US US07/358,057 patent/US4927772A/en not_active Expired - Lifetime
-
1990
- 1990-05-25 DE DE69027630T patent/DE69027630T2/de not_active Expired - Fee Related
- 1990-05-25 EP EP90305768A patent/EP0400934B1/de not_active Expired - Lifetime
- 1990-05-29 KR KR1019900007741A patent/KR0148369B1/ko not_active IP Right Cessation
- 1990-05-30 JP JP13867790A patent/JP3398377B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP3398377B2 (ja) | 2003-04-21 |
KR0148369B1 (ko) | 1998-12-01 |
EP0400934A3 (de) | 1991-04-03 |
JPH0394469A (ja) | 1991-04-19 |
KR900019147A (ko) | 1990-12-24 |
EP0400934B1 (de) | 1996-07-03 |
DE69027630T2 (de) | 1997-02-13 |
US4927772A (en) | 1990-05-22 |
EP0400934A2 (de) | 1990-12-05 |
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