DE69028397D1 - Verfahren zur herstellung einer halbleitervorrichtung - Google Patents
Verfahren zur herstellung einer halbleitervorrichtungInfo
- Publication number
- DE69028397D1 DE69028397D1 DE69028397T DE69028397T DE69028397D1 DE 69028397 D1 DE69028397 D1 DE 69028397D1 DE 69028397 T DE69028397 T DE 69028397T DE 69028397 T DE69028397 T DE 69028397T DE 69028397 D1 DE69028397 D1 DE 69028397D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/136—Resistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/909—Controlled atmosphere
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP01337007A JP3082923B2 (ja) | 1989-12-26 | 1989-12-26 | 半導体装置の製法 |
PCT/JP1990/001698 WO1991010262A1 (en) | 1989-12-26 | 1990-12-26 | Method of manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69028397D1 true DE69028397D1 (de) | 1996-10-10 |
DE69028397T2 DE69028397T2 (de) | 1997-04-10 |
Family
ID=18304603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69028397T Expired - Fee Related DE69028397T2 (de) | 1989-12-26 | 1990-12-26 | Verfahren zur herstellung einer halbleitervorrichtung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5356825A (de) |
EP (1) | EP0463174B1 (de) |
JP (2) | JP3082923B2 (de) |
DE (1) | DE69028397T2 (de) |
WO (1) | WO1991010262A1 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5374833A (en) * | 1990-03-05 | 1994-12-20 | Vlsi Technology, Inc. | Structure for suppression of field inversion caused by charge build-up in the dielectric |
JP2748070B2 (ja) * | 1992-05-20 | 1998-05-06 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
KR950034754A (ko) * | 1994-05-06 | 1995-12-28 | 윌리엄 이. 힐러 | 폴리실리콘 저항을 형성하는 방법 및 이 방법으로부터 제조된 저항 |
US5646057A (en) * | 1994-07-25 | 1997-07-08 | Taiwan Semiconductor Manufacturing Company | Method for a MOS device manufacturing |
US5872381A (en) * | 1996-05-23 | 1999-02-16 | Sony Corporation | Semiconductor device and its manufacturing method |
KR100553615B1 (ko) * | 1997-01-31 | 2007-04-11 | 산요덴키가부시키가이샤 | 반도체소자의제조방법 |
US5966624A (en) * | 1997-07-29 | 1999-10-12 | Siemens Aktiengesellschaft | Method of manufacturing a semiconductor structure having a crystalline layer |
US6100153A (en) * | 1998-01-20 | 2000-08-08 | International Business Machines Corporation | Reliable diffusion resistor and diffusion capacitor |
JPH11330385A (ja) * | 1998-05-20 | 1999-11-30 | Mitsumi Electric Co Ltd | Cmosデバイス |
GB2342776B (en) * | 1998-07-06 | 2000-12-20 | United Microelectronics Corp | Method of fabricating resistors in integrated circuits |
TW409419B (en) | 1998-07-06 | 2000-10-21 | United Microelectronics Corp | Manufacture method of integrated circuit resistor |
US6140198A (en) * | 1998-11-06 | 2000-10-31 | United Microelectronics Corp. | Method of fabricating load resistor |
JP3449535B2 (ja) * | 1999-04-22 | 2003-09-22 | ソニー株式会社 | 半導体素子の製造方法 |
JP2001217317A (ja) * | 2000-02-07 | 2001-08-10 | Sony Corp | 半導体装置およびその製造方法 |
US8679936B1 (en) * | 2005-05-26 | 2014-03-25 | National Semiconductor Corporation | Manufacturing resistors with tightened resistivity distribution in semiconductor integrated circuits |
US9634081B2 (en) * | 2013-10-08 | 2017-04-25 | Infineon Technologies Ag | Methods for producing polysilicon resistors |
JP6267987B2 (ja) * | 2014-02-13 | 2018-01-24 | エスアイアイ・セミコンダクタ株式会社 | 半導体装置 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5444880A (en) * | 1977-09-16 | 1979-04-09 | Nec Corp | Manufacture of semiconductor device |
JPS558026A (en) * | 1978-06-30 | 1980-01-21 | Matsushita Electric Ind Co Ltd | Semi-conductor device manufacturing method |
FR2534415A1 (fr) * | 1982-10-07 | 1984-04-13 | Cii Honeywell Bull | Procede de fabrication de resistances electriques dans un materiau semi-conducteur polycristallin et dispositif a circuits integres resultant |
JPS60109260A (ja) * | 1983-11-15 | 1985-06-14 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 補償された多結晶シリコン抵抗素子 |
JPS6196755A (ja) * | 1984-10-17 | 1986-05-15 | Nec Corp | 半導体装置及びその製造方法 |
JPS6196756A (ja) * | 1984-10-17 | 1986-05-15 | Nec Corp | 半導体装置及びその製造方法 |
JPS61220452A (ja) * | 1985-03-27 | 1986-09-30 | Nec Corp | 半導体装置の製造方法 |
JPS63151064A (ja) * | 1986-12-16 | 1988-06-23 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPS63155755A (ja) * | 1986-12-19 | 1988-06-28 | Sony Corp | 半導体装置の製造方法 |
US4762801A (en) * | 1987-02-20 | 1988-08-09 | National Semiconductor Corporation | Method of fabricating polycrystalline silicon resistors having desired temperature coefficients |
JPS63248157A (ja) * | 1987-04-02 | 1988-10-14 | Nec Corp | 半導体装置の製造方法 |
KR900005038B1 (ko) * | 1987-07-31 | 1990-07-18 | 삼성전자 주식회사 | 고저항 다결정 실리콘의 제조방법 |
-
1989
- 1989-12-26 JP JP01337007A patent/JP3082923B2/ja not_active Expired - Lifetime
-
1990
- 1990-12-26 EP EP91901552A patent/EP0463174B1/de not_active Expired - Lifetime
- 1990-12-26 DE DE69028397T patent/DE69028397T2/de not_active Expired - Fee Related
- 1990-12-26 US US07/752,592 patent/US5356825A/en not_active Expired - Fee Related
- 1990-12-26 WO PCT/JP1990/001698 patent/WO1991010262A1/ja active IP Right Grant
-
1998
- 1998-07-30 JP JP10215603A patent/JPH1197451A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE69028397T2 (de) | 1997-04-10 |
EP0463174A1 (de) | 1992-01-02 |
US5356825A (en) | 1994-10-18 |
JPH1197451A (ja) | 1999-04-09 |
WO1991010262A1 (en) | 1991-07-11 |
EP0463174A4 (en) | 1992-04-15 |
EP0463174B1 (de) | 1996-09-04 |
JPH03196668A (ja) | 1991-08-28 |
JP3082923B2 (ja) | 2000-09-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69015216D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung. | |
DE69032773D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung | |
DE69636338D1 (de) | Verfahren zur herstellung einer halbleitervorrichtung | |
DE68907507D1 (de) | Verfahren zur herstellung einer halbleitervorrichtung. | |
DE68929150D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung | |
DE69126586D1 (de) | Verfahren zur Herstellung einer Vorrichtung | |
DE69232432D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE69231803D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE69023558D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung. | |
DE69836401D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE69422265D1 (de) | Verfahren zur Herstellung einer strahlungsgeschützten Silizium-auf-Isolator Halbleiteranordnung | |
DE3485924D1 (de) | Verfahren zur herstellung einer halbleiterlaservorrichtung. | |
DE69434695D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE68924366D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung. | |
DE69317800D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE69330980D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE69029430D1 (de) | Verfahren zur Herstellung eines CMOS Halbleiterbauelements | |
AT399634B (de) | Verfahren zur herstellung einer süssware | |
DE69323979D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung | |
DE69028397D1 (de) | Verfahren zur herstellung einer halbleitervorrichtung | |
DE69016955D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung. | |
DE69030709D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE3582143D1 (de) | Verfahren zur herstellung einer halbleitervorrichtung. | |
DE69024731D1 (de) | Verfahren zur Herstellung einer plastikumhüllten Halbleiteranordnung | |
DE69031712D1 (de) | Verfahren zur Herstellung eines Halbleiterbauelementes |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |