KR900011015A - 반도체 장치의 제조방법 - Google Patents

반도체 장치의 제조방법

Info

Publication number
KR900011015A
KR900011015A KR1019890017036A KR890017036A KR900011015A KR 900011015 A KR900011015 A KR 900011015A KR 1019890017036 A KR1019890017036 A KR 1019890017036A KR 890017036 A KR890017036 A KR 890017036A KR 900011015 A KR900011015 A KR 900011015A
Authority
KR
South Korea
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
KR1019890017036A
Other languages
English (en)
Other versions
KR930003555B1 (ko
Inventor
유타까 요시자와
아키라 우에무라
Original Assignee
산켄 덴끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 산켄 덴끼 가부시끼가이샤 filed Critical 산켄 덴끼 가부시끼가이샤
Publication of KR900011015A publication Critical patent/KR900011015A/ko
Application granted granted Critical
Publication of KR930003555B1 publication Critical patent/KR930003555B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/221Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities of killers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/038Diffusions-staged
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/062Gold diffusion
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/904Charge carrier lifetime control

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thyristors (AREA)
  • Bipolar Transistors (AREA)
KR1019890017036A 1988-12-16 1989-11-23 반도체 장치의 제조방법 KR930003555B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63-317711 1988-12-16
JP31771188 1988-12-16

Publications (2)

Publication Number Publication Date
KR900011015A true KR900011015A (ko) 1990-07-11
KR930003555B1 KR930003555B1 (ko) 1993-05-06

Family

ID=18091180

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890017036A KR930003555B1 (ko) 1988-12-16 1989-11-23 반도체 장치의 제조방법

Country Status (2)

Country Link
US (1) US4963509A (ko)
KR (1) KR930003555B1 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5130269A (en) * 1988-04-27 1992-07-14 Fujitsu Limited Hetero-epitaxially grown compound semiconductor substrate and a method of growing the same
US5368880A (en) * 1989-12-06 1994-11-29 Westinghouse Electric Corporation Eutectic bond and method of gold/titanium eutectic bonding of cadmium telluride to sapphire
DE4236300A1 (de) * 1992-10-28 1994-05-11 Telefunken Microelectron Verfahren zur Herstellung von Halbleiterbauelementen mit geringer Schaltzeit
JP4653273B2 (ja) * 1999-11-05 2011-03-16 富士電機システムズ株式会社 半導体装置、および、その製造方法
US7092609B2 (en) * 2002-01-31 2006-08-15 Intel Corporation Method to realize fast silicon-on-insulator (SOI) optical device
JP6042658B2 (ja) * 2011-09-07 2016-12-14 トヨタ自動車株式会社 SiC半導体素子の製造方法
CN105814694B (zh) 2014-10-03 2019-03-08 富士电机株式会社 半导体装置以及半导体装置的制造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL122120C (ko) * 1959-06-30
US3473976A (en) * 1966-03-31 1969-10-21 Ibm Carrier lifetime killer doping process for semiconductor structures and the product formed thereby
US3440113A (en) * 1966-09-19 1969-04-22 Westinghouse Electric Corp Process for diffusing gold into semiconductor material
US3645808A (en) * 1967-07-31 1972-02-29 Hitachi Ltd Method for fabricating a semiconductor-integrated circuit
US3864174A (en) * 1973-01-22 1975-02-04 Nobuyuki Akiyama Method for manufacturing semiconductor device
US3941625A (en) * 1973-10-11 1976-03-02 General Electric Company Glass passivated gold diffused SCR pellet and method for making
US3943013A (en) * 1973-10-11 1976-03-09 General Electric Company Triac with gold diffused boundary
JPS5455372A (en) * 1977-10-12 1979-05-02 Nec Corp Production of semiconductor device

Also Published As

Publication number Publication date
KR930003555B1 (ko) 1993-05-06
US4963509A (en) 1990-10-16

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A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 19980410

Year of fee payment: 6

LAPS Lapse due to unpaid annual fee