DE69033794T2 - Halbleiteranordnung - Google Patents

Halbleiteranordnung

Info

Publication number
DE69033794T2
DE69033794T2 DE69033794T DE69033794T DE69033794T2 DE 69033794 T2 DE69033794 T2 DE 69033794T2 DE 69033794 T DE69033794 T DE 69033794T DE 69033794 T DE69033794 T DE 69033794T DE 69033794 T2 DE69033794 T2 DE 69033794T2
Authority
DE
Germany
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69033794T
Other languages
English (en)
Other versions
DE69033794D1 (de
Inventor
Katsuya Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69033794D1 publication Critical patent/DE69033794D1/de
Application granted granted Critical
Publication of DE69033794T2 publication Critical patent/DE69033794T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/34—Source electrode or drain electrode programmed
DE69033794T 1989-03-20 1990-03-20 Halbleiteranordnung Expired - Fee Related DE69033794T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1068826A JP2647188B2 (ja) 1989-03-20 1989-03-20 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69033794D1 DE69033794D1 (de) 2001-10-18
DE69033794T2 true DE69033794T2 (de) 2002-05-02

Family

ID=13384901

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69033794T Expired - Fee Related DE69033794T2 (de) 1989-03-20 1990-03-20 Halbleiteranordnung

Country Status (5)

Country Link
US (1) US5164814A (de)
EP (1) EP0388891B1 (de)
JP (1) JP2647188B2 (de)
KR (1) KR930009018B1 (de)
DE (1) DE69033794T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2911980B2 (ja) * 1990-08-18 1999-06-28 日本電気株式会社 半導体集積回路装置
JP2681427B2 (ja) * 1992-01-06 1997-11-26 三菱電機株式会社 半導体装置
US5455461A (en) * 1992-09-21 1995-10-03 Fujitsu Limited Semiconductor device having reformed pad
US5244299A (en) * 1992-12-04 1993-09-14 Chu Wei Y Apparatus used in writing and massaging alternatively
JPH06333944A (ja) * 1993-05-25 1994-12-02 Nippondenso Co Ltd 半導体装置
JPH07307388A (ja) * 1994-02-04 1995-11-21 Advanced Micro Devices Inc トランジスタのアレイおよびその形成方法
US5985717A (en) * 1996-05-06 1999-11-16 United Microelectronics Corp. Method of fabricating a semiconductor device
US6111756A (en) * 1998-09-11 2000-08-29 Fujitsu Limited Universal multichip interconnect systems
US6355550B1 (en) 2000-05-19 2002-03-12 Motorola, Inc. Ultra-late programming ROM and method of manufacture
US6570235B2 (en) * 2001-03-20 2003-05-27 Macronix International Co., Ltd. Cells array of mask read only memory
US7053447B2 (en) * 2004-09-14 2006-05-30 Infineon Technologies Ag Charge-trapping semiconductor memory device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59198733A (ja) * 1983-04-26 1984-11-10 Mitsubishi Electric Corp 半導体集積回路装置
JPS62260340A (ja) * 1986-05-06 1987-11-12 Toshiba Corp 半導体装置の製造方法
JPS62263653A (ja) * 1986-05-12 1987-11-16 Hitachi Ltd 半導体集積回路装置の製造方法
JPH084089B2 (ja) * 1986-12-22 1996-01-17 株式会社日立製作所 Ｉｃ素子並びにｉｃ素子における配線接続方法
JPS6317543A (ja) * 1986-07-10 1988-01-25 Nec Corp 配線修正方法
JPS6370440A (ja) * 1986-09-11 1988-03-30 Mitsubishi Electric Corp 半導体集積回路装置
JPS6371538U (de) * 1986-10-30 1988-05-13
JPS63278256A (ja) * 1987-05-09 1988-11-15 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2527183B2 (ja) * 1987-05-20 1996-08-21 株式会社日立製作所 処理方法及び半導体装置の配線修正方法

Also Published As

Publication number Publication date
EP0388891B1 (de) 2001-09-12
US5164814A (en) 1992-11-17
EP0388891A3 (de) 1991-11-21
KR900015301A (ko) 1990-10-26
EP0388891A2 (de) 1990-09-26
JP2647188B2 (ja) 1997-08-27
DE69033794D1 (de) 2001-10-18
JPH02246364A (ja) 1990-10-02
KR930009018B1 (ko) 1993-09-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee