KR870009466A - 패케이지 구조를 갖는 반도체장치 제조방법 - Google Patents
패케이지 구조를 갖는 반도체장치 제조방법Info
- Publication number
- KR870009466A KR870009466A KR1019870002470A KR870002470A KR870009466A KR 870009466 A KR870009466 A KR 870009466A KR 1019870002470 A KR1019870002470 A KR 1019870002470A KR 870002470 A KR870002470 A KR 870002470A KR 870009466 A KR870009466 A KR 870009466A
- Authority
- KR
- South Korea
- Prior art keywords
- manufacturing
- semiconductor device
- package structure
- package
- semiconductor
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61-59481 | 1986-03-19 | ||
JP61059481A JPS62217645A (ja) | 1986-03-19 | 1986-03-19 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870009466A true KR870009466A (ko) | 1987-10-26 |
KR900003829B1 KR900003829B1 (ko) | 1990-06-02 |
Family
ID=13114541
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870002470A KR900003829B1 (ko) | 1986-03-19 | 1987-03-19 | 패케이지 구조를 갖는 반도체장치 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US4999319A (ko) |
EP (1) | EP0238418B1 (ko) |
JP (1) | JPS62217645A (ko) |
KR (1) | KR900003829B1 (ko) |
DE (1) | DE3782071T2 (ko) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5264393A (en) * | 1988-11-25 | 1993-11-23 | Fuji Photo Film Co., Ltd. | Solid state image pickup device and method of manufacturing the same |
US5098864A (en) * | 1989-11-29 | 1992-03-24 | Olin Corporation | Process for manufacturing a metal pin grid array package |
US5086018A (en) * | 1991-05-02 | 1992-02-04 | International Business Machines Corporation | Method of making a planarized thin film covered wire bonded semiconductor package |
US5273940A (en) * | 1992-06-15 | 1993-12-28 | Motorola, Inc. | Multiple chip package with thinned semiconductor chips |
JP2888040B2 (ja) * | 1992-07-10 | 1999-05-10 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US5834339A (en) | 1996-03-07 | 1998-11-10 | Tessera, Inc. | Methods for providing void-free layers for semiconductor assemblies |
US5776796A (en) * | 1994-05-19 | 1998-07-07 | Tessera, Inc. | Method of encapsulating a semiconductor package |
US5663106A (en) * | 1994-05-19 | 1997-09-02 | Tessera, Inc. | Method of encapsulating die and chip carrier |
JP3199963B2 (ja) * | 1994-10-06 | 2001-08-20 | 株式会社東芝 | 半導体装置の製造方法 |
US5929517A (en) * | 1994-12-29 | 1999-07-27 | Tessera, Inc. | Compliant integrated circuit package and method of fabricating the same |
US5723787A (en) * | 1996-03-04 | 1998-03-03 | Alliedsignal, Inc. | Accelerometer mounting system |
US6083768A (en) * | 1996-09-06 | 2000-07-04 | Micron Technology, Inc. | Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components |
US6214640B1 (en) | 1999-02-10 | 2001-04-10 | Tessera, Inc. | Method of manufacturing a plurality of semiconductor packages |
AU2002337834A1 (en) * | 2001-10-09 | 2003-04-22 | Tessera, Inc. | Stacked packages |
US6977440B2 (en) * | 2001-10-09 | 2005-12-20 | Tessera, Inc. | Stacked packages |
US7335995B2 (en) * | 2001-10-09 | 2008-02-26 | Tessera, Inc. | Microelectronic assembly having array including passive elements and interconnects |
CN102779910A (zh) * | 2011-05-10 | 2012-11-14 | 弘凯光电股份有限公司 | 发光二极管封装方法 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3706840A (en) * | 1971-05-10 | 1972-12-19 | Intersil Inc | Semiconductor device packaging |
JPS50144758A (ko) * | 1974-05-09 | 1975-11-20 | ||
US4218701A (en) * | 1978-07-24 | 1980-08-19 | Citizen Watch Co., Ltd. | Package for an integrated circuit having a container with support bars |
JPS5632736A (en) * | 1979-08-24 | 1981-04-02 | Nec Corp | Sealing method of hybrid integrated circuit device |
DE3040867C2 (de) * | 1980-10-30 | 1985-01-17 | Telefunken electronic GmbH, 7100 Heilbronn | Verfahren zur Herstellung einer Halbleiteranordnung |
JPS5814545A (ja) * | 1981-07-17 | 1983-01-27 | Citizen Watch Co Ltd | Icの実装方法 |
JPS5880845A (ja) * | 1981-11-09 | 1983-05-16 | Hitachi Ltd | 固体撮像装置の製造方法 |
US4477828A (en) * | 1982-10-12 | 1984-10-16 | Scherer Jeremy D | Microcircuit package and sealing method |
JPS59145534A (ja) * | 1983-02-09 | 1984-08-21 | Matsushita Electric Ind Co Ltd | 半導体デバイスの封止方法 |
JPS59159547A (ja) * | 1983-03-03 | 1984-09-10 | Matsushita Electric Ind Co Ltd | 半導体素子の保護方法 |
JPS6017936A (ja) * | 1983-07-12 | 1985-01-29 | Sumitomo Bakelite Co Ltd | 半導体封止用樹脂組成物 |
US4818812A (en) * | 1983-08-22 | 1989-04-04 | International Business Machines Corporation | Sealant for integrated circuit modules, polyester suitable therefor and preparation of polyester |
JPS6080258A (ja) * | 1983-10-07 | 1985-05-08 | Fuji Xerox Co Ltd | 樹脂封止型半導体装置の製造方法 |
JPS60111431A (ja) * | 1983-11-21 | 1985-06-17 | Toshiba Corp | 電子部品の製造方法 |
JPS60154543A (ja) * | 1984-01-24 | 1985-08-14 | Nec Corp | 合成樹脂基板を用いた半導体装置 |
JPS60222450A (ja) * | 1984-04-20 | 1985-11-07 | Mitsui Toatsu Chem Inc | リジンエステルトリイソシアナ−トの製造方法 |
JPS6153321A (ja) * | 1984-08-23 | 1986-03-17 | Toshiba Corp | 半導体封止用エポキシ樹脂組成物及びそれを用いた樹脂封止型半導体装置 |
-
1986
- 1986-03-19 JP JP61059481A patent/JPS62217645A/ja active Granted
-
1987
- 1987-03-19 EP EP87400612A patent/EP0238418B1/en not_active Expired - Lifetime
- 1987-03-19 KR KR1019870002470A patent/KR900003829B1/ko not_active IP Right Cessation
- 1987-03-19 DE DE8787400612T patent/DE3782071T2/de not_active Expired - Fee Related
-
1989
- 1989-04-06 US US07/333,810 patent/US4999319A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0528906B2 (ko) | 1993-04-27 |
KR900003829B1 (ko) | 1990-06-02 |
EP0238418B1 (en) | 1992-10-07 |
EP0238418A2 (en) | 1987-09-23 |
JPS62217645A (ja) | 1987-09-25 |
EP0238418A3 (en) | 1990-05-16 |
US4999319A (en) | 1991-03-12 |
DE3782071D1 (de) | 1992-11-12 |
DE3782071T2 (de) | 1993-02-11 |
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