DE60138387D1 - Verfahren zur herstellung eines dünnfilmtransistors - Google Patents

Verfahren zur herstellung eines dünnfilmtransistors

Info

Publication number
DE60138387D1
DE60138387D1 DE60138387T DE60138387T DE60138387D1 DE 60138387 D1 DE60138387 D1 DE 60138387D1 DE 60138387 T DE60138387 T DE 60138387T DE 60138387 T DE60138387 T DE 60138387T DE 60138387 D1 DE60138387 D1 DE 60138387D1
Authority
DE
Germany
Prior art keywords
film transistor
producing
thin film
thin
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60138387T
Other languages
English (en)
Inventor
Hiroshi Tanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE60138387D1 publication Critical patent/DE60138387D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78609Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
DE60138387T 2000-06-23 2001-05-25 Verfahren zur herstellung eines dünnfilmtransistors Expired - Lifetime DE60138387D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000188727A JP4389359B2 (ja) 2000-06-23 2000-06-23 薄膜トランジスタ及びその製造方法
PCT/JP2001/004402 WO2001099199A1 (fr) 2000-06-23 2001-05-25 Transistor a couches minces et procede de production

Publications (1)

Publication Number Publication Date
DE60138387D1 true DE60138387D1 (de) 2009-05-28

Family

ID=18688467

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60138387T Expired - Lifetime DE60138387D1 (de) 2000-06-23 2001-05-25 Verfahren zur herstellung eines dünnfilmtransistors

Country Status (8)

Country Link
US (1) US7052944B2 (de)
EP (1) EP1304746B1 (de)
JP (1) JP4389359B2 (de)
KR (1) KR100517037B1 (de)
AT (1) ATE429036T1 (de)
DE (1) DE60138387D1 (de)
TW (1) TWI283069B (de)
WO (1) WO2001099199A1 (de)

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US7300829B2 (en) * 2003-06-02 2007-11-27 Applied Materials, Inc. Low temperature process for TFT fabrication
US6756643B1 (en) * 2003-06-12 2004-06-29 Advanced Micro Devices, Inc. Dual silicon layer for chemical mechanical polishing planarization
JP4219838B2 (ja) * 2004-03-24 2009-02-04 シャープ株式会社 半導体基板の製造方法、並びに半導体装置の製造方法
TWI247930B (en) * 2004-08-10 2006-01-21 Ind Tech Res Inst Mask reduction of LTPS-TFT array by use of photo-sensitive low-k dielectrics
KR100719555B1 (ko) * 2005-07-20 2007-05-17 삼성에스디아이 주식회사 박막 트랜지스터, 그 박막 트랜지스터를 포함한 유기 발광표시장치 및 그 박막 트랜지스터에 이용되는 다결정 반도체결정화 방법
WO2007046290A1 (en) * 2005-10-18 2007-04-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8067772B2 (en) 2006-12-05 2011-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7968884B2 (en) * 2006-12-05 2011-06-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP5337380B2 (ja) * 2007-01-26 2013-11-06 株式会社半導体エネルギー研究所 半導体装置及びその作製方法
US7972943B2 (en) * 2007-03-02 2011-07-05 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
JP5384088B2 (ja) * 2008-11-28 2014-01-08 株式会社ジャパンディスプレイ 表示装置
TWI463658B (zh) * 2009-03-20 2014-12-01 Unimicron Technology Corp 電晶體裝置
JP7233639B2 (ja) * 2019-04-19 2023-03-07 日新電機株式会社 シリコン膜の成膜方法

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US4467519A (en) * 1982-04-01 1984-08-28 International Business Machines Corporation Process for fabricating polycrystalline silicon film resistors
US4579600A (en) * 1983-06-17 1986-04-01 Texas Instruments Incorporated Method of making zero temperature coefficient of resistance resistors
JPS60109282A (ja) * 1983-11-17 1985-06-14 Seiko Epson Corp 半導体装置
JP2633541B2 (ja) * 1987-01-07 1997-07-23 株式会社東芝 半導体メモリ装置の製造方法
JPH0616556B2 (ja) * 1987-04-14 1994-03-02 株式会社東芝 半導体装置
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Also Published As

Publication number Publication date
EP1304746A1 (de) 2003-04-23
KR100517037B1 (ko) 2005-09-26
KR20030028489A (ko) 2003-04-08
TWI283069B (en) 2007-06-21
JP2002009295A (ja) 2002-01-11
EP1304746B1 (de) 2009-04-15
WO2001099199A1 (fr) 2001-12-27
US7052944B2 (en) 2006-05-30
US20030096462A1 (en) 2003-05-22
JP4389359B2 (ja) 2009-12-24
ATE429036T1 (de) 2009-05-15
EP1304746A4 (de) 2006-01-11

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