KR960026973A - 박막트랜지스터 제조방법 - Google Patents

박막트랜지스터 제조방법 Download PDF

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Publication number
KR960026973A
KR960026973A KR1019940033981A KR19940033981A KR960026973A KR 960026973 A KR960026973 A KR 960026973A KR 1019940033981 A KR1019940033981 A KR 1019940033981A KR 19940033981 A KR19940033981 A KR 19940033981A KR 960026973 A KR960026973 A KR 960026973A
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KR
South Korea
Prior art keywords
insulating film
semiconductor layer
gate
forming
insulating
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KR1019940033981A
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English (en)
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KR0156120B1 (ko
Inventor
양해원
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문정환
Lg 반도체주식회사
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Priority to KR1019940033981A priority Critical patent/KR0156120B1/ko
Publication of KR960026973A publication Critical patent/KR960026973A/ko
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Publication of KR0156120B1 publication Critical patent/KR0156120B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate

Abstract

본 발명은 박막 트랜지스터에 관한 것으로, 특히 트랜지스터의 소오스와 드레인영역 형성시 감광막의 특별한 패터닝없이셀프 어라인에 의해 소오스와 드레인을 형성함과 동시에 이온주입시 게이트 폴리실리콘의 두께차를 이용하여 게이트 절연막의 파괴를 최소화하도록 한 박막트랜지스터 제조방법에 관한 것이다.
본 발명의 목적을 달성하기 위해 기판상에 제1절연막, 제1반도체층, 제2절연막을 차례로 증착하고, 제2절연막을 선택적으로 제거하는 공정과, 전면에 게이트절연용 제3절연막, 제2반도체층을 차례로 증착하는 공정과, 상기 제2절연막이 제거된부위를 포함하여 일측에 제2절연막이 남도록 상기 제2반도체층과 제3절연막, 제2절연막을 선택적으로 제거하여 게이트전극을 형성하는 공정과, 상기 게이트를 마스크로 이용한 제1반도체층에 불순물 이온 주입을 하고 소오스/드레인영역을 형성하는 공정을 포함하여 이루어짐을 특징으로 한다.

Description

박막트랜지스터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 박막트랜지스터 공정단면도.

Claims (2)

  1. 기판상에 제1절연막, 제1반도체층, 제2절연막을 차례로 증착하고, 제2절연막을 선택적으로 제거하는 공정과, 전면에 게이트절연용 제3절연막, 제2반도체층을 차례로 증착하는 공정과, 상기 제2절연막이 제거된 부위를 포함하여일측에 제2절연막이 남도록 상기 제2반도체층과 제3절연막, 제2절연막을 선택적으로제거하여 게이트전극을 형성하는 공정과, 상기 게이트를 마스크로 이용한 제1반도체층에 불순물 이온 주입을 하고 소오스/드레인영역을 형성하는 공정을 포함하여 이루어짐을 특징으로 하는 박막 트랜지스터 제조방법.
  2. 제1항에 있어서, 제2반도체층은 폴리실리콘막으로서, 게이트전극 형성시 국부적으로 두껍게 증착되어 있음을 특징으로 하는 박막트랜지스터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940033981A 1994-12-13 1994-12-13 박막트랜지스터 제조방법 KR0156120B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940033981A KR0156120B1 (ko) 1994-12-13 1994-12-13 박막트랜지스터 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940033981A KR0156120B1 (ko) 1994-12-13 1994-12-13 박막트랜지스터 제조방법

Publications (2)

Publication Number Publication Date
KR960026973A true KR960026973A (ko) 1996-07-22
KR0156120B1 KR0156120B1 (ko) 1998-10-15

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100264888B1 (ko) * 1997-12-12 2000-09-01 구본준 액정표시장치제조방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100264888B1 (ko) * 1997-12-12 2000-09-01 구본준 액정표시장치제조방법

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KR0156120B1 (ko) 1998-10-15

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