DE60006177T2 - Block-löschbare Halbleiterspeicherschaltung mit Ersetzung defekter Speicherblöcke - Google Patents

Block-löschbare Halbleiterspeicherschaltung mit Ersetzung defekter Speicherblöcke Download PDF

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Publication number
DE60006177T2
DE60006177T2 DE60006177T DE60006177T DE60006177T2 DE 60006177 T2 DE60006177 T2 DE 60006177T2 DE 60006177 T DE60006177 T DE 60006177T DE 60006177 T DE60006177 T DE 60006177T DE 60006177 T2 DE60006177 T2 DE 60006177T2
Authority
DE
Germany
Prior art keywords
block
address
signal
memory cell
defective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60006177T
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German (de)
English (en)
Other versions
DE60006177D1 (de
Inventor
Tadayuki Minato-ku Taura
Shigeru Minato-ku Atsumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE60006177D1 publication Critical patent/DE60006177D1/de
Application granted granted Critical
Publication of DE60006177T2 publication Critical patent/DE60006177T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices

Landscapes

  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
DE60006177T 1999-03-23 2000-03-23 Block-löschbare Halbleiterspeicherschaltung mit Ersetzung defekter Speicherblöcke Expired - Lifetime DE60006177T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7743299 1999-03-23
JP07743299A JP4413306B2 (ja) 1999-03-23 1999-03-23 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE60006177D1 DE60006177D1 (de) 2003-12-04
DE60006177T2 true DE60006177T2 (de) 2004-07-29

Family

ID=13633857

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60006177T Expired - Lifetime DE60006177T2 (de) 1999-03-23 2000-03-23 Block-löschbare Halbleiterspeicherschaltung mit Ersetzung defekter Speicherblöcke

Country Status (7)

Country Link
US (2) US6327180B2 (enExample)
EP (1) EP1039388B1 (enExample)
JP (1) JP4413306B2 (enExample)
KR (1) KR100377307B1 (enExample)
CN (1) CN1199188C (enExample)
DE (1) DE60006177T2 (enExample)
TW (1) TWI223267B (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5915167A (en) * 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6462985B2 (en) 1999-12-10 2002-10-08 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory for storing initially-setting data
US6421284B1 (en) * 2000-05-26 2002-07-16 Hitachi, Limited Semiconductor device
JP2003085993A (ja) * 2001-09-07 2003-03-20 Toshiba Corp 不揮発性半導体記憶装置およびその不良救済方法
US7290117B2 (en) * 2001-12-20 2007-10-30 Hewlett-Packard Development Company, L.P. Memory having increased data-transfer speed and related systems and methods
KR100769800B1 (ko) * 2001-12-26 2007-10-23 주식회사 하이닉스반도체 멀티 플레인 블럭 어드레스 레지스터
JP4235122B2 (ja) * 2004-02-06 2009-03-11 シャープ株式会社 半導体記憶装置及び半導体記憶装置のテスト方法
CN101006520B (zh) * 2004-04-21 2010-05-05 斯班逊有限公司 非易失性半导体器件及非易失性半导体器件的擦除动作不良自动救济方法
US7221603B2 (en) * 2005-05-12 2007-05-22 Micron Technology, Inc. Defective block handling in a flash memory device
JP4761959B2 (ja) * 2005-12-26 2011-08-31 株式会社東芝 半導体集積回路装置
JP4828938B2 (ja) * 2005-12-28 2011-11-30 株式会社東芝 不揮発性半導体記憶装置及びその駆動方法
KR100685638B1 (ko) * 2006-03-31 2007-02-22 주식회사 하이닉스반도체 랜덤 프로그램 기능을 가지는 듀얼 플레인 타입 플래시메모리 장치 및 그 프로그램 동작 방법
KR100769772B1 (ko) 2006-09-29 2007-10-23 주식회사 하이닉스반도체 플래시 메모리 장치 및 이를 이용한 소거 방법
JP4985781B2 (ja) * 2007-11-05 2012-07-25 富士通株式会社 半導体記憶装置およびその制御方法
US7590001B2 (en) * 2007-12-18 2009-09-15 Saifun Semiconductors Ltd. Flash memory with optimized write sector spares
WO2009116117A1 (ja) * 2008-03-19 2009-09-24 富士通マイクロエレクトロニクス株式会社 半導体メモリ、システム、半導体メモリの動作方法および半導体メモリの製造方法
US8787086B1 (en) * 2008-08-29 2014-07-22 The Arizona Board Of Regents For And On Behalf Of Arizona State University Inhibiting address transitions in unselected memory banks of solid state memory circuits
KR101094997B1 (ko) 2010-07-26 2011-12-20 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 리페어 처리방법
CN102623059B (zh) * 2011-01-26 2015-10-28 中国科学院微电子研究所 一种半导体存储器件的复位方法
KR101920638B1 (ko) 2011-12-02 2018-11-22 에스케이하이닉스 주식회사 반도체 메모리 장치
US9098628B2 (en) 2012-07-26 2015-08-04 International Business Machines Corporation Memory system with multiple block write control to control state data
JP6682471B2 (ja) * 2017-03-24 2020-04-15 キオクシア株式会社 半導体記憶装置
US10908824B2 (en) * 2018-11-08 2021-02-02 Winbond Electronics Corp. Flash memory storage device and method thereof

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3019869B2 (ja) * 1990-10-16 2000-03-13 富士通株式会社 半導体メモリ
JPH05109292A (ja) 1991-10-14 1993-04-30 Toshiba Corp 不揮発性半導体記憶装置
JP2647312B2 (ja) 1992-09-11 1997-08-27 インターナショナル・ビジネス・マシーンズ・コーポレイション 一括消去型不揮発性半導体記憶装置
US5381370A (en) * 1993-08-24 1995-01-10 Cypress Semiconductor Corporation Memory with minimized redundancy access delay
JPH07334999A (ja) * 1994-06-07 1995-12-22 Hitachi Ltd 不揮発性半導体記憶装置及びデータプロセッサ
JP3160160B2 (ja) * 1994-09-28 2001-04-23 シャープ株式会社 半導体記憶装置
JP3263259B2 (ja) 1994-10-04 2002-03-04 株式会社東芝 半導体記憶装置
US5621690A (en) 1995-04-28 1997-04-15 Intel Corporation Nonvolatile memory blocking architecture and redundancy
KR0147194B1 (ko) 1995-05-26 1998-11-02 문정환 반도체 메모리 소자
US5774396A (en) * 1996-03-29 1998-06-30 Aplus Integrated Circuits, Inc. Flash memory with row redundancy
US5774471A (en) * 1996-12-17 1998-06-30 Integrated Silicon Solution Inc. Multiple location repair word line redundancy circuit
JP3762114B2 (ja) 1998-09-08 2006-04-05 株式会社東芝 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
US6327180B2 (en) 2001-12-04
KR100377307B1 (ko) 2003-03-26
EP1039388A3 (en) 2000-10-18
KR20000071465A (ko) 2000-11-25
DE60006177D1 (de) 2003-12-04
CN1267888A (zh) 2000-09-27
JP4413306B2 (ja) 2010-02-10
TWI223267B (en) 2004-11-01
US20020012270A1 (en) 2002-01-31
US6496413B2 (en) 2002-12-17
EP1039388A2 (en) 2000-09-27
US20010012216A1 (en) 2001-08-09
EP1039388B1 (en) 2003-10-29
JP2000276896A (ja) 2000-10-06
CN1199188C (zh) 2005-04-27

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