DE69127155T2 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69127155T2
DE69127155T2 DE69127155T DE69127155T DE69127155T2 DE 69127155 T2 DE69127155 T2 DE 69127155T2 DE 69127155 T DE69127155 T DE 69127155T DE 69127155 T DE69127155 T DE 69127155T DE 69127155 T2 DE69127155 T2 DE 69127155T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69127155T
Other languages
English (en)
Other versions
DE69127155D1 (de
Inventor
Shigeru Atsumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69127155D1 publication Critical patent/DE69127155D1/de
Application granted granted Critical
Publication of DE69127155T2 publication Critical patent/DE69127155T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
DE69127155T 1990-09-28 1991-09-26 Halbleiterspeicheranordnung Expired - Lifetime DE69127155T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25904190A JP2635810B2 (ja) 1990-09-28 1990-09-28 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69127155D1 DE69127155D1 (de) 1997-09-11
DE69127155T2 true DE69127155T2 (de) 1998-01-15

Family

ID=17328516

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69127155T Expired - Lifetime DE69127155T2 (de) 1990-09-28 1991-09-26 Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (1) US5295105A (de)
EP (1) EP0477938B1 (de)
JP (1) JP2635810B2 (de)
KR (1) KR960001320B1 (de)
DE (1) DE69127155T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2816062B2 (ja) * 1992-10-05 1998-10-27 株式会社東芝 メモリセルの情報の消去方法
EP0594920B1 (de) * 1992-10-29 1999-07-28 STMicroelectronics S.r.l. Verfahren zur Bewertung des Gatteroxids nicht-flüchtiger EPROM, EEPROM und flash-EEPROM-Speicher
EP0595775B1 (de) * 1992-10-29 1999-07-28 STMicroelectronics S.r.l. Verfahren zur Bewertung der dielektrischen Schicht nicht-flüchtiger EPROM, EEPROM und flash-EEPROM-Speicher
JPH06215590A (ja) * 1993-01-13 1994-08-05 Nec Ic Microcomput Syst Ltd フラッシュ消去型不揮発性メモリ
JPH07147095A (ja) * 1993-03-31 1995-06-06 Sony Corp 半導体不揮発性記憶装置およびデコーダ回路
JP3105109B2 (ja) * 1993-05-19 2000-10-30 株式会社東芝 不揮発性半導体記憶装置
DE69428516T2 (de) * 1994-03-28 2002-05-08 St Microelectronics Srl Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung
US5583808A (en) * 1994-09-16 1996-12-10 National Semiconductor Corporation EPROM array segmented for high performance and method for controlling same
US5663923A (en) * 1995-04-28 1997-09-02 Intel Corporation Nonvolatile memory blocking architecture
US5646886A (en) * 1995-05-24 1997-07-08 National Semiconductor Corporation Flash memory having segmented array for improved operation
US5631864A (en) * 1995-07-28 1997-05-20 Micron Quantum Devices, Inc. Memory array having a reduced number of metal source lines
KR100228424B1 (ko) * 1996-06-29 1999-11-01 김영환 반도체 메모리 장치의 엑스 디코더 회로
US5751038A (en) * 1996-11-26 1998-05-12 Philips Electronics North America Corporation Electrically erasable and programmable read only memory (EEPROM) having multiple overlapping metallization layers
US6212103B1 (en) * 1999-07-28 2001-04-03 Xilinx, Inc. Method for operating flash memory
JP2002100689A (ja) * 2000-09-22 2002-04-05 Toshiba Corp 不揮発性半導体記憶装置
EP1227499B1 (de) 2001-01-24 2006-05-10 STMicroelectronics S.r.l. Nichtflüchtiger elektrisch veränderbarer Halbleiterspeicher
JP2003051197A (ja) * 2001-08-06 2003-02-21 Matsushita Electric Ind Co Ltd 半導体記憶装置
US6891747B2 (en) 2002-02-20 2005-05-10 Stmicroelectronics S.R.L. Phase change memory cell and manufacturing method thereof using minitrenches
KR100568872B1 (ko) * 2004-11-29 2006-04-10 삼성전자주식회사 반도체 메모리 장치에서의 회로 배선 배치구조
US7606057B2 (en) * 2006-05-31 2009-10-20 Arm Limited Metal line layout in a memory cell
US7719919B2 (en) * 2007-03-20 2010-05-18 Kabushiki Kaisha Toshiba Semiconductor memory device in which word lines are driven from either side of memory cell array
JP2009158094A (ja) * 2009-04-14 2009-07-16 Renesas Technology Corp 不揮発性記憶装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4366555A (en) * 1980-08-01 1982-12-28 National Semiconductor Corporation Electrically erasable programmable read only memory
US4949309A (en) * 1988-05-11 1990-08-14 Catalyst Semiconductor, Inc. EEPROM utilizing single transistor per cell capable of both byte erase and flash erase
JP2507576B2 (ja) * 1988-12-28 1996-06-12 株式会社東芝 半導体不揮発性メモリ
JPH0376098A (ja) * 1989-08-18 1991-04-02 Hitachi Ltd 半導体不揮発性記憶装置
US5126808A (en) * 1989-10-23 1992-06-30 Advanced Micro Devices, Inc. Flash EEPROM array with paged erase architecture

Also Published As

Publication number Publication date
US5295105A (en) 1994-03-15
KR960001320B1 (ko) 1996-01-25
DE69127155D1 (de) 1997-09-11
EP0477938B1 (de) 1997-08-06
EP0477938A2 (de) 1992-04-01
JP2635810B2 (ja) 1997-07-30
EP0477938A3 (en) 1994-09-28
JPH04137298A (ja) 1992-05-12
KR920007193A (ko) 1992-04-28

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Legal Events

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8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)