DE69428516T2 - Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung - Google Patents

Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung

Info

Publication number
DE69428516T2
DE69428516T2 DE69428516T DE69428516T DE69428516T2 DE 69428516 T2 DE69428516 T2 DE 69428516T2 DE 69428516 T DE69428516 T DE 69428516T DE 69428516 T DE69428516 T DE 69428516T DE 69428516 T2 DE69428516 T2 DE 69428516T2
Authority
DE
Germany
Prior art keywords
eeprom memory
flash eeprom
memory matrix
biasing method
biasing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69428516T
Other languages
English (en)
Other versions
DE69428516D1 (de
Inventor
Marco Dallabora
Mauro Luigi Sali
Caser Fabio Tassan
Corrado Villa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69428516D1 publication Critical patent/DE69428516D1/de
Publication of DE69428516T2 publication Critical patent/DE69428516T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885—Hot carrier injection from the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
DE69428516T 1994-03-28 1994-03-28 Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung Expired - Fee Related DE69428516T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP94830144A EP0676816B1 (de) 1994-03-28 1994-03-28 Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung

Publications (2)

Publication Number Publication Date
DE69428516D1 DE69428516D1 (de) 2001-11-08
DE69428516T2 true DE69428516T2 (de) 2002-05-08

Family

ID=8218408

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69428516T Expired - Fee Related DE69428516T2 (de) 1994-03-28 1994-03-28 Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung

Country Status (4)

Country Link
US (1) US5638327A (de)
EP (1) EP0676816B1 (de)
JP (1) JP2713217B2 (de)
DE (1) DE69428516T2 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5781477A (en) * 1996-02-23 1998-07-14 Micron Quantum Devices, Inc. Flash memory system having fast erase operation
JP3008857B2 (ja) * 1996-08-15 2000-02-14 日本電気株式会社 不揮発性半導体記憶装置及びその製造方法
US5790456A (en) * 1997-05-09 1998-08-04 Advanced Micro Devices, Inc. Multiple bits-per-cell flash EEPROM memory cells with wide program and erase Vt window
KR100242723B1 (ko) * 1997-08-12 2000-02-01 윤종용 불휘발성 반도체 메모리 장치의 셀 어레이 구조 및 그 제조방법
TW425660B (en) * 1997-12-12 2001-03-11 Mosel Vitelic Inc Method of forming uniform dielectric layer between two conductive layers in integrated circuit
KR100295150B1 (ko) * 1997-12-31 2001-07-12 윤종용 비휘발성메모리장치의동작방법과상기동작을구현할수있는장치및그제조방법
US6243299B1 (en) 1998-02-27 2001-06-05 Micron Technology, Inc. Flash memory system having fast erase operation
KR100264816B1 (ko) * 1998-03-26 2000-09-01 윤종용 비휘발성 메모리 장치 및 그 동작 방법
US6011722A (en) * 1998-10-13 2000-01-04 Lucent Technologies Inc. Method for erasing and programming memory devices
US6243298B1 (en) 1999-08-19 2001-06-05 Azalea Microelectronics Corporation Non-volatile memory cell capable of being programmed and erased through substantially separate areas of one of its drain-side and source-side regions
US6288938B1 (en) 1999-08-19 2001-09-11 Azalea Microelectronics Corporation Flash memory architecture and method of operation
US6141255A (en) * 1999-09-02 2000-10-31 Advanced Micro Devices, Inc. 1 transistor cell for EEPROM application
JP4114607B2 (ja) * 2001-09-25 2008-07-09 ソニー株式会社 不揮発性半導体メモリ装置及びその動作方法
US7212435B2 (en) * 2004-06-30 2007-05-01 Micron Technology, Inc. Minimizing adjacent wordline disturb in a memory device
KR100583731B1 (ko) * 2004-08-03 2006-05-26 삼성전자주식회사 노어형 플래시 메모리 소자 및 그 제조방법
US7294882B2 (en) * 2004-09-28 2007-11-13 Sandisk Corporation Non-volatile memory with asymmetrical doping profile
DE102004060375B4 (de) * 2004-12-15 2017-04-06 Polaris Innovations Ltd. Doppel-Gate-Speicherzelle und Flash-Speicherchip umfassend eine Anordnung vnon programmirbaren und löschbaren Doppel-Gate-Speicherzellen.
US7339832B2 (en) * 2005-11-21 2008-03-04 Atmel Corporation Array source line (AVSS) controlled high voltage regulation for programming flash or EE array
JP4314252B2 (ja) 2006-07-03 2009-08-12 株式会社東芝 不揮発性半導体記憶装置およびその製造方法
US7977186B2 (en) * 2006-09-28 2011-07-12 Sandisk Corporation Providing local boosting control implant for non-volatile memory
US7705387B2 (en) * 2006-09-28 2010-04-27 Sandisk Corporation Non-volatile memory with local boosting control implant
US7414891B2 (en) * 2007-01-04 2008-08-19 Atmel Corporation Erase verify method for NAND-type flash memories
US7882405B2 (en) * 2007-02-16 2011-02-01 Atmel Corporation Embedded architecture with serial interface for testing flash memories
US20080232169A1 (en) * 2007-03-20 2008-09-25 Atmel Corporation Nand-like memory array employing high-density nor-like memory devices
WO2010024883A1 (en) * 2008-08-25 2010-03-04 Halo Lsi, Inc Complementary reference method for high reliability trap-type non-volatile memory
EP2302635B1 (de) * 2009-09-18 2016-01-13 STMicroelectronics Srl Verfahren zum Vormagnetisieren einer nichtflüchtigen EEPROM-Speicheranordnung und entsprechende nichtflüchtige EEPROM-Speicheranordnung
FR2975813B1 (fr) * 2011-05-24 2014-04-11 St Microelectronics Rousset Reduction du courant de programmation des matrices memoires
CN103811061B (zh) * 2014-03-05 2016-08-24 上海华虹宏力半导体制造有限公司 Eeprom及其存储阵列
JP2018125518A (ja) * 2017-02-03 2018-08-09 ソニーセミコンダクタソリューションズ株式会社 トランジスタ、製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4698787A (en) * 1984-11-21 1987-10-06 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
US4763299A (en) * 1985-10-15 1988-08-09 Emanuel Hazani E2 PROM cell and architecture
US4794565A (en) * 1986-09-15 1988-12-27 The Regents Of The University Of California Electrically programmable memory device employing source side injection
US5065364A (en) * 1989-09-15 1991-11-12 Intel Corporation Apparatus for providing block erasing in a flash EPROM
JPH03283654A (ja) * 1990-03-30 1991-12-13 Toshiba Corp 半導体集積回路装置
JP2602575B2 (ja) * 1990-07-06 1997-04-23 シャープ株式会社 不揮発性半導体記憶装置
US5045491A (en) * 1990-09-28 1991-09-03 Texas Instruments Incorporated Method of making a nonvolatile memory array having cells with separate program and erase regions
JP2635810B2 (ja) * 1990-09-28 1997-07-30 株式会社東芝 半導体記憶装置
JPH04206965A (ja) * 1990-11-30 1992-07-28 Sony Corp 不揮発性半導体メモリ
US5222040A (en) * 1990-12-11 1993-06-22 Nexcom Technology, Inc. Single transistor eeprom memory cell
US5103425A (en) * 1991-03-11 1992-04-07 Motorola, Inc. Zener regulated programming circuit for a nonvolatile memory
US5264384A (en) * 1991-08-30 1993-11-23 Texas Instruments Incorporated Method of making a non-volatile memory cell
JPH05234382A (ja) * 1992-02-24 1993-09-10 Sony Corp 不揮発性記憶装置

Also Published As

Publication number Publication date
JP2713217B2 (ja) 1998-02-16
DE69428516D1 (de) 2001-11-08
EP0676816B1 (de) 2001-10-04
EP0676816A1 (de) 1995-10-11
US5638327A (en) 1997-06-10
JPH0855921A (ja) 1996-02-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee