FR2975813B1 - Reduction du courant de programmation des matrices memoires - Google Patents

Reduction du courant de programmation des matrices memoires

Info

Publication number
FR2975813B1
FR2975813B1 FR1154499A FR1154499A FR2975813B1 FR 2975813 B1 FR2975813 B1 FR 2975813B1 FR 1154499 A FR1154499 A FR 1154499A FR 1154499 A FR1154499 A FR 1154499A FR 2975813 B1 FR2975813 B1 FR 2975813B1
Authority
FR
France
Prior art keywords
reduction
memory arrays
programming current
programming
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1154499A
Other languages
English (en)
Other versions
FR2975813A1 (fr
Inventor
Jean-Michel Mirabel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1154499A priority Critical patent/FR2975813B1/fr
Priority to US13/480,145 priority patent/US8995190B2/en
Publication of FR2975813A1 publication Critical patent/FR2975813A1/fr
Application granted granted Critical
Publication of FR2975813B1 publication Critical patent/FR2975813B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
FR1154499A 2011-05-24 2011-05-24 Reduction du courant de programmation des matrices memoires Expired - Fee Related FR2975813B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1154499A FR2975813B1 (fr) 2011-05-24 2011-05-24 Reduction du courant de programmation des matrices memoires
US13/480,145 US8995190B2 (en) 2011-05-24 2012-05-24 Reducing the programming current for memory matrices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1154499A FR2975813B1 (fr) 2011-05-24 2011-05-24 Reduction du courant de programmation des matrices memoires

Publications (2)

Publication Number Publication Date
FR2975813A1 FR2975813A1 (fr) 2012-11-30
FR2975813B1 true FR2975813B1 (fr) 2014-04-11

Family

ID=44550981

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1154499A Expired - Fee Related FR2975813B1 (fr) 2011-05-24 2011-05-24 Reduction du courant de programmation des matrices memoires

Country Status (2)

Country Link
US (1) US8995190B2 (fr)
FR (1) FR2975813B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5853853B2 (ja) * 2012-05-09 2016-02-09 富士通セミコンダクター株式会社 半導体記憶装置及びその駆動方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69428516T2 (de) * 1994-03-28 2002-05-08 St Microelectronics Srl Flash-EEPROM-Speicher-Matrix und Verfahren zur Vorspannung
JP3601612B2 (ja) * 1994-09-22 2004-12-15 富士通株式会社 半導体装置及びその製造方法
JPH113595A (ja) * 1997-06-13 1999-01-06 Sharp Corp 不揮発性半導体記憶装置
US5801994A (en) * 1997-08-15 1998-09-01 Programmable Microelectronics Corporation Non-volatile memory array architecture
JP2002522850A (ja) * 1998-08-10 2002-07-23 クレフト，ハンス−ディートリヒ カードの安全性を増したチップカード
US20010013610A1 (en) * 1999-08-02 2001-08-16 Min-Hwa Chi Vertical bipolar transistor based on gate induced drain leakage current
US6307781B1 (en) * 1999-09-30 2001-10-23 Infineon Technologies Aktiengesellschaft Two transistor flash memory cell
JP3775963B2 (ja) * 2000-02-02 2006-05-17 シャープ株式会社 不揮発性半導体メモリ装置の消去方式
KR20040068552A (ko) * 2001-11-27 2004-07-31 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 반도체 디바이스
US6921946B2 (en) * 2002-12-16 2005-07-26 Koninklijke Philips Electronics N.V. Test structure for electrical well-to-well overlay
KR100598107B1 (ko) * 2004-09-21 2006-07-07 삼성전자주식회사 비휘발성 메모리 소자 및 그 형성 방법
US7151697B2 (en) * 2004-11-30 2006-12-19 Infineon Technologies Ag Non-volatile semiconductor memory
US7940572B2 (en) * 2008-01-07 2011-05-10 Mosaid Technologies Incorporated NAND flash memory having multiple cell substrates
KR101017757B1 (ko) * 2008-09-10 2011-02-28 한양대학교 산학협력단 공통 피웰을 이용하는 낸드 플래시 메모리 및 이의 동작방법
KR20100080244A (ko) * 2008-12-31 2010-07-08 주식회사 동부하이텍 플래시메모리 소자 및 그 제조방법
US8233320B2 (en) * 2009-07-10 2012-07-31 Aplus Flash Technology, Inc. High speed high density NAND-based 2T-NOR flash memory design
KR101604631B1 (ko) * 2009-07-21 2016-03-18 삼성전자주식회사 불 휘발성 메모리 장치 및 그것의 프로그램 방법

Also Published As

Publication number Publication date
US8995190B2 (en) 2015-03-31
FR2975813A1 (fr) 2012-11-30
US20120320681A1 (en) 2012-12-20

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Legal Events

Date Code Title Description
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Effective date: 20150130