DE69125206T2 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69125206T2
DE69125206T2 DE69125206T DE69125206T DE69125206T2 DE 69125206 T2 DE69125206 T2 DE 69125206T2 DE 69125206 T DE69125206 T DE 69125206T DE 69125206 T DE69125206 T DE 69125206T DE 69125206 T2 DE69125206 T2 DE 69125206T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69125206T
Other languages
English (en)
Other versions
DE69125206D1 (de
Inventor
Tamihiro Ishimura
Masahumi Miyawaki
Yoshio Ohtsuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2142666A external-priority patent/JPH0435064A/ja
Priority claimed from JP2155037A external-priority patent/JPH0447586A/ja
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Application granted granted Critical
Publication of DE69125206D1 publication Critical patent/DE69125206D1/de
Publication of DE69125206T2 publication Critical patent/DE69125206T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
DE69125206T 1990-05-31 1991-05-24 Halbleiterspeicheranordnung Expired - Fee Related DE69125206T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2142666A JPH0435064A (ja) 1990-05-31 1990-05-31 半導体記憶装置
JP2155037A JPH0447586A (ja) 1990-06-15 1990-06-15 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69125206D1 DE69125206D1 (de) 1997-04-24
DE69125206T2 true DE69125206T2 (de) 1997-10-09

Family

ID=26474592

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69125206T Expired - Fee Related DE69125206T2 (de) 1990-05-31 1991-05-24 Halbleiterspeicheranordnung

Country Status (4)

Country Link
US (2) US5321658A (de)
EP (1) EP0459316B1 (de)
KR (1) KR100208062B1 (de)
DE (1) DE69125206T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5325336A (en) * 1992-09-10 1994-06-28 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having power line arranged in a meshed shape
JP2792795B2 (ja) * 1992-10-29 1998-09-03 三菱電機株式会社 半導体集積装置
KR0137105B1 (ko) * 1993-06-17 1998-04-29 모리시다 요이치 데이터 전송회로, 데이터선 구동회로, 증폭회로, 반도체 집적회로 및 반도체 기억장치
US5812148A (en) * 1993-11-11 1998-09-22 Oki Electric Industry Co., Ltd. Serial access memory
JPH07142582A (ja) * 1993-11-12 1995-06-02 Oki Electric Ind Co Ltd 半導体入力回路
EP0685850B1 (de) * 1994-05-27 2000-07-26 AT&T Corp. Integrierte Halbleiterschaltung mit einer SRAM-Zellenmatrix mit einseitiger Stromabfühlschaltung
US5751650A (en) * 1995-10-02 1998-05-12 Matsushita Electronics Corporation Electric signal supply circuit and semiconductor memory device
US5740116A (en) * 1995-12-22 1998-04-14 Townsend And Townsend And Crew, Llp Current limiting during block writes of memory circuits
JP3556388B2 (ja) * 1996-04-23 2004-08-18 株式会社 沖マイクロデザイン 半導体メモリ装置
JP3253549B2 (ja) * 1997-02-13 2002-02-04 株式会社東芝 半導体集積回路装置
JP4118364B2 (ja) * 1997-07-16 2008-07-16 日本テキサス・インスツルメンツ株式会社 半導体記憶装置
US6137316A (en) * 1998-06-09 2000-10-24 Siemens Aktiengesellschaft Integrated circuit with improved off chip drivers
DE19907155A1 (de) * 1999-02-19 2000-08-31 Siemens Ag Integrierte Halbleiterspeicheranordnung mit Selbstpufferung von Versorgungsspannungen
KR100340717B1 (ko) * 1999-08-02 2002-06-20 윤종용 동적 반도체 메모리 장치 및 그를 내장한 마이크로비지에이 패키지
KR100338100B1 (ko) * 1999-12-28 2002-05-24 박종섭 플래쉬 메모리 소자의 정전기 방전 특성 개선 방법
JP3453552B2 (ja) * 2000-08-31 2003-10-06 松下電器産業株式会社 半導体記憶装置
KR100378685B1 (ko) * 2000-12-29 2003-04-07 주식회사 하이닉스반도체 반도체 메모리 장치 및 그의 센스 앰프 제어 회로
US6549443B1 (en) * 2001-05-16 2003-04-15 Rockwell Collins, Inc. Single event upset resistant semiconductor circuit element
US6912171B2 (en) * 2003-02-28 2005-06-28 Union Semiconductor Technology Corporation Semiconductor device power bus system and method
US6920076B2 (en) 2003-02-28 2005-07-19 Union Semiconductor Technology Corporation Interlayered power bus for semiconductor device
US7038523B2 (en) * 2003-10-08 2006-05-02 Infineon Technologies Ag Voltage trimming circuit
US20100220512A1 (en) * 2009-03-02 2010-09-02 Seagate Technology Llc Programmable power source using array of resistive sense memory cells
JP2011123970A (ja) * 2009-12-14 2011-06-23 Renesas Electronics Corp 半導体記憶装置
US9973142B2 (en) 2013-03-06 2018-05-15 Vermont Slate and Copper Services, Inc. Snow fence for a solar panel
KR20150022242A (ko) * 2013-08-22 2015-03-04 에스케이하이닉스 주식회사 반도체 메모리 장치

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3621302A (en) * 1969-01-15 1971-11-16 Ibm Monolithic-integrated semiconductor array having reduced power consumption
GB2021825B (en) * 1978-05-25 1982-10-27 Aubusson R C Semi conductor circuits
FR2522432A1 (fr) * 1982-02-26 1983-09-02 Radiotechnique Compelec Procede pour obtenir la decharge rapide d'une rangee de matrice memoire, et circuit de decharge dynamique correspondant
JPS60140586A (ja) * 1983-12-28 1985-07-25 Nec Corp メモリ回路
JPS6177198A (ja) * 1984-09-21 1986-04-19 Toshiba Corp 半導体記憶装置
JPS62195787A (ja) * 1986-02-24 1987-08-28 Toshiba Corp 半導体記憶装置
NL8702800A (nl) * 1987-11-23 1989-06-16 Philips Nv Geintegreerde geheugenschakeling met interne voedingsspanningsregeling.
JPH0758594B2 (ja) * 1988-12-27 1995-06-21 シャープ株式会社 ダイナミック型半導体記憶装置
DE69024680T2 (de) * 1989-03-17 1996-08-01 Matsushita Electronics Corp Halbleiter-Speichereinrichtung
JPH0376263A (ja) * 1989-08-18 1991-04-02 Fujitsu Ltd ウエハスケール集積回路装置
JPH0693484B2 (ja) * 1989-11-10 1994-11-16 株式会社東芝 半導体集積回路
US5280450A (en) * 1990-05-14 1994-01-18 Hitachi, Ltd. High-speed semicondustor memory integrated circuit arrangement having power and signal lines with reduced resistance
EP0461313B1 (de) * 1990-06-12 1996-09-18 Fujitsu Limited Dynamische Speichereinrichtung mit wahlfreiem Zugriff
US5173873A (en) * 1990-06-28 1992-12-22 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration High speed magneto-resistive random access memory
JPH0562461A (ja) * 1991-04-09 1993-03-12 Mitsubishi Electric Corp 半導体記憶装置
KR940003410B1 (ko) * 1991-08-01 1994-04-21 삼성전자 주식회사 망사 구조의 전원선을 가지는 반도체 메모리 장치

Also Published As

Publication number Publication date
KR910020735A (ko) 1991-12-20
EP0459316B1 (de) 1997-03-19
US5517444A (en) 1996-05-14
EP0459316A3 (en) 1992-07-22
EP0459316A2 (de) 1991-12-04
KR100208062B1 (ko) 1999-07-15
DE69125206D1 (de) 1997-04-24
US5321658A (en) 1994-06-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee