DE3681659D1 - Zum pruefbetrieb geeignete halbleiterintegrierte schaltung. - Google Patents

Zum pruefbetrieb geeignete halbleiterintegrierte schaltung.

Info

Publication number
DE3681659D1
DE3681659D1 DE8686401359T DE3681659T DE3681659D1 DE 3681659 D1 DE3681659 D1 DE 3681659D1 DE 8686401359 T DE8686401359 T DE 8686401359T DE 3681659 T DE3681659 T DE 3681659T DE 3681659 D1 DE3681659 D1 DE 3681659D1
Authority
DE
Germany
Prior art keywords
terminals
circuit
high voltage
control signal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686401359T
Other languages
English (en)
Inventor
Masanobu Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3681659D1 publication Critical patent/DE3681659D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/46—Test trigger logic

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Dram (AREA)
DE8686401359T 1985-06-20 1986-06-20 Zum pruefbetrieb geeignete halbleiterintegrierte schaltung. Expired - Fee Related DE3681659D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60134649A JPS61292755A (ja) 1985-06-20 1985-06-20 半導体集積回路

Publications (1)

Publication Number Publication Date
DE3681659D1 true DE3681659D1 (de) 1991-10-31

Family

ID=15133306

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686401359T Expired - Fee Related DE3681659D1 (de) 1985-06-20 1986-06-20 Zum pruefbetrieb geeignete halbleiterintegrierte schaltung.

Country Status (5)

Country Link
US (1) US4841233A (de)
EP (1) EP0212997B1 (de)
JP (1) JPS61292755A (de)
KR (1) KR910000738B1 (de)
DE (1) DE3681659D1 (de)

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Publication number Priority date Publication date Assignee Title
JP2659095B2 (ja) * 1987-06-30 1997-09-30 富士通株式会社 ゲートアレイ及びメモリを有する半導体集積回路装置
JPH081760B2 (ja) * 1987-11-17 1996-01-10 三菱電機株式会社 半導体記憶装置
FR2623653B1 (fr) * 1987-11-24 1992-10-23 Sgs Thomson Microelectronics Procede de test de cellules de memoire electriquement programmable et circuit integre correspondant
JP2621894B2 (ja) * 1987-12-26 1997-06-18 株式会社東芝 マイクロコンピュータ
JPH0231239A (ja) * 1988-07-20 1990-02-01 Ricoh Co Ltd レジスタテスト回路装置
JPH02113340A (ja) * 1988-10-24 1990-04-25 Fujitsu Ltd 半導体集積回路
KR910006241B1 (ko) * 1988-12-14 1991-08-17 삼성전자 주식회사 복수 테스트모드 선택회로
US5077738A (en) * 1988-12-30 1991-12-31 Intel Corporation Test mode enable scheme for memory
JPH02206087A (ja) * 1989-02-03 1990-08-15 Mitsubishi Electric Corp 半導体記憶装置
JP2688976B2 (ja) * 1989-03-08 1997-12-10 三菱電機株式会社 半導体集積回路装置
JP2650124B2 (ja) * 1989-07-11 1997-09-03 三菱電機株式会社 半導体集積回路
JPH0346188A (ja) * 1989-07-13 1991-02-27 Mitsubishi Electric Corp 半導体記憶回路
US5636226A (en) * 1989-12-14 1997-06-03 Texas Instruments Incorporated Fault sensing circuit and method
US5161159A (en) * 1990-08-17 1992-11-03 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with multiple clocking for test mode entry
DE69120483T2 (de) * 1990-08-17 1996-11-14 Sgs Thomson Microelectronics Halbleiter-Speicher mit unterdrücktem Testmodus-Eingang während des Strom-Einschaltens
US5265099A (en) * 1991-02-28 1993-11-23 Feinstein David Y Method for heating dynamic memory units whereby
JP3282188B2 (ja) * 1991-06-27 2002-05-13 日本電気株式会社 半導体メモリ装置
JP2792634B2 (ja) * 1991-06-28 1998-09-03 シャープ株式会社 アクティブマトリクス基板の検査方法
JP2608208B2 (ja) * 1991-09-30 1997-05-07 富士通株式会社 半導体回路素子とその試験処理方法
US5353254A (en) * 1992-05-21 1994-10-04 Texas Instruments Incorporated Semiconductor memory device having burn-in test circuit
JPH0612878A (ja) * 1992-06-25 1994-01-21 Mitsubishi Electric Corp 半導体メモリ装置
JP3307473B2 (ja) * 1992-09-09 2002-07-24 ソニー エレクトロニクス インコーポレイテッド 半導体メモリの試験回路
JP2639319B2 (ja) * 1993-09-22 1997-08-13 日本電気株式会社 半導体装置
US5450417A (en) * 1993-10-26 1995-09-12 Texas Instruments Incorporated Circuit for testing power-on-reset circuitry
US5530803A (en) * 1994-04-14 1996-06-25 Advanced Micro Devices, Inc. Method and apparatus for programming memory devices
KR0127236B1 (ko) * 1994-05-17 1998-04-02 문정환 메모리 칩의 정보 이용 회로
FR2751461B1 (fr) * 1996-07-22 1998-11-06 Sgs Thomson Microelectronics Dispositif de controle de finalite de test
US5727001A (en) 1996-08-14 1998-03-10 Micron Technology, Inc. Circuit and method for testing an integrated circuit
US6072713A (en) * 1998-02-04 2000-06-06 Vlsi Technology, Inc. Data storage circuit using shared bit line and method therefor
US6021064A (en) * 1998-02-04 2000-02-01 Vlsi Technology, Inc. Layout for data storage circuit using shared bit line and method therefor
JP4904619B2 (ja) * 2000-11-29 2012-03-28 富士通セミコンダクター株式会社 半導体装置
US7315585B2 (en) * 2004-02-11 2008-01-01 Micrel, Inc. Clock-less serial data interface using a single pin
US11087857B2 (en) * 2017-11-15 2021-08-10 Texas Instruments Incorporated Enabling high at-speed test coverage of functional memory interface logic by selective usage of test paths

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4168796A (en) * 1978-04-13 1979-09-25 Ncr Corporation Tester with driver/sensor circuit having programmable termination devices
US4194113A (en) * 1978-04-13 1980-03-18 Ncr Corporation Method and apparatus for isolating faults in a logic circuit
JPS5578355A (en) * 1978-12-08 1980-06-12 Nec Corp Semiconductor integrated circuit
US4301535A (en) * 1979-07-02 1981-11-17 Mostek Corporation Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit
JPS5928986B2 (ja) * 1980-02-13 1984-07-17 日本電気株式会社 半導体集積回路
DE3030852A1 (de) * 1980-08-14 1982-03-11 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung fuer die pruefung von speicherzellen programmierbarer mos-integrierter halbleiterspeicher
JPS57105892A (en) * 1980-12-23 1982-07-01 Fujitsu Ltd Rewritable non-volatile semiconductor storage device
EP0055594B1 (de) * 1980-12-23 1988-07-13 Fujitsu Limited Elektrisch programmierbares Festwerthalbleiterspeichergerät
JPS57133656A (en) * 1981-02-12 1982-08-18 Nec Corp Semiconductor integrated circuit incorporated with test circuit
US4419747A (en) * 1981-09-14 1983-12-06 Seeq Technology, Inc. Method and device for providing process and test information in semiconductors
US4468759A (en) * 1982-05-03 1984-08-28 Intel Corporation Testing method and apparatus for dram
JPS5999505A (ja) * 1982-11-29 1984-06-08 Mitsubishi Electric Corp 電子ミシンの制御装置
US4552292A (en) * 1982-11-12 1985-11-12 General Electric Company Heat exchanger
US4672583A (en) * 1983-06-15 1987-06-09 Nec Corporation Dynamic random access memory device provided with test circuit for internal refresh circuit
US4612499A (en) * 1983-11-07 1986-09-16 Texas Instruments Incorporated Test input demultiplexing circuit
US4608669A (en) * 1984-05-18 1986-08-26 International Business Machines Corporation Self contained array timing
JPS61145799A (ja) * 1984-12-20 1986-07-03 Fujitsu Ltd メモリを内蔵した半導体集積回路
US4680762A (en) * 1985-10-17 1987-07-14 Inmos Corporation Method and apparatus for locating soft cells in a ram
US4689772A (en) * 1985-10-30 1987-08-25 International Business Machines Corporation Read complete test technique for memory arrays

Also Published As

Publication number Publication date
EP0212997B1 (de) 1991-09-25
US4841233A (en) 1989-06-20
EP0212997A3 (en) 1989-02-08
KR910000738B1 (ko) 1991-02-06
EP0212997A2 (de) 1987-03-04
KR870000710A (ko) 1987-02-20
JPS61292755A (ja) 1986-12-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee