GB2002129A - Apparatus for testing semiconductor memories - Google Patents

Apparatus for testing semiconductor memories

Info

Publication number
GB2002129A
GB2002129A GB7831083A GB7831083A GB2002129A GB 2002129 A GB2002129 A GB 2002129A GB 7831083 A GB7831083 A GB 7831083A GB 7831083 A GB7831083 A GB 7831083A GB 2002129 A GB2002129 A GB 2002129A
Authority
GB
United Kingdom
Prior art keywords
latch
voltage
latch circuit
threshold
fabricated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7831083A
Other versions
GB2002129B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sperry Corp
Original Assignee
Sperry Rand Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/821,272 external-priority patent/US4127901A/en
Priority claimed from US05/821,271 external-priority patent/US4130897A/en
Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp
Publication of GB2002129A publication Critical patent/GB2002129A/en
Application granted granted Critical
Publication of GB2002129B publication Critical patent/GB2002129B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50016—Marginal testing, e.g. race, voltage or current testing of retention
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

In apparatus for testing memories in which the memory cells comprise variable threshold semiconductor devices, a threshold voltage of a memory cell is applied to one side of a bistable latch circuit and a reference voltage is applied to the other side, the reference voltage is incremented until the latch circuit latches in the opposite sense, thereby giving a measure of the threshold voltage. The apparatus can alternatively be operated with two threshold voltages from a single memory cell applied to the two sides of the latch so that the latch reads out the contents of the cell. The latch outputs may be cross-coupled to the input circuits by transistor circuits to increase the voltage separation of the latch circuit and reduce its power consumption. The apparatus can be fabricated on a single integrated chip and may be fabricated on the same chip as a memory array.
GB7831083A 1977-08-03 1978-07-25 Apparatus for testing semiconductor memories Expired GB2002129B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/821,272 US4127901A (en) 1977-08-03 1977-08-03 MNOS FET memory retention characterization test circuit
US05/821,271 US4130897A (en) 1977-08-03 1977-08-03 MNOS FET memory retention characterization test circuit with enhanced sensitivity and power conservation

Publications (2)

Publication Number Publication Date
GB2002129A true GB2002129A (en) 1979-02-14
GB2002129B GB2002129B (en) 1982-01-20

Family

ID=27124528

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7831083A Expired GB2002129B (en) 1977-08-03 1978-07-25 Apparatus for testing semiconductor memories

Country Status (4)

Country Link
JP (1) JPS5427733A (en)
DE (1) DE2833828A1 (en)
FR (1) FR2399712A1 (en)
GB (1) GB2002129B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2260618B (en) * 1991-10-14 1996-05-22 Samsung Electronics Co Ltd An integrated semiconductor memory device with a test circuit

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55117034A (en) * 1979-02-28 1980-09-09 Yamaha Motor Co Ltd Apparatus for inhibiting rotation of rotatable part of engine
US4253059A (en) * 1979-05-14 1981-02-24 Fairchild Camera & Instrument Corp. EPROM Reliability test circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3795859A (en) * 1972-07-03 1974-03-05 Ibm Method and apparatus for determining the electrical characteristics of a memory cell having field effect transistors
JPS5321984B2 (en) * 1973-07-13 1978-07-06
US3824564A (en) * 1973-07-19 1974-07-16 Sperry Rand Corp Integrated threshold mnos memory with decoder and operating sequence

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2260618B (en) * 1991-10-14 1996-05-22 Samsung Electronics Co Ltd An integrated semiconductor memory device with a test circuit

Also Published As

Publication number Publication date
JPS5427733A (en) 1979-03-02
GB2002129B (en) 1982-01-20
FR2399712A1 (en) 1979-03-02
DE2833828A1 (en) 1979-02-08

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee