JPS57105892A - Rewritable non-volatile semiconductor storage device - Google Patents
Rewritable non-volatile semiconductor storage deviceInfo
- Publication number
- JPS57105892A JPS57105892A JP55182294A JP18229480A JPS57105892A JP S57105892 A JPS57105892 A JP S57105892A JP 55182294 A JP55182294 A JP 55182294A JP 18229480 A JP18229480 A JP 18229480A JP S57105892 A JPS57105892 A JP S57105892A
- Authority
- JP
- Japan
- Prior art keywords
- bit line
- selection gates
- storage device
- semiconductor storage
- volatile semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/30—Accessing single arrays
- G11C29/34—Accessing multiple bits simultaneously
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
PURPOSE:To reduce the write-in time of all zero at test, by providing selection gates and additional circuits, in a rewritable non-volatile semiconductor storage device. CONSTITUTION:Selected word lines WL0-WL255 and bit lines BL0-BL31 are made to high potential, and information 0 is written in a cell MCA at the cross point. All the bit lines are separated into bit line groups BLG0-BLG3, column selection gates G40-G43 are provided corresponding to each bit line group, column selection gates G0-G31 are provided corresponding to each bit line in each group, the selection gates are selectable individually or at the same time with the output of a column decoder CD1, the 2nd selection gate is made selectable in each bit line group with the output of a column decoder CD2, and an additional circuit Z which selects the selection gate at the same time with the column decoder at test when information 0 is written in all the cells, is provided.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55182294A JPS57105892A (en) | 1980-12-23 | 1980-12-23 | Rewritable non-volatile semiconductor storage device |
EP81306062A EP0055594B1 (en) | 1980-12-23 | 1981-12-22 | Electrically programmable non-volatile semiconductor memory device |
IE3036/81A IE54406B1 (en) | 1980-12-23 | 1981-12-22 | Electrically programmable non-colatile semiconductor memory device |
DE8181306062T DE3176810D1 (en) | 1980-12-23 | 1981-12-22 | Electrically programmable non-volatile semiconductor memory device |
US06/333,926 US4543647A (en) | 1980-12-23 | 1981-12-23 | Electrically programmable non-volatile semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55182294A JPS57105892A (en) | 1980-12-23 | 1980-12-23 | Rewritable non-volatile semiconductor storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57105892A true JPS57105892A (en) | 1982-07-01 |
JPS6221200B2 JPS6221200B2 (en) | 1987-05-11 |
Family
ID=16115763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55182294A Granted JPS57105892A (en) | 1980-12-23 | 1980-12-23 | Rewritable non-volatile semiconductor storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57105892A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59107493A (en) * | 1982-12-09 | 1984-06-21 | Ricoh Co Ltd | Eprom memory device with test circuit |
US4841233A (en) * | 1985-06-20 | 1989-06-20 | Fujitsu Limited | Semiconductor integrated circuit adapted to carry out operation test |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH025500U (en) * | 1988-06-17 | 1990-01-16 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51147924A (en) * | 1975-06-13 | 1976-12-18 | Fujitsu Ltd | Memory unit |
-
1980
- 1980-12-23 JP JP55182294A patent/JPS57105892A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51147924A (en) * | 1975-06-13 | 1976-12-18 | Fujitsu Ltd | Memory unit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59107493A (en) * | 1982-12-09 | 1984-06-21 | Ricoh Co Ltd | Eprom memory device with test circuit |
US4841233A (en) * | 1985-06-20 | 1989-06-20 | Fujitsu Limited | Semiconductor integrated circuit adapted to carry out operation test |
Also Published As
Publication number | Publication date |
---|---|
JPS6221200B2 (en) | 1987-05-11 |
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