JPS56134390A - Rom element - Google Patents

Rom element

Info

Publication number
JPS56134390A
JPS56134390A JP3672580A JP3672580A JPS56134390A JP S56134390 A JPS56134390 A JP S56134390A JP 3672580 A JP3672580 A JP 3672580A JP 3672580 A JP3672580 A JP 3672580A JP S56134390 A JPS56134390 A JP S56134390A
Authority
JP
Japan
Prior art keywords
write data
latch
write
data
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3672580A
Other languages
Japanese (ja)
Inventor
Shigeru Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3672580A priority Critical patent/JPS56134390A/en
Publication of JPS56134390A publication Critical patent/JPS56134390A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory

Landscapes

  • Read Only Memory (AREA)

Abstract

PURPOSE:To shorten the time required to write data by holding write data in a latch group and by writing it in a memory cell, which correspond to data equivalent to not less than one word, at a time. CONSTITUTION:Write data is applied to input-output terminals O1/I1... and while address bit A0 is set to ''0'', a write selection signal and latch set signal phi0 are turned on, so that the write data will be stored in latch groups L11... at odd-numbered sides. Next, when bit A0 is set to ''1'' for different write data, the write data is stored in latch groups L12... at odd-numbered sides. Thus, data equivalent to not less than one word, e.g. two words is written in both those latch groups and the write time of ROM is shortened.
JP3672580A 1980-03-21 1980-03-21 Rom element Pending JPS56134390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3672580A JPS56134390A (en) 1980-03-21 1980-03-21 Rom element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3672580A JPS56134390A (en) 1980-03-21 1980-03-21 Rom element

Publications (1)

Publication Number Publication Date
JPS56134390A true JPS56134390A (en) 1981-10-21

Family

ID=12477712

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3672580A Pending JPS56134390A (en) 1980-03-21 1980-03-21 Rom element

Country Status (1)

Country Link
JP (1) JPS56134390A (en)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5881798U (en) * 1981-11-25 1983-06-02 日本電気株式会社 PROM writer
JPS5995498U (en) * 1982-12-20 1984-06-28 日本電気株式会社 Storage device
JPS59152592A (en) * 1983-02-21 1984-08-31 Hitachi Ltd Programmable rom
JPS6038800A (en) * 1983-08-10 1985-02-28 Mitsubishi Electric Corp Semiconductor storage device
US4937770A (en) * 1986-02-07 1990-06-26 Teradyne, Inc. Simulation system
US4984212A (en) * 1984-09-26 1991-01-08 Hitachi, Ltd. Semiconductor memory
US4996669A (en) * 1989-03-08 1991-02-26 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with NAND memory cell structure
US5043942A (en) * 1989-08-31 1991-08-27 Kabushiki Kaisha Toshiba Nand cell type programmable read-only memory with common control gate driver circuit
US5088060A (en) * 1989-03-08 1992-02-11 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with NAND memory cell structure
US5101379A (en) * 1986-05-27 1992-03-31 Seeq Technology, Incorporated Apparatus for page mode programming of an EEPROM cell array with false loading protection
US5134583A (en) * 1988-11-22 1992-07-28 Hitachi, Ltd. Nonvolatile semiconductor memory device having redundant data lines and page mode programming
US5136546A (en) * 1984-09-26 1992-08-04 Hitachi, Ltd. Semiconductor memory
EP0508552A2 (en) * 1988-10-24 1992-10-14 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US5247480A (en) * 1989-05-02 1993-09-21 Kabushiki Kaisha Toshiba Electrically erasable progammable read-only memory with nand cell blocks
JPH0676982A (en) * 1992-08-25 1994-03-18 Origin Electric Co Ltd Monotank x-ray power supply device
US5313432A (en) * 1990-05-23 1994-05-17 Texas Instruments Incorporated Segmented, multiple-decoder memory array and method for programming a memory array
US5313420A (en) * 1987-04-24 1994-05-17 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US5397723A (en) * 1990-07-13 1995-03-14 Kabushiki Kaisha Toshiba Process for forming arrayed field effect transistors highly integrated on substrate
US5508957A (en) * 1987-09-18 1996-04-16 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory with NAND cell structure and switching transistors with different channel lengths to reduce punch-through
JP2003051197A (en) * 2001-08-06 2003-02-21 Matsushita Electric Ind Co Ltd Semiconductor memory device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50109636A (en) * 1974-01-29 1975-08-28
JPS52130536A (en) * 1976-04-26 1977-11-01 Toshiba Corp Semiconductor memory unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50109636A (en) * 1974-01-29 1975-08-28
JPS52130536A (en) * 1976-04-26 1977-11-01 Toshiba Corp Semiconductor memory unit

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5881798U (en) * 1981-11-25 1983-06-02 日本電気株式会社 PROM writer
JPS5995498U (en) * 1982-12-20 1984-06-28 日本電気株式会社 Storage device
JPS59152592A (en) * 1983-02-21 1984-08-31 Hitachi Ltd Programmable rom
JPS6038800A (en) * 1983-08-10 1985-02-28 Mitsubishi Electric Corp Semiconductor storage device
JPH0140439B2 (en) * 1983-08-10 1989-08-29 Mitsubishi Electric Corp
US5136546A (en) * 1984-09-26 1992-08-04 Hitachi, Ltd. Semiconductor memory
US4984212A (en) * 1984-09-26 1991-01-08 Hitachi, Ltd. Semiconductor memory
US4937770A (en) * 1986-02-07 1990-06-26 Teradyne, Inc. Simulation system
US5101379A (en) * 1986-05-27 1992-03-31 Seeq Technology, Incorporated Apparatus for page mode programming of an EEPROM cell array with false loading protection
US6728139B2 (en) 1987-04-24 2004-04-27 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US6434043B2 (en) 1987-04-24 2002-08-13 Kabushiki Kaisha Toshiba Programmable semiconductor memory array having series-connected memory
US5812453A (en) * 1987-04-24 1998-09-22 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US5313420A (en) * 1987-04-24 1994-05-17 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US5508957A (en) * 1987-09-18 1996-04-16 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory with NAND cell structure and switching transistors with different channel lengths to reduce punch-through
EP0508552A2 (en) * 1988-10-24 1992-10-14 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US5134583A (en) * 1988-11-22 1992-07-28 Hitachi, Ltd. Nonvolatile semiconductor memory device having redundant data lines and page mode programming
US4996669A (en) * 1989-03-08 1991-02-26 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with NAND memory cell structure
US5088060A (en) * 1989-03-08 1992-02-11 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with NAND memory cell structure
US5247480A (en) * 1989-05-02 1993-09-21 Kabushiki Kaisha Toshiba Electrically erasable progammable read-only memory with nand cell blocks
US5043942A (en) * 1989-08-31 1991-08-27 Kabushiki Kaisha Toshiba Nand cell type programmable read-only memory with common control gate driver circuit
US5313432A (en) * 1990-05-23 1994-05-17 Texas Instruments Incorporated Segmented, multiple-decoder memory array and method for programming a memory array
US5397723A (en) * 1990-07-13 1995-03-14 Kabushiki Kaisha Toshiba Process for forming arrayed field effect transistors highly integrated on substrate
JPH0676982A (en) * 1992-08-25 1994-03-18 Origin Electric Co Ltd Monotank x-ray power supply device
JP2003051197A (en) * 2001-08-06 2003-02-21 Matsushita Electric Ind Co Ltd Semiconductor memory device

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