JPS5769583A - Non_volatile semiconductor memory - Google Patents

Non_volatile semiconductor memory

Info

Publication number
JPS5769583A
JPS5769583A JP14394780A JP14394780A JPS5769583A JP S5769583 A JPS5769583 A JP S5769583A JP 14394780 A JP14394780 A JP 14394780A JP 14394780 A JP14394780 A JP 14394780A JP S5769583 A JPS5769583 A JP S5769583A
Authority
JP
Japan
Prior art keywords
data
potential
fets
addresses
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14394780A
Other languages
Japanese (ja)
Other versions
JPS628876B2 (en
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14394780A priority Critical patent/JPS5769583A/en
Priority to EP81304660A priority patent/EP0050005B1/en
Priority to DE8686201618T priority patent/DE3177270D1/en
Priority to EP19860201618 priority patent/EP0214705B1/en
Priority to DE8181304660T priority patent/DE3176751D1/en
Priority to US06/310,822 priority patent/US4477884A/en
Publication of JPS5769583A publication Critical patent/JPS5769583A/en
Publication of JPS628876B2 publication Critical patent/JPS628876B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/30Accessing single arrays
    • G11C29/34Accessing multiple bits simultaneously
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/32Timing circuits

Abstract

PURPOSE:To shorten a program time, by writing a data simultaneously in >=2 addresses of a memory area for obtaining a data of 1 bit. CONSTITUTION:IG-FET8A and 8B decide to write a data ''1'' or ''0'' in memory cells designated by a block A and B, respectively. In this case, a potential detecting circuit 9 decides an on or off state of the FETs 8A, 8B in accordance with a potential level of a supplied write data. In this case, a write data is written, for instance, by classifying it into 4 kinds of potential, and writing data of 2 addresses such as A0=''0'' and A0=''1'' by turning on and off the FETs 8A, 8B by the potential of outputs (s), (t) of the circuit 9, and 2 memory cells selected by a line decoder 5 and a row decoder 14 are programmed at the same time.
JP14394780A 1980-10-15 1980-10-15 Non_volatile semiconductor memory Granted JPS5769583A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP14394780A JPS5769583A (en) 1980-10-15 1980-10-15 Non_volatile semiconductor memory
EP81304660A EP0050005B1 (en) 1980-10-15 1981-10-07 Semiconductor memory with improved data programming time
DE8686201618T DE3177270D1 (en) 1980-10-15 1981-10-07 SEMICONDUCTOR MEMORY WITH DATA PROGRAMMING TIME.
EP19860201618 EP0214705B1 (en) 1980-10-15 1981-10-07 Semiconductor memory with improvend data programming time
DE8181304660T DE3176751D1 (en) 1980-10-15 1981-10-07 Semiconductor memory with improved data programming time
US06/310,822 US4477884A (en) 1980-10-15 1981-10-13 Semiconductor memory with improved data programming time

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14394780A JPS5769583A (en) 1980-10-15 1980-10-15 Non_volatile semiconductor memory

Publications (2)

Publication Number Publication Date
JPS5769583A true JPS5769583A (en) 1982-04-28
JPS628876B2 JPS628876B2 (en) 1987-02-25

Family

ID=15350745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14394780A Granted JPS5769583A (en) 1980-10-15 1980-10-15 Non_volatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5769583A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4984212A (en) * 1984-09-26 1991-01-08 Hitachi, Ltd. Semiconductor memory
US5136546A (en) * 1984-09-26 1992-08-04 Hitachi, Ltd. Semiconductor memory

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54107638A (en) * 1978-02-10 1979-08-23 Sanyo Electric Co Ltd Memory data readout circuit in semiconductor memory unit
JPS54110742A (en) * 1978-02-17 1979-08-30 Sanyo Electric Co Ltd Nonvolatile semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54107638A (en) * 1978-02-10 1979-08-23 Sanyo Electric Co Ltd Memory data readout circuit in semiconductor memory unit
JPS54110742A (en) * 1978-02-17 1979-08-30 Sanyo Electric Co Ltd Nonvolatile semiconductor memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4984212A (en) * 1984-09-26 1991-01-08 Hitachi, Ltd. Semiconductor memory
US5136546A (en) * 1984-09-26 1992-08-04 Hitachi, Ltd. Semiconductor memory

Also Published As

Publication number Publication date
JPS628876B2 (en) 1987-02-25

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