JPS57103189A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS57103189A
JPS57103189A JP55179788A JP17978880A JPS57103189A JP S57103189 A JPS57103189 A JP S57103189A JP 55179788 A JP55179788 A JP 55179788A JP 17978880 A JP17978880 A JP 17978880A JP S57103189 A JPS57103189 A JP S57103189A
Authority
JP
Japan
Prior art keywords
cells
sense amplifier
output
input terminal
written
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55179788A
Other languages
Japanese (ja)
Inventor
Kazuhiro Toyoda
Yasuhisa Sugao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55179788A priority Critical patent/JPS57103189A/en
Publication of JPS57103189A publication Critical patent/JPS57103189A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To shorten write recovery time by applying the output of a high-speed auxiliary memory to the input terminal of a sense amplifier during writing operation and by applying the output of a selected memory cell to the sense amplifier for stopping the application when an address is changed. CONSTITUTION:Memory cells MC are arranged at respective intersections of word lines Wj0-Wj1, and bit lines Bi0-Bi1; and a write amplifier writes data in the cells, and a sense amplifier SA reads data to be written out of the cells. This semiconductor memory is provided with a high-speed auxiliary memory FF2 wherein the same write data Din with the cells are written when the data are written in the cells, and a switching circuit, consisting of an FF1, a transistor T3 and an input buffer BA, which applies the output of the auxiliary memory FF2 to the input terminal of the sense amplifier SA during writing operation and stops the application to the SA in case of an address change AA to apply the output of a selected memory cell to the input terminal of the sense amplifier SA.
JP55179788A 1980-12-19 1980-12-19 Semiconductor memory Pending JPS57103189A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55179788A JPS57103189A (en) 1980-12-19 1980-12-19 Semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55179788A JPS57103189A (en) 1980-12-19 1980-12-19 Semiconductor memory

Publications (1)

Publication Number Publication Date
JPS57103189A true JPS57103189A (en) 1982-06-26

Family

ID=16071896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55179788A Pending JPS57103189A (en) 1980-12-19 1980-12-19 Semiconductor memory

Country Status (1)

Country Link
JP (1) JPS57103189A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4604533A (en) * 1982-12-28 1986-08-05 Tokyo Shibaura Denki Kabushiki Kaisha Sense amplifier
JPS6464195A (en) * 1987-06-02 1989-03-10 Texas Instruments Inc Hybrid semiconductor memory
JPH023173A (en) * 1988-04-27 1990-01-08 Hitachi Ltd Semiconductor circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4604533A (en) * 1982-12-28 1986-08-05 Tokyo Shibaura Denki Kabushiki Kaisha Sense amplifier
JPS6464195A (en) * 1987-06-02 1989-03-10 Texas Instruments Inc Hybrid semiconductor memory
JPH023173A (en) * 1988-04-27 1990-01-08 Hitachi Ltd Semiconductor circuit

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