JPS6462897A - Storage device - Google Patents

Storage device

Info

Publication number
JPS6462897A
JPS6462897A JP62218677A JP21867787A JPS6462897A JP S6462897 A JPS6462897 A JP S6462897A JP 62218677 A JP62218677 A JP 62218677A JP 21867787 A JP21867787 A JP 21867787A JP S6462897 A JPS6462897 A JP S6462897A
Authority
JP
Japan
Prior art keywords
data
memory
reading
writing
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62218677A
Other languages
Japanese (ja)
Inventor
Toshiharu Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62218677A priority Critical patent/JPS6462897A/en
Publication of JPS6462897A publication Critical patent/JPS6462897A/en
Pending legal-status Critical Current

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  • Dram (AREA)

Abstract

PURPOSE:To speed up a writing operation only for the time of reading operation, by executing the writing operation without accompanying the reading operation when data are transferred from a serial access memory. CONSTITUTION:When the data are written to a dynamic memory 1 in which a memory cell is arranged in a matrix shape and all the memory cells of the arbitrary line of the dynamic memory 1 having a serial access memory 2 connected to the input side of the dynamic memory 1, data from the serial access memory 2 are outputted to a bit line simultaneously with the selecting operation of a word line to correspond to the arbitrary line or preceding to the selecting operation. Then, the writing of the data is executed without accompanying the reading of the data from the respective memory cells. When the data are written to all the memory cells of the arbitrary line, it is eliminated to read the data in advance since all the data of the line are updated. Accordingly, by executing the writing of the data without accompanying the reading of the data, high speed can be realized only by a part in which the reading operation is eliminated.
JP62218677A 1987-09-01 1987-09-01 Storage device Pending JPS6462897A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62218677A JPS6462897A (en) 1987-09-01 1987-09-01 Storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62218677A JPS6462897A (en) 1987-09-01 1987-09-01 Storage device

Publications (1)

Publication Number Publication Date
JPS6462897A true JPS6462897A (en) 1989-03-09

Family

ID=16723691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62218677A Pending JPS6462897A (en) 1987-09-01 1987-09-01 Storage device

Country Status (1)

Country Link
JP (1) JPS6462897A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003022671A (en) * 2001-07-09 2003-01-24 Fujitsu Ltd Semiconductor memory

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5358736A (en) * 1976-11-08 1978-05-26 Toshiba Corp Input/output control system for mos dynamic random access memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5358736A (en) * 1976-11-08 1978-05-26 Toshiba Corp Input/output control system for mos dynamic random access memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003022671A (en) * 2001-07-09 2003-01-24 Fujitsu Ltd Semiconductor memory

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