DE102014116666B4 - Ein Verfahren zum Bilden eines Halbleiterbauelements - Google Patents

Ein Verfahren zum Bilden eines Halbleiterbauelements Download PDF

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Publication number
DE102014116666B4
DE102014116666B4 DE102014116666.3A DE102014116666A DE102014116666B4 DE 102014116666 B4 DE102014116666 B4 DE 102014116666B4 DE 102014116666 A DE102014116666 A DE 102014116666A DE 102014116666 B4 DE102014116666 B4 DE 102014116666B4
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carbon
semiconductor substrate
protons
concentration
semiconductor
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DE102014116666.3A
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German (de)
English (en)
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DE102014116666A1 (de
Inventor
Hans-Joachim Schulze
Johannes Georg Laven
Moriz Jelinek
Helmut Oefner
Werner Schustereder
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Infineon Technologies AG
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Infineon Technologies AG
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Priority to DE102014116666.3A priority Critical patent/DE102014116666B4/de
Priority to US14/935,830 priority patent/US9972704B2/en
Priority to JP2015221920A priority patent/JP6619210B2/ja
Priority to CN201510776583.1A priority patent/CN105609407B/zh
Publication of DE102014116666A1 publication Critical patent/DE102014116666A1/de
Priority to JP2017151202A priority patent/JP6835682B2/ja
Priority to US15/831,247 priority patent/US10529838B2/en
Priority to JP2021016333A priority patent/JP7140860B2/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60Impurity distributions or concentrations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/207Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics

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  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE102014116666.3A 2014-11-14 2014-11-14 Ein Verfahren zum Bilden eines Halbleiterbauelements Active DE102014116666B4 (de)

Priority Applications (7)

Application Number Priority Date Filing Date Title
DE102014116666.3A DE102014116666B4 (de) 2014-11-14 2014-11-14 Ein Verfahren zum Bilden eines Halbleiterbauelements
US14/935,830 US9972704B2 (en) 2014-11-14 2015-11-09 Method for forming a semiconductor device and a semiconductor device
JP2015221920A JP6619210B2 (ja) 2014-11-14 2015-11-12 半導体装置を形成する方法および半導体装置
CN201510776583.1A CN105609407B (zh) 2014-11-14 2015-11-13 用于形成半导体器件的方法和半导体器件
JP2017151202A JP6835682B2 (ja) 2014-11-14 2017-08-04 半導体装置を形成する方法および半導体装置
US15/831,247 US10529838B2 (en) 2014-11-14 2017-12-04 Semiconductor device having a variable carbon concentration
JP2021016333A JP7140860B2 (ja) 2014-11-14 2021-02-04 半導体装置を形成する方法および半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102014116666.3A DE102014116666B4 (de) 2014-11-14 2014-11-14 Ein Verfahren zum Bilden eines Halbleiterbauelements

Publications (2)

Publication Number Publication Date
DE102014116666A1 DE102014116666A1 (de) 2016-05-19
DE102014116666B4 true DE102014116666B4 (de) 2022-04-21

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US (2) US9972704B2 (enExample)
JP (3) JP6619210B2 (enExample)
CN (1) CN105609407B (enExample)
DE (1) DE102014116666B4 (enExample)

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DE102016112139B3 (de) * 2016-07-01 2018-01-04 Infineon Technologies Ag Verfahren zum Reduzieren einer Verunreinigungskonzentration in einem Halbleiterkörper
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JP7045005B2 (ja) * 2017-05-19 2022-03-31 学校法人東北学院 半導体装置
JP7052322B2 (ja) 2017-11-28 2022-04-12 富士電機株式会社 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
JP6835291B2 (ja) 2018-03-19 2021-02-24 富士電機株式会社 半導体装置および半導体装置の製造方法
JP6645546B1 (ja) * 2018-09-03 2020-02-14 株式会社Sumco シリコン試料の炭素濃度評価方法、シリコンウェーハ製造工程の評価方法、シリコンウェーハの製造方法およびシリコン単結晶インゴットの製造方法
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JP7099541B2 (ja) * 2018-11-16 2022-07-12 富士電機株式会社 半導体装置および製造方法
DE112019001738B4 (de) 2018-11-16 2024-10-10 Fuji Electric Co., Ltd. Halbleitervorrichtung und herstellungsverfahren
DE102018132236B4 (de) * 2018-12-14 2023-04-27 Infineon Technologies Ag Leistungshalbleiterbauelement und Verfahren zu dessen Herstellung
CN112204710B (zh) 2018-12-28 2024-07-09 富士电机株式会社 半导体装置及制造方法
JP7173312B2 (ja) 2019-05-16 2022-11-16 富士電機株式会社 半導体装置および半導体装置の製造方法
WO2021049499A1 (ja) 2019-09-11 2021-03-18 富士電機株式会社 半導体装置および製造方法
WO2021070584A1 (ja) 2019-10-11 2021-04-15 富士電機株式会社 半導体装置および半導体装置の製造方法
CN113711364B (zh) 2019-10-11 2025-07-15 富士电机株式会社 半导体装置和半导体装置的制造方法
JP7363336B2 (ja) * 2019-10-11 2023-10-18 富士電機株式会社 半導体装置および半導体装置の製造方法
DE112020002227T5 (de) 2019-12-17 2022-02-17 Fuji Electric Co., Ltd. Halbleitervorrichtung
WO2021166980A1 (ja) 2020-02-18 2021-08-26 富士電機株式会社 半導体装置
JP7361634B2 (ja) * 2020-03-02 2023-10-16 三菱電機株式会社 半導体装置及び半導体装置の製造方法
JP7323049B2 (ja) 2020-03-04 2023-08-08 富士電機株式会社 半導体装置および半導体装置を備えた電力変換装置
WO2021186944A1 (ja) * 2020-03-17 2021-09-23 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
JP7264100B2 (ja) * 2020-04-02 2023-04-25 信越半導体株式会社 シリコン単結晶基板中のドナー濃度の制御方法
DE112021001364B4 (de) * 2020-11-17 2025-11-20 Fuji Electric Co., Ltd. Halbleitervorrichtung
US12437659B2 (en) 2020-12-23 2025-10-07 Yamaha Motor Corporation, Usa Aircraft auto landing system
JP7683287B2 (ja) 2021-04-08 2025-05-27 富士電機株式会社 半導体装置および製造方法
WO2023233802A1 (ja) 2022-05-30 2023-12-07 富士電機株式会社 半導体装置の製造方法
JP2024014333A (ja) * 2022-07-22 2024-02-01 富士電機株式会社 半導体装置および半導体装置の製造方法
DE112023002207T5 (de) 2022-12-13 2025-03-13 Fuji Electric Co., Ltd. Halbleitervorrichtung und Herstellungsverfahren einer Halbleitervorrichtung
JPWO2025028573A1 (enExample) * 2023-08-01 2025-02-06
JPWO2025084305A1 (enExample) * 2023-10-17 2025-04-24

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JP2021082829A (ja) 2021-05-27
US20180102423A1 (en) 2018-04-12
US9972704B2 (en) 2018-05-15
JP7140860B2 (ja) 2022-09-21
CN105609407A (zh) 2016-05-25
DE102014116666A1 (de) 2016-05-19
JP2016096338A (ja) 2016-05-26
CN105609407B (zh) 2019-04-30
JP6619210B2 (ja) 2019-12-11
US20160141399A1 (en) 2016-05-19
JP6835682B2 (ja) 2021-02-24
JP2017228783A (ja) 2017-12-28
US10529838B2 (en) 2020-01-07

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