DE102005052213A1 - Programmierverfahren und nichtflüchtiges Speicherbauelement - Google Patents

Programmierverfahren und nichtflüchtiges Speicherbauelement Download PDF

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Publication number
DE102005052213A1
DE102005052213A1 DE102005052213A DE102005052213A DE102005052213A1 DE 102005052213 A1 DE102005052213 A1 DE 102005052213A1 DE 102005052213 A DE102005052213 A DE 102005052213A DE 102005052213 A DE102005052213 A DE 102005052213A DE 102005052213 A1 DE102005052213 A1 DE 102005052213A1
Authority
DE
Germany
Prior art keywords
voltage
programming
during
loop
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE102005052213A
Other languages
German (de)
English (en)
Inventor
Jae-Yong Yongin Jeong
Heung-Soo Yongin Lim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020040085749A external-priority patent/KR100572332B1/ko
Priority claimed from KR1020040089952A external-priority patent/KR100648272B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE102005052213A1 publication Critical patent/DE102005052213A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits

Landscapes

  • Read Only Memory (AREA)
DE102005052213A 2004-10-26 2005-10-26 Programmierverfahren und nichtflüchtiges Speicherbauelement Withdrawn DE102005052213A1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2004-0085749 2004-10-26
KR1020040085749A KR100572332B1 (ko) 2004-10-26 2004-10-26 불 휘발성 메모리 장치 및 그것의 프로그램 방법
KR1020040089952A KR100648272B1 (ko) 2004-11-05 2004-11-05 불 휘발성 메모리 장치 및 그것의 프로그램 방법
KR10-2004-0089952 2004-11-05

Publications (1)

Publication Number Publication Date
DE102005052213A1 true DE102005052213A1 (de) 2006-05-04

Family

ID=36202086

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102005052213A Withdrawn DE102005052213A1 (de) 2004-10-26 2005-10-26 Programmierverfahren und nichtflüchtiges Speicherbauelement

Country Status (3)

Country Link
US (2) US7286413B2 (https=)
JP (1) JP4870409B2 (https=)
DE (1) DE102005052213A1 (https=)

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KR100645049B1 (ko) * 2004-10-21 2006-11-10 삼성전자주식회사 프로그램 특성을 향상시킬 수 있는 불 휘발성 메모리 장치및 그것의 프로그램 방법
KR100784863B1 (ko) 2006-11-23 2007-12-14 삼성전자주식회사 향상된 프로그램 성능을 갖는 플래시 메모리 장치 및그것의 프로그램 방법
KR100824203B1 (ko) * 2007-04-03 2008-04-21 주식회사 하이닉스반도체 플래시 메모리 소자의 프로그램 방법
KR101348173B1 (ko) * 2007-05-25 2014-01-08 삼성전자주식회사 플래시 메모리 장치, 그것의 소거 및 프로그램 방법들,그리고 그것을 포함한 메모리 시스템
KR100888844B1 (ko) * 2007-06-28 2009-03-17 삼성전자주식회사 프로그램 성능을 향상시킬 수 있는 플래시 메모리 장치 및그것의 프로그램 방법
KR101448851B1 (ko) * 2008-02-26 2014-10-13 삼성전자주식회사 비휘발성 메모리 장치에서의 프로그래밍 방법
US8639903B2 (en) * 2010-05-13 2014-01-28 Micron Technology, Inc. Staggered programming for resistive memories
KR102127105B1 (ko) 2013-11-11 2020-06-29 삼성전자 주식회사 비휘발성 메모리 장치의 구동 방법
KR102609473B1 (ko) * 2016-06-17 2023-12-04 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
KR20180032391A (ko) * 2016-09-22 2018-03-30 에스케이하이닉스 주식회사 반도체 메모리 장치
US10580495B2 (en) * 2017-12-21 2020-03-03 Western Digital Technologies, Inc. Partial program operation of memory wordline
KR102528274B1 (ko) * 2018-11-06 2023-05-02 삼성전자주식회사 비휘발성 메모리 장치 및 그 구동 방법

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JPS6352399A (ja) 1986-08-22 1988-03-05 Hitachi Ltd イーピーロム
JPH09213913A (ja) 1996-02-06 1997-08-15 Hitachi Ltd 半導体記憶装置、及びデータ処理装置
US5712815A (en) * 1996-04-22 1998-01-27 Advanced Micro Devices, Inc. Multiple bits per-cell flash EEPROM capable of concurrently programming and verifying memory cells and reference cells
JP3433091B2 (ja) * 1998-02-19 2003-08-04 三洋電機株式会社 不揮発性半導体メモリ装置
KR19990029775A (ko) * 1997-09-11 1999-04-26 오카모토 세이시 불휘발성 반도체 기억 장치
JPH11328981A (ja) * 1998-05-12 1999-11-30 Matsushita Electric Ind Co Ltd 半導体記憶装置，およびレギュレータ
KR100328359B1 (ko) 1999-06-22 2002-03-13 윤종용 기판 전압 바운싱을 최소화할 수 있는 플래시 메모리 장치 및그것의 프로그램 방법
JP2001015716A (ja) * 1999-06-30 2001-01-19 Matsushita Electric Ind Co Ltd 半導体記憶装置
KR20010018711A (ko) 1999-08-21 2001-03-15 윤종용 노아형 플래쉬 메모리 장치 및 프로그램 제어방법
JP3940544B2 (ja) * 2000-04-27 2007-07-04 株式会社東芝 不揮発性半導体メモリのベリファイ方法
JP2002025287A (ja) * 2000-07-12 2002-01-25 Hitachi Ltd 半導体記憶装置
EP1178492B1 (en) * 2000-07-18 2008-12-10 STMicroelectronics S.r.l. A method and a circuit structure for modifying the threshold voltages of non-volatile memory cells
DE60033818T2 (de) * 2000-09-18 2007-11-15 Stmicroelectronics S.R.L., Agrate Brianza Verfahren und Schaltung zur Programmierung eines nichtflüchtigen Multibitspeichers mit einer reduzierten Anzahl von Kontaktstiften
JP2002133878A (ja) * 2000-10-23 2002-05-10 Hitachi Ltd 不揮発性記憶回路および半導体集積回路
KR100395771B1 (ko) * 2001-06-16 2003-08-21 삼성전자주식회사 불휘발성 반도체 메모리 장치 및 그것의 프로그램 방법
JP4339532B2 (ja) * 2001-07-25 2009-10-07 富士通マイクロエレクトロニクス株式会社 セルフタイミング回路を有するスタティックメモリ
JP2003203488A (ja) * 2001-12-28 2003-07-18 Mitsubishi Electric Corp 不揮発性半導体メモリ
KR100496866B1 (ko) * 2002-12-05 2005-06-22 삼성전자주식회사 미프로그램된 셀들 및 과프로그램된 셀들 없이 균일한문턱 전압 분포를 갖는 플레쉬 메모리 장치 및 그프로그램 검증 방법
KR100502661B1 (ko) 2002-12-11 2005-07-22 주식회사 하이닉스반도체 반도체메모리장치의 비트라인센싱회로
US6747900B1 (en) * 2003-01-21 2004-06-08 Advanced Micro Devices, Inc. Memory circuit arrangement for programming a memory cell
KR100632944B1 (ko) * 2004-05-31 2006-10-12 삼성전자주식회사 동작 모드에 따라 프로그램 전압의 증가분을 가변할 수있는 불 휘발성 메모리 장치
KR100626377B1 (ko) * 2004-06-07 2006-09-20 삼성전자주식회사 동작 모드에 따라 프로그램 전압의 증가분을 가변할 수있는 불 휘발성 메모리 장치
KR100634412B1 (ko) * 2004-09-02 2006-10-16 삼성전자주식회사 향상된 프로그램 특성을 갖는 불 휘발성 메모리 장치
KR100645050B1 (ko) * 2004-10-21 2006-11-10 삼성전자주식회사 프로그램 특성을 향상시킬 수 있는 불 휘발성 메모리 장치및 그것의 프로그램 방법
KR100648278B1 (ko) * 2004-11-05 2006-11-23 삼성전자주식회사 벌크 라인 전압에 따른 프로그램 실행 구간의서스펜드/리쥼 기능을 갖는 불 휘발성 메모리 장치 및그것의 프로그램 방법

Also Published As

Publication number Publication date
US7286413B2 (en) 2007-10-23
US7457165B2 (en) 2008-11-25
JP4870409B2 (ja) 2012-02-08
US20080043536A1 (en) 2008-02-21
JP2006127738A (ja) 2006-05-18
US20060087891A1 (en) 2006-04-27

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OP8 Request for examination as to paragraph 44 patent law
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20110502