CN1921079B - 配线基板的制造方法 - Google Patents

配线基板的制造方法 Download PDF

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Publication number
CN1921079B
CN1921079B CN2006101099819A CN200610109981A CN1921079B CN 1921079 B CN1921079 B CN 1921079B CN 2006101099819 A CN2006101099819 A CN 2006101099819A CN 200610109981 A CN200610109981 A CN 200610109981A CN 1921079 B CN1921079 B CN 1921079B
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insulating barrier
reinforced layer
layer
wiring
wiring substrate
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CN1921079A (zh
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山野孝治
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Shinko Electric Industries Co Ltd
Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
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Abstract

本发明公开了一种配线基板的制造方法，所述配线基板包括嵌入有半导体芯片的绝缘层，所述方法包括：在支撑基板上形成其中嵌入有半导体芯片的绝缘层和配线，所述配线连接到所述半导体芯片上；去除所述支撑基板；以及在去除所述支撑基板之后，同时形成第一加强层和第二加强层，以便将所述绝缘层夹在所述第一加强层和所述第二加强层之间。

Description

配线基板的制造方法
技术领域
本发明涉及一种配线基板的制造方法，特别地，本发明涉及其中结合有半导体芯片的一种配线基板。
背景技术
现在，使用半导体器件(诸如半导体芯片等)的电子装置的性能日益提高，因此，存在这样的需求，即以更高密度将半导体芯片安装在基板上，使安装有该半导体芯片的基板小型化并减小尺寸。
这样，已经提出了其中置入半导体芯片的基板，即所谓的芯片内置式配线基板(例如参见JP-A-2004-327624)和设计为将半导体芯片置入基板的各种结构。这种芯片内置式配线基板具有连接到半导体芯片的配线，并包括在其上形成以将该配线基板连接到其他器件、母板等的连接部。
然而，在提供具有薄型化设计和更高封装密度的芯片内置式配线基板的情况下，可能会出现配线基板翘曲的问题。为应对这种翘曲，需要这样的结构，即例如具有预定厚度的芯板等基板层压在嵌入有半导体芯片的层上，以有效抑制翘曲。在这种层压结构中，难以获得配线基板的薄型化设计和更高密度。
发明内容
鉴于以上情形做出本发明，并且本发明提供一种解决以上问题的创新、有用的配线基板的制造方法。
本发明实施例的目的在于：获得一种薄型化的芯片内置式配线基板，并且可以抑制该配线基板的翘曲。
在本发明的某些实施方案中，配线基板的制造方法包括：
在支撑基板上形成绝缘层和配线，在所述绝缘层中嵌入有半导体芯片，所述配线连接到所述半导体芯片上；
去除所述支撑基板；以及
在去除所述支撑基板之后，同时形成第一加强层和第二加强层，以便将所述绝缘层夹在所述第一加强层和所述第二加强层之间。
根据本发明的方法，在形成嵌入有半导体芯片的绝缘层和连接到该半导体芯片的配线之后，去除支撑基板，接着同时形成第一和第二加强层，以便将不存在支撑基板的绝缘层等夹在第一加强层和第二加强层之间。通常，加强层在固化时会表现出较大收缩。然而，由于第一和第二加强层是同时形成以将绝缘层夹在它们之间的，所以固化时产生的收缩是从该绝缘层的上方和下方均匀施加的，这样便可以防止翘曲的发生。
在配线基板的制造方法中，加强层由预浸渍材料制成。
根据本发明的方法，使用预浸渍材料作为加强层。这使得易于形成加强层，并且提高了加强层的刚度。
所述配线基板的制造方法包括：
在所述支撑基板上形成所述绝缘层和所述配线之前，在所述支撑基板上形成停止层，其中，由所述停止层停止所述支撑基板的去除。
根据本发明的方法，由停止层停止支撑基板的去除，从而防止支撑基板的去除对该停止层内侧的层产生影响。这样，使去除支撑基板过程中去除处理的控制变得容易，从而简化了配线基板的制造。
所述配线基板的制造方法包括：
在形成所述第一加强层和所述第二加强层之后，同时形成第一阻焊层和第二阻焊层，所述第一阻焊层层压在所述第一加强层上，所述第二阻焊层层压在所述第二加强层上，其中，在所述第一阻焊层和所述第二阻焊层中的每一个的配线位置处形成有开口。
所述配线基板的制造方法包括：
在形成所述第一阻焊层和所述第二阻焊层之后，同时在第一配线和第二配线上进行表面处理，所述第一配线和所述第二配线分别从在所述第一阻焊层中形成的所述开口和在所述第二阻焊层中形成的所述开口露出。
根据本发明的方法，可以同时形成这样的各层，即在绝缘层的顶面和底面形成的各层，从而简化了制造工艺，减少了制造所需的时间。
根据本发明的方法，可以提供抑制配线基板中翘曲的薄型化的芯片内置式配线基板。
附图说明
图1为通过根据本发明实施例的配线基板的制造方法制造的配线基板的示意横截面视图。
图2为逐步示出根据本发明实施例的配线基板的制造方法的附图(1)。
图3为逐步示出根据本发明实施例的配线基板的制造方法的附图(2)。
图4为逐步示出根据本发明实施例的配线基板的制造方法的附图(3)。
图5为逐步示出根据本发明实施例的配线基板的制造方法的附图(4)。
图6为逐步示出根据本发明实施例的配线基板的制造方法的附图(5)。
图7为逐步示出根据本发明实施例的配线基板的制造方法的附图(6)。
图8为逐步示出根据本发明实施例的配线基板的制造方法的附图(7)。
图9为逐步示出根据本发明实施例的配线基板的制造方法的附图(8)。
图10为逐步示出根据本发明实施例的配线基板的制造方法的附图(9)。
图11为逐步示出根据本发明实施例的配线基板的制造方法的附图(10)。
图12为逐步示出根据本发明实施例的配线基板的制造方法的附图(11)。
图13为逐步示出根据本发明实施例的配线基板的制造方法的附图(12)。
图14为逐步示出根据本发明实施例的配线基板的制造方法的附图(13)。
图15为逐步示出根据本发明实施例的配线基板的制造方法的附图(14)。
图16为逐步示出根据本发明实施例的配线基板的制造方法的附图(15)。
图17为逐步示出根据本发明实施例的配线基板的制造方法的附图(16)。
图18为逐步示出根据本发明实施例的配线基板的制造方法的附图(17)。
图19为逐步示出根据本发明实施例的配线基板的制造方法的附图(18)。
图20为逐步示出根据本发明实施例的配线基板的制造方法的附图(19)。
图21为逐步示出根据本发明实施例的配线基板的制造方法的附图(20)。
具体实施方式
下面将参照附图说明本发明的优选实施例。
图1为通过本发明实施例的配线基板的制造方法制造的配线基板100的示意横截面视图。为了便于说明起见，在说明配线基板100的制造方法之前，首先说明配线基板100的结构。
如图1中所示，在本实施例中制造的配线基板100具有嵌入半导体芯片110的绝缘层106，该绝缘层包括例如环氧树脂等所谓增层树脂(buildup resin)材料。并且，相对于绝缘层106形成第一和第二加强层103、114。
如图中所示，加强层103、114设置为从上部和底部将绝缘层106夹在它们之间。加强层103、114是用例如预浸渍材料等具有高刚度的材料形成的。绝缘层106由如前所述的挠性增层树脂材料构成。这样，通过设置用以将绝缘层106夹在其间的加强层103、114，绝缘层106通过加强层103、114而得以加强。
半导体芯片110连接到配线部(将在后面介绍)，并通过该配线部连接到在阻焊层119中的开口中形成的电极102或阻焊层117中的开口中形成的电极118。电极102或118用于连接到例如母板、其他器件或连接器件等。
在半导体芯片110的电极片(未示出)上，形成由例如金构成的柱形凸点111。柱形凸点111通过例如焊料连接部109连接到嵌入绝缘层106中的配线部108。从保护柱形凸点111和防止产生应力的观点出发，在半导体芯片110的下部形成底部填充层110A。
配线基板100具有配线部105、113、116以及配线部108。配线部105、108、113、116由例如铜构成。
配线部105包括导通塞105a和图案配线105b。导通塞105a形成在加强层103中形成的开口处。连接到导通塞105a的图案配线105b形成在加强层103上。
配线部108形成在绝缘层106中。如图中所示，配线部108形成在配线部105的上方。配线部108包括在图案配线105b上形成的导通塞108a和连接到导通塞108a的图案配线108b。如前所述，半导体芯片110通过焊料连接部109和柱形凸点111连接到图案配线108b。
配线部113形成在绝缘层106中。如图中所示，配线部113形成在配线部108的上方。配线部113电连接到配线部108。配线部113包括在图案配线108b上形成的导通塞113a和连接到导通塞113a的图案配线113b。
如图中所示，在配线部113的上方形成配线部116。配线部116电连接到配线部113。配线部116包括在图案配线113b上形成的导通塞116a和连接到导通塞116a的图案配线116b。导通塞116a形成在加强层114中形成的开口处。图案配线116b形成在加强层114上。
在位于绝缘层106下方的阻焊层119中的开口处，形成连接到导通塞105a的电极102。在位于绝缘层106上方的阻焊层117的开口处，形成连接到导通塞116b的电极118。这样，配线基板100可以通过在顶部和底部的电极102、118提供到半导体芯片110的电连接。
阻焊层119、117是以覆盖加强层103和114的方式而形成的。在每个阻焊层119、117中，形成有用于形成电极102、118的开口。根据需要，在电极102上形成焊球120。也可以在电极118上形成焊球120。
如此构造的配线基板100具有半导体芯片110和配线部105、108、113、116嵌入其中的绝缘层106，其中，一对加强层103、114将绝缘层106夹在它们之间。这样，即使当绝缘层106由挠性树脂材料制成时，也可以由具有高刚度的加强层103、114从两侧加强绝缘层106。这减少了配线基板100中的翘曲，可以给配线基板100提供高的平整度，并且可以应对精细设置的配线。
举例来说，优选的是用预浸渍材料形成加强层103、114。可以使用预浸渍材料作为用于形成多层配线基板(增层基板)的芯板材料。
举例来说，预浸渍材料具有用环氧树脂浸渍玻璃纤维的结构，并具有比一般增层树脂材料更高的热固化后刚度。例如，增层树脂材料的弹性模量(杨氏模量)为大约5GPa至8GPa，而预浸渍材料的弹性模量为20GPa或更高，这表明后者的刚度更高，从而可以减少配线基板中的翘曲。
用于加强层103、114的材料并不局限于预浸渍材料，而可以是具有高刚度的模制树脂。尽管优选的是在使用例如金属等导电材料的情况下，增加用以使配线部与加强层绝缘的结构，但是用于加强层103、114的材料可以是金属材料。可以基于允许配线基板100的薄型化设计的增层法，形成根据本实施例的配线基板100。
接下来，将参照图2至21，逐步说明配线基板的制造方法。
在图2中示出的工艺中，提供由例如铜等导电材料构成的200微米厚的支撑基板101。通过电镀法在支撑基板101上形成停止层121。停止层121为2至3微米厚的镍膜，并且是这样形成的：即，使用支撑基板101作为电极，通过电镀法在支撑基板101的顶面上形成该停止层。
在此时，对于上述电镀来说，是用支撑基板101作为通电路径。这样，支撑基板101优选为导电材料，或者更加优选为例如铜等低电阻材料。
在图3中示出的工艺中，在形成停止层121的支撑基板101上形成图案配线105b。更确切地说，图案配线105b是这样形成的：即，通过光刻法形成抗蚀图案(未示出)，将该抗蚀图案作为掩模，以通过电镀沉积铜，然后去除该抗蚀图案从而形成图案配线105b。
接下来，在图4中示出的工艺中，在支撑基板101上形成绝缘层106，以便覆盖图案配线105b。绝缘层106由例如热固性环氧树脂等增层材料制成。用激光束在支撑基板101上形成的绝缘层106中形成导通孔106A，以便露出图案配线105b的一部分。
接下来，在图5中示出的工艺中，根据需要，在绝缘层106的表面上进行去污工艺，以去除导通孔中的残留物，并进行表面处理。接着，通过无电解电镀，在绝缘层106的表面和露出的图案配线105b的表面上形成由铜构成的种晶层(seed layer)107。
接下来，在图6中示出的工艺中，使用光刻法以形成抗蚀图案(未示出)。接下来，将抗蚀图案作为掩模，实施电解镀铜，从而在导通孔106A中形成导通塞108a，以及在绝缘层106上形成一体连接到导通塞108a的图案配线108b。导通塞108a和图案配线108b构成配线部108。当形成配线部108时，剥去抗蚀图案，并通过蚀刻去除露出的多余种晶层107。
接下来，在图7中示出的工艺中，在绝缘层106上形成绝缘层106a，以便覆盖配线部108。绝缘层106a由例如热固性环氧树脂等的增层材料制成，即与绝缘层106的材料相同。这样，绝缘层106a和绝缘层106实质上成为一体。在图7中及以后示出的工艺中，假定绝缘层106包括绝缘层106a。
接下来，在图8中示出的工艺中，通过使用激光束加工方法，在绝缘层106中形成开口106B，以便露出配线部108的一部分(导通塞108a)。接下来，根据需要，向绝缘层106施加去污工艺，以去除开口中的残留物，并进行表面处理。此后，如图9中所示，使用电镀法以在开口106B处形成焊料连接部109。
接下来，在图10中示出的工艺中，执行将半导体芯片110安装在绝缘层106上的工艺。半导体芯片110具有预先在其上形成的由金构成的柱形凸点111。在半导体芯片110上，柱形凸点111和焊料连接部109定位为互相对应，并通过倒装芯片法连接到配线部108(图案配线108b)上。在此时，在半导体芯片110和绝缘层106之间形成底部填充层110A。
接下来，在图11中示出的工艺中，在绝缘层106上形成绝缘层106b，以便覆盖半导体芯片110。绝缘层106b由例如热固性环氧树脂等的增层材料制成。绝缘层106b和绝缘层106实质上成为一体。在图11中及以后示出的工艺中，假定绝缘层106包括绝缘层106b。
接下来，在图12中示出的工艺中，在绝缘层106中形成导通孔106C。导通孔106C是这样形成的：即，通过例如使用激光束加工方法，以露出图案配线108b的方式形成的。接下来，根据需要，在绝缘层106的表面上施加去污工艺，从而去除导通孔中的残留物，并进行表面处理。
接下来，通过无电解电镀法，在绝缘层106的表面上和图案配线108b的表面上形成由铜构成的种晶层112。种晶层112通过配线部108、图案配线105b和由镍构成的停止层121电连接到由铜构成的支撑基板101上。
接下来，在图13中示出的工艺中，使用光刻法形成抗蚀图案(未示出)。接下来，将抗蚀图案作为掩模以实施电解镀铜，从而在导通孔106C中形成导通塞113a，以及在绝缘层106上形成连接到导通塞113a的图案配线113b。导通塞113a和图案配线113b构成配线部113。当形成配线部113时，剥去抗蚀图案，并通过蚀刻去除露出的多余种晶层。
接下来，在图14中示出的工艺中，在绝缘层106上形成由例如热固性环氧树脂构成的绝缘层(增层)106c，以便覆盖配线部108。绝缘层106c和绝缘层106实质上成为一体。在图14中及以后示出的工艺中，假定绝缘层106包括绝缘层106c。
在前述各个工艺中，进行在支撑基板101上层压绝缘层106、图案配线105b和配线部108、113的工艺。在此时，绝缘层106由具有较小弹性模量、并在其中装填有致密填料的树脂材料制成，该树脂材料不太可能在该绝缘层中产生翘曲。这样，在图2至14中示出的工艺中，不会发生问题性翘曲。
接下来，在图15中示出的工艺中，通过蚀刻去除支撑基板101。所使用的蚀刻液应该溶解支撑基板101(铜)，而不应溶解停止层121的镍。这使得停止层121停止支撑基板101的去除，从而防止蚀刻液对停止层121内侧的层(即绝缘层106、图案配线105b和配线部108、113)产生影响。另外，使去除支撑基板101过程中的去除处理管理变得容易，从而简化了配线基板100的制造。当完成支撑基板101的去除时，用溶解镍而不会溶解铜的蚀刻液去除停止层121。
去除支撑基板101，意味着没有任何部件支撑绝缘层106。当去除支撑基板101时，绝缘层106为大约200至300微米厚，这保证了承受处理的刚度。支撑基板101的缺少不会成为后面所述的图16中及以后示出的工艺的障碍。
接下来，在图16中示出的工艺中，在绝缘层106的下方形成加强层103，同时在绝缘层106的上方形成加强层114。这样，加强层103和114将绝缘层106夹在它们之间。
这里，同时形成加强层103和114。这意味着同时进行加强层103和114的固化，以便从绝缘层106等的上方和下方均匀施加加强层103和114在固化时产生的收缩，从而防止配线基板可能的翘曲。此外，通过同时进行固化，加强层103的热历程和加强层114的热历程可以是相同的。
在这种情况下，暂时将加强层103和114挤压并附着到绝缘层106上，然后进行固化。加强层103和114可以分别或同时附着到绝缘层106上。
通过例如在热量和压力下层压预浸渍材料来形成加强层103、114。预浸渍材料具有用如前所述的环氧树脂浸渍玻璃纤维的结构，并具有比一般增层树脂材料更高的热固化后刚度。例如，增层树脂材料的弹性模量(杨氏模量)为大约5GPa至8GPa，而预浸渍材料的弹性模量为20GPa或更高，这表明后者的刚度更高，从而可以减少配线基板中的翘曲。
接下来，在图17中示出的工艺中，通过使用激光束在加强层103中形成导通孔103A，以便露出图案配线105b。然后，通过使用激光束在加强层114和绝缘层106中形成导通孔114A，以便露出配线部113(图案配线113b)。其中，导通孔103A和114A是同时形成的。
接下来，在图18中示出的工艺中，为了去除导通孔中的残留物并进行表面处理，根据需要，向加强层103的底面和加强层114的顶面施加去污工艺。然后，通过无电解电镀法，分别在加强层103的底面和加强层114的顶面(包括绝缘层106从导通孔114A露出的一部分)上形成由铜构成的种晶层104、115。其中，种晶层104和115是同时形成的。
接下来，在图19中示出的工艺中，使用光刻法在种晶层104和种晶层115中形成抗蚀图案(未示出)。接下来，将抗蚀图案作为掩模，以实施电解镀铜，从而在加强层103上形成导通塞105a，以便提供到图案配线105b的连接。导通塞105a和图案配线105b构成配线部105。
同时，将抗蚀图案作为掩模以实施电解镀铜从而形成导通塞116a，以便提供到从加强层114中形成的导通孔114A露出的图案配线113b的连接。在加强层114上形成图案配线116b，以提供到导通塞116a的连接。导通塞116a和图案配线116b构成配线部116。
在形成配线部105、116之后，剥去抗蚀图案，并通过蚀刻去除露出的多余种晶层104、115。
接下来，在图20中示出的工艺中，形成阻焊层119以覆盖加强层103，并且在阻焊层119中使配线部105(导通塞105a)露出的预定位置处形成开口119A。形成阻焊层117以便覆盖加强层114。在阻焊层117中使配线部116(图案配线116b)露出的预定位置处形成开口117A。其中，包括开口117A的阻焊层117和包括开口119A的阻焊层119是同时形成的。
接下来，在图21中示出的工艺中，在从开口117A露出的配线部116(图案配线116b)上形成包括例如金层118a和镍层118b的电极118。在从开口119A露出的配线部105(导通塞105a)上形成包括例如金层102a和镍层102b的电极102(表面处理)。其中，电极102和电极118是同时形成的。
此后，在电极102上形成焊球120，从而形成图1示出的配线基板100。
以上制造方法为使用无芯结构(去除支撑基板的结构)的增层法。此方法可以实现配线基板的薄型化、紧凑和轻质设计。加强层103、114的使用减少了配线基板中的翘曲。这使得形成包括超精细配线部的薄型化配线基板成为可能。
在本实施例中，形成嵌入有半导体芯片110的绝缘层106和配线部105、108、113，然后去除支撑基板101。同时形成加强层103和114，以将其上未附着支撑基板101的绝缘层106夹在加强层103和114之间。通常，每个加强层103、114在固化时会表现出较大收缩。通过同时形成加强层103和114，以将绝缘层106、配线部116等夹在加强层103和114之间，这样，从绝缘层106、配线部116等的上方和下方均匀施加固化时产生的收缩，从而防止可能的翘曲。
根据本实施例，在去除支撑基板101之后的工艺中，更具体来说，在图15至21中示出的工艺中，同时进行图中所示的在绝缘层106的顶面上的处理和底面上的处理。这样，在去除支撑基板101之后，同时在绝缘层106的顶面和底面形成各层，从而简化了制造工艺，并减少了制造所需的时间。
虽然已经参照优选实施例对本发明进行了说明，但是本发明并不局限于这些具体实施例，而是在未背离权利要求书的情况下，可以对本发明做出变型和变更。
显然，对于所属领域的技术人员来说，在未背离本发明的要旨或保护范围的情况下，可以对本发明所述优选实施例做出各种修改和变型。因而，本发明旨在涵盖与所附的权利要求书及其等效内容所限定的保护范围一致的本发明的所有修改和变型。
本申请基于2005年8月26日提交的日本专利申请No.2005-246438，并要求该申请的外国优先权，其内容在此通过引用的方式并入本文。

Claims (4)

1.一种配线基板的制造方法，所述方法包括：
在支撑基板上形成绝缘层和配线，在所述绝缘层中嵌入有半导体芯片，所述配线连接到所述半导体芯片上；
去除所述支撑基板；以及
在去除所述支撑基板之后，同时形成第一加强层和第二加强层，以便将所述绝缘层夹在所述第一加强层和所述第二加强层之间，所述第一加强层和所述第二加强层由预浸渍材料制成。
2.根据权利要求1所述的配线基板的制造方法，所述方法包括：
在所述支撑基板上形成所述绝缘层和所述配线之前，在所述支撑基板上形成停止层，其中，
由所述停止层停止所述支撑基板的去除。
3.根据权利要求1所述的配线基板的制造方法，所述方法包括：
在所述第一加强层和所述第二加强层中的每一个中形成配线部，
在形成所述第一加强层和所述第二加强层之后，并且在形成所述配线部之后，同时形成第一阻焊层和第二阻焊层，所述第一阻焊层层压在所述第一加强层上，所述第二阻焊层层压在所述第二加强层上，其中，
在所述第一阻焊层和所述第二阻焊层中的每一个中形成开口以露出配线部。
4.根据权利要求3所述的配线基板的制造方法，所述方法包括：
在形成所述第一阻焊层和所述第二阻焊层之后，并且在形成所述开口之后，同时在所述第一加强层和所述第二加强层中的每一个中所形成的所述配线部上形成电极。
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