CN1729576A - 使用硅化的金属栅极电极以及其形成方法 - Google Patents
使用硅化的金属栅极电极以及其形成方法 Download PDFInfo
- Publication number
- CN1729576A CN1729576A CNA038097842A CN03809784A CN1729576A CN 1729576 A CN1729576 A CN 1729576A CN A038097842 A CNA038097842 A CN A038097842A CN 03809784 A CN03809784 A CN 03809784A CN 1729576 A CN1729576 A CN 1729576A
- Authority
- CN
- China
- Prior art keywords
- polysilicon body
- dielectric
- polysilicon
- gate
- base material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28097—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a metallic silicide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
- H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/135,227 US6599831B1 (en) | 2002-04-30 | 2002-04-30 | Metal gate electrode using silicidation and method of formation thereof |
| US10/135,227 | 2002-04-30 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011100472901A Division CN102157362B (zh) | 2002-04-30 | 2003-04-28 | 使用硅化的金属栅极电极以及其形成方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1729576A true CN1729576A (zh) | 2006-02-01 |
Family
ID=27610948
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA038097842A Pending CN1729576A (zh) | 2002-04-30 | 2003-04-28 | 使用硅化的金属栅极电极以及其形成方法 |
| CN2011100472901A Expired - Lifetime CN102157362B (zh) | 2002-04-30 | 2003-04-28 | 使用硅化的金属栅极电极以及其形成方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011100472901A Expired - Lifetime CN102157362B (zh) | 2002-04-30 | 2003-04-28 | 使用硅化的金属栅极电极以及其形成方法 |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US6599831B1 (enExample) |
| EP (1) | EP1502305A1 (enExample) |
| JP (1) | JP2005524243A (enExample) |
| KR (1) | KR20040102187A (enExample) |
| CN (2) | CN1729576A (enExample) |
| AU (1) | AU2003231119A1 (enExample) |
| TW (1) | TWI270935B (enExample) |
| WO (1) | WO2003094243A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101562131B (zh) * | 2008-04-15 | 2012-04-18 | 和舰科技(苏州)有限公司 | 栅极结构的制造方法 |
Families Citing this family (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6599831B1 (en) * | 2002-04-30 | 2003-07-29 | Advanced Micro Devices, Inc. | Metal gate electrode using silicidation and method of formation thereof |
| US7183182B2 (en) * | 2003-09-24 | 2007-02-27 | International Business Machines Corporation | Method and apparatus for fabricating CMOS field effect transistors |
| JP4011024B2 (ja) * | 2004-01-30 | 2007-11-21 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
| JP4521597B2 (ja) * | 2004-02-10 | 2010-08-11 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置およびその製造方法 |
| US7056782B2 (en) * | 2004-02-25 | 2006-06-06 | International Business Machines Corporation | CMOS silicide metal gate integration |
| JP3998665B2 (ja) * | 2004-06-16 | 2007-10-31 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
| JP2006013270A (ja) * | 2004-06-29 | 2006-01-12 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| KR100558011B1 (ko) * | 2004-07-12 | 2006-03-06 | 삼성전자주식회사 | 전체실리사이드 금속게이트전극을 갖는 모스 트랜지스터의제조방법 |
| JP2006108355A (ja) * | 2004-10-05 | 2006-04-20 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| KR100593452B1 (ko) * | 2005-02-01 | 2006-06-28 | 삼성전자주식회사 | 전체실리사이드 금속게이트전극을 갖는 모스 트랜지스터의제조방법 |
| JP2006245417A (ja) * | 2005-03-04 | 2006-09-14 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP5395354B2 (ja) * | 2005-03-15 | 2014-01-22 | 日本電気株式会社 | 半導体装置の製造方法及び半導体装置 |
| US20060258074A1 (en) * | 2005-05-12 | 2006-11-16 | Texas Instruments Incorporated | Methods that mitigate excessive source/drain silicidation in full gate silicidation metal gate flows |
| JP2006339324A (ja) * | 2005-06-01 | 2006-12-14 | Fujitsu Ltd | 半導体装置の製造方法 |
| JP2006339441A (ja) * | 2005-06-02 | 2006-12-14 | Fujitsu Ltd | 半導体装置の製造方法 |
| EP1744351A3 (en) * | 2005-07-11 | 2008-11-26 | Interuniversitair Microelektronica Centrum ( Imec) | Method for forming a fully silicided gate MOSFET and devices obtained thereof |
| JP2007027727A (ja) * | 2005-07-11 | 2007-02-01 | Interuniv Micro Electronica Centrum Vzw | フルシリサイド化ゲートmosfetの形成方法及び該方法により得られるデバイス |
| KR100646937B1 (ko) | 2005-08-22 | 2006-11-23 | 삼성에스디아이 주식회사 | 다결정 실리콘 박막트랜지스터 및 그 제조방법 |
| JP2007173347A (ja) * | 2005-12-20 | 2007-07-05 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| US7968947B2 (en) * | 2006-01-06 | 2011-06-28 | Nec Corporation | Semiconductor device and manufacturing process therefor |
| JP2007251030A (ja) * | 2006-03-17 | 2007-09-27 | Renesas Technology Corp | 半導体装置の製造方法および半導体装置 |
| US7491643B2 (en) * | 2006-05-24 | 2009-02-17 | International Business Machines Corporation | Method and structure for reducing contact resistance between silicide contact and overlying metallization |
| US7297618B1 (en) | 2006-07-28 | 2007-11-20 | International Business Machines Corporation | Fully silicided gate electrodes and method of making the same |
| US7875935B2 (en) * | 2006-09-20 | 2011-01-25 | Nec Corporation | Semiconductor device and method for manufacturing the same |
| JPWO2008065908A1 (ja) * | 2006-11-29 | 2010-03-04 | キヤノンアネルバ株式会社 | 金属iv族元素化合物膜の形成方法及び半導体装置の製造方法 |
| US7727842B2 (en) * | 2007-04-27 | 2010-06-01 | Texas Instruments Incorporated | Method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device |
| US8183137B2 (en) * | 2007-05-23 | 2012-05-22 | Texas Instruments Incorporated | Use of dopants to provide low defect gate full silicidation |
| JP2009026997A (ja) * | 2007-07-20 | 2009-02-05 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7642153B2 (en) * | 2007-10-23 | 2010-01-05 | Texas Instruments Incorporated | Methods for forming gate electrodes for integrated circuits |
| US20110049634A1 (en) * | 2008-04-02 | 2011-03-03 | Nxp B.V. | Method of manufacturing a semiconductor device and semiconductor device |
| US8012817B2 (en) | 2008-09-26 | 2011-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transistor performance improving method with metal gate |
| US9871035B2 (en) * | 2013-12-31 | 2018-01-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device with metal silicide blocking region and method of manufacturing the same |
| US9972694B2 (en) * | 2015-10-20 | 2018-05-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Atomic layer deposition methods and structures thereof |
| KR102612404B1 (ko) * | 2019-03-08 | 2023-12-13 | 삼성전자주식회사 | 반도체 소자 및 그의 제조 방법 |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
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| NL7510903A (nl) * | 1975-09-17 | 1977-03-21 | Philips Nv | Werkwijze voor het vervaardigen van een halfgelei- derinrichting, en inrichting vervaardigd volgens de werkwijze. |
| JPS59125650A (ja) * | 1983-01-07 | 1984-07-20 | Toshiba Corp | 半導体装置の製造方法 |
| US4450620A (en) * | 1983-02-18 | 1984-05-29 | Bell Telephone Laboratories, Incorporated | Fabrication of MOS integrated circuit devices |
| JPS616867A (ja) * | 1984-06-20 | 1986-01-13 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置の製造方法 |
| US4755865A (en) * | 1986-01-21 | 1988-07-05 | Motorola Inc. | Means for stabilizing polycrystalline semiconductor layers |
| US4746964A (en) * | 1986-08-28 | 1988-05-24 | Fairchild Semiconductor Corporation | Modification of properties of p-type dopants with other p-type dopants |
| US5237196A (en) * | 1987-04-14 | 1993-08-17 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing the same |
| JPH01243549A (ja) * | 1988-03-25 | 1989-09-28 | Seiko Epson Corp | 半導体装置 |
| US5168072A (en) * | 1990-10-12 | 1992-12-01 | Texas Instruments Incorporated | Method of fabricating an high-performance insulated-gate field-effect transistor |
| US5767558A (en) * | 1996-05-10 | 1998-06-16 | Integrated Device Technology, Inc. | Structures for preventing gate oxide degradation |
| US6335280B1 (en) * | 1997-01-13 | 2002-01-01 | Asm America, Inc. | Tungsten silicide deposition process |
| US5851891A (en) * | 1997-04-21 | 1998-12-22 | Advanced Micro Devices, Inc. | IGFET method of forming with silicide contact on ultra-thin gate |
| US6117761A (en) * | 1997-08-23 | 2000-09-12 | Micron Technology, Inc. | Self-aligned silicide strap connection of polysilicon layers |
| US5937319A (en) * | 1997-10-31 | 1999-08-10 | Advanced Micro Devices, Inc. | Method of making a metal oxide semiconductor (MOS) transistor polysilicon gate with a size beyond photolithography limitation by using polysilicidation and selective etching |
| JPH11284179A (ja) * | 1998-03-30 | 1999-10-15 | Sony Corp | 半導体装置およびその製造方法 |
| US6091123A (en) * | 1998-06-08 | 2000-07-18 | Advanced Micro Devices | Self-aligned SOI device with body contact and NiSi2 gate |
| US6100173A (en) * | 1998-07-15 | 2000-08-08 | Advanced Micro Devices, Inc. | Forming a self-aligned silicide gate conductor to a greater thickness than junction silicide structures using a dual-salicidation process |
| US6451644B1 (en) * | 1998-11-06 | 2002-09-17 | Advanced Micro Devices, Inc. | Method of providing a gate conductor with high dopant activation |
| US6228724B1 (en) * | 1999-01-28 | 2001-05-08 | Advanced Mirco Devices | Method of making high performance MOSFET with enhanced gate oxide integration and device formed thereby |
| JP2000252462A (ja) * | 1999-03-01 | 2000-09-14 | Toshiba Corp | Mis型半導体装置及びその製造方法 |
| US6281559B1 (en) * | 1999-03-03 | 2001-08-28 | Advanced Micro Devices, Inc. | Gate stack structure for variable threshold voltage |
| US6245692B1 (en) * | 1999-11-23 | 2001-06-12 | Agere Systems Guardian Corp. | Method to selectively heat semiconductor wafers |
| US6365481B1 (en) * | 2000-09-13 | 2002-04-02 | Advanced Micro Devices, Inc. | Isotropic resistor protect etch to aid in residue removal |
| US6562718B1 (en) * | 2000-12-06 | 2003-05-13 | Advanced Micro Devices, Inc. | Process for forming fully silicided gates |
| US6479383B1 (en) * | 2002-02-05 | 2002-11-12 | Chartered Semiconductor Manufacturing Ltd | Method for selective removal of unreacted metal after silicidation |
| US6599831B1 (en) * | 2002-04-30 | 2003-07-29 | Advanced Micro Devices, Inc. | Metal gate electrode using silicidation and method of formation thereof |
| US6544829B1 (en) * | 2002-09-20 | 2003-04-08 | Lsi Logic Corporation | Polysilicon gate salicidation |
-
2002
- 2002-04-30 US US10/135,227 patent/US6599831B1/en not_active Expired - Lifetime
-
2003
- 2003-04-28 KR KR10-2004-7017334A patent/KR20040102187A/ko not_active Ceased
- 2003-04-28 JP JP2004502363A patent/JP2005524243A/ja active Pending
- 2003-04-28 WO PCT/US2003/012958 patent/WO2003094243A1/en not_active Ceased
- 2003-04-28 AU AU2003231119A patent/AU2003231119A1/en not_active Abandoned
- 2003-04-28 CN CNA038097842A patent/CN1729576A/zh active Pending
- 2003-04-28 CN CN2011100472901A patent/CN102157362B/zh not_active Expired - Lifetime
- 2003-04-28 EP EP03724248A patent/EP1502305A1/en not_active Withdrawn
- 2003-04-30 TW TW092110111A patent/TWI270935B/zh not_active IP Right Cessation
- 2003-05-07 US US10/431,008 patent/US6873030B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101562131B (zh) * | 2008-04-15 | 2012-04-18 | 和舰科技(苏州)有限公司 | 栅极结构的制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| AU2003231119A1 (en) | 2003-11-17 |
| WO2003094243A1 (en) | 2003-11-13 |
| US6599831B1 (en) | 2003-07-29 |
| CN102157362A (zh) | 2011-08-17 |
| KR20040102187A (ko) | 2004-12-03 |
| EP1502305A1 (en) | 2005-02-02 |
| CN102157362B (zh) | 2012-05-16 |
| TW200403729A (en) | 2004-03-01 |
| TWI270935B (en) | 2007-01-11 |
| US6873030B2 (en) | 2005-03-29 |
| US20030203609A1 (en) | 2003-10-30 |
| JP2005524243A (ja) | 2005-08-11 |
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Open date: 20060201 |