AU2003231119A1 - Metal gate electrode using silicidation and method of formation thereof - Google Patents

Metal gate electrode using silicidation and method of formation thereof

Info

Publication number
AU2003231119A1
AU2003231119A1 AU2003231119A AU2003231119A AU2003231119A1 AU 2003231119 A1 AU2003231119 A1 AU 2003231119A1 AU 2003231119 A AU2003231119 A AU 2003231119A AU 2003231119 A AU2003231119 A AU 2003231119A AU 2003231119 A1 AU2003231119 A1 AU 2003231119A1
Authority
AU
Australia
Prior art keywords
silicidation
formation
gate electrode
metal gate
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003231119A
Other languages
English (en)
Inventor
Zoran Krivokapic
Witold P. Maszara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AU2003231119A1 publication Critical patent/AU2003231119A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28097—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a metallic silicide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
AU2003231119A 2002-04-30 2003-04-28 Metal gate electrode using silicidation and method of formation thereof Abandoned AU2003231119A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/135,227 US6599831B1 (en) 2002-04-30 2002-04-30 Metal gate electrode using silicidation and method of formation thereof
US10/135,227 2002-04-30
PCT/US2003/012958 WO2003094243A1 (en) 2002-04-30 2003-04-28 Metal gate electrode using silicidation and method of formation thereof

Publications (1)

Publication Number Publication Date
AU2003231119A1 true AU2003231119A1 (en) 2003-11-17

Family

ID=27610948

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003231119A Abandoned AU2003231119A1 (en) 2002-04-30 2003-04-28 Metal gate electrode using silicidation and method of formation thereof

Country Status (8)

Country Link
US (2) US6599831B1 (enExample)
EP (1) EP1502305A1 (enExample)
JP (1) JP2005524243A (enExample)
KR (1) KR20040102187A (enExample)
CN (2) CN102157362B (enExample)
AU (1) AU2003231119A1 (enExample)
TW (1) TWI270935B (enExample)
WO (1) WO2003094243A1 (enExample)

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JP4521597B2 (ja) * 2004-02-10 2010-08-11 ルネサスエレクトロニクス株式会社 半導体記憶装置およびその製造方法
US7056782B2 (en) * 2004-02-25 2006-06-06 International Business Machines Corporation CMOS silicide metal gate integration
JP3998665B2 (ja) * 2004-06-16 2007-10-31 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP2006013270A (ja) * 2004-06-29 2006-01-12 Renesas Technology Corp 半導体装置およびその製造方法
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JP2006108355A (ja) * 2004-10-05 2006-04-20 Renesas Technology Corp 半導体装置およびその製造方法
KR100593452B1 (ko) * 2005-02-01 2006-06-28 삼성전자주식회사 전체실리사이드 금속게이트전극을 갖는 모스 트랜지스터의제조방법
JP2006245417A (ja) * 2005-03-04 2006-09-14 Toshiba Corp 半導体装置およびその製造方法
WO2006098369A1 (ja) * 2005-03-15 2006-09-21 Nec Corporation 半導体装置の製造方法及び半導体装置
US20060258074A1 (en) * 2005-05-12 2006-11-16 Texas Instruments Incorporated Methods that mitigate excessive source/drain silicidation in full gate silicidation metal gate flows
JP2006339324A (ja) * 2005-06-01 2006-12-14 Fujitsu Ltd 半導体装置の製造方法
JP2006339441A (ja) * 2005-06-02 2006-12-14 Fujitsu Ltd 半導体装置の製造方法
EP1744351A3 (en) * 2005-07-11 2008-11-26 Interuniversitair Microelektronica Centrum ( Imec) Method for forming a fully silicided gate MOSFET and devices obtained thereof
JP2007027727A (ja) * 2005-07-11 2007-02-01 Interuniv Micro Electronica Centrum Vzw フルシリサイド化ゲートｍｏｓｆｅｔの形成方法及び該方法により得られるデバイス
KR100646937B1 (ko) 2005-08-22 2006-11-23 삼성에스디아이 주식회사 다결정 실리콘 박막트랜지스터 및 그 제조방법
JP2007173347A (ja) * 2005-12-20 2007-07-05 Renesas Technology Corp 半導体装置及びその製造方法
JPWO2007077814A1 (ja) * 2006-01-06 2009-06-11 日本電気株式会社 半導体装置及びその製造方法
JP2007251030A (ja) * 2006-03-17 2007-09-27 Renesas Technology Corp 半導体装置の製造方法および半導体装置
US7491643B2 (en) * 2006-05-24 2009-02-17 International Business Machines Corporation Method and structure for reducing contact resistance between silicide contact and overlying metallization
US7297618B1 (en) 2006-07-28 2007-11-20 International Business Machines Corporation Fully silicided gate electrodes and method of making the same
JPWO2008035490A1 (ja) * 2006-09-20 2010-01-28 日本電気株式会社 半導体装置およびその製造方法
WO2008065908A1 (fr) * 2006-11-29 2008-06-05 Phyzchemix Corporation Procédé de formation d'un film de composé d'élément métallique du groupe iv et procédé de fabrication d'un dispositif semi-conducteur
US7727842B2 (en) * 2007-04-27 2010-06-01 Texas Instruments Incorporated Method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device
US8183137B2 (en) * 2007-05-23 2012-05-22 Texas Instruments Incorporated Use of dopants to provide low defect gate full silicidation
JP2009026997A (ja) * 2007-07-20 2009-02-05 Renesas Technology Corp 半導体装置およびその製造方法
US7642153B2 (en) * 2007-10-23 2010-01-05 Texas Instruments Incorporated Methods for forming gate electrodes for integrated circuits
CN101981688B (zh) * 2008-04-02 2014-04-02 Imec公司 制造半导体器件的方法以及半导体器件
CN101562131B (zh) * 2008-04-15 2012-04-18 和舰科技(苏州)有限公司 栅极结构的制造方法
US8012817B2 (en) * 2008-09-26 2011-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Transistor performance improving method with metal gate
US9871035B2 (en) * 2013-12-31 2018-01-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with metal silicide blocking region and method of manufacturing the same
US9972694B2 (en) * 2015-10-20 2018-05-15 Taiwan Semiconductor Manufacturing Company, Ltd. Atomic layer deposition methods and structures thereof
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Also Published As

Publication number Publication date
TWI270935B (en) 2007-01-11
US6599831B1 (en) 2003-07-29
CN102157362B (zh) 2012-05-16
KR20040102187A (ko) 2004-12-03
CN102157362A (zh) 2011-08-17
US20030203609A1 (en) 2003-10-30
US6873030B2 (en) 2005-03-29
EP1502305A1 (en) 2005-02-02
JP2005524243A (ja) 2005-08-11
CN1729576A (zh) 2006-02-01
TW200403729A (en) 2004-03-01
WO2003094243A1 (en) 2003-11-13

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Legal Events

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MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase