CN1518763A - 延长用于芯片和衬底连接的c4焊球的疲劳寿命 - Google Patents

延长用于芯片和衬底连接的c4焊球的疲劳寿命 Download PDF

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CN1518763A
CN1518763A CNA028123417A CN02812341A CN1518763A CN 1518763 A CN1518763 A CN 1518763A CN A028123417 A CNA028123417 A CN A028123417A CN 02812341 A CN02812341 A CN 02812341A CN 1518763 A CN1518763 A CN 1518763A
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weldment
organic
semiconductor substrate
substrate
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CN1275305C (zh
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W·E·伯尔尼
C·E·凯里
E·B·格拉马特兹基
T·R·霍马
Լ��ѷ
E·A·约翰逊
P·郎之万
I·梅米斯
S·K·特兰
R·F·怀特
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Core Usa Second LLC
GlobalFoundries Inc
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Abstract

一种用于将半导体衬底(例如半导体芯片)连接到有机衬底(例如芯片载体)的方法和结构。该连接将一焊件(例如焊球)对接至该半导体衬底上的一导电焊盘和该有机衬底上的一导电焊盘。通过使该半导体衬底上的焊盘的表面积超过有机衬底上的焊盘的表面积，可以减少在热循环期间作用于该焊件上的热应变，通过使从该焊件的中心线至该半导体衬底的最近横侧边的距离超过约0.25mm，也可以减少在热循环期间该焊件上的热应变。

Description

延长用于芯片和衬底连接的C4焊球的疲劳寿命
技术领域
本发明涉及一种用焊球将半导体芯片连接到有机芯片载体的方法和结构。
背景技术
能否将半导体芯片连接到有机芯片载体决定于连接焊球在热循环中受到的热应变。当发生足够的循环次数时，热应变将不可避免地损害焊料，从而导致其破裂和电失效。因此，需要一种方法和结构以减少上述的热应变并提高疲劳寿命。
发明内容
本发明提供一种电子结构，包括：
半导体衬底，其上具有第一导电焊盘；
有机衬底，其上具有第二导电焊盘，其中第一焊盘的表面积超过第二焊盘的表面积；以及
焊件，用于将第一焊盘电连接到第二焊盘。
本发明提供一种电子结构，包括：
半导体衬底，其上具有第一导电焊盘；
有机衬底，其上具有第二导电焊盘；以及
焊件，用于将该第一焊盘电连接到该第二焊盘，其中从该焊件的中心线到该半导体衬底最近的横侧边的距离至少约0.25mm。
本发明提供一种形成电子结构的方法，包括：
形成其上具有第一导电焊盘的半导体衬底；
形成其上具有第二导电焊盘的有机衬底，其中该第一焊盘的表面积超过该第二焊盘的表面积；以及
用焊件将该第一焊盘电连接到该第二焊盘。
本发明提供一种形成电子结构的方法，包括：
形成其上具有第一导电焊盘的半导体衬底；
形成其上具有第二导电焊盘的有机衬底；以及
用焊件将该第一焊盘电连接到该第二焊盘，其中从该焊件的中心线到该半导体衬底最近的横侧边的距离至少约0.25mm。
本发明减少了热循环中焊球上发生的热应变，其中焊球用于将半导体芯片连接到有机芯片载体。
附图说明
图1描绘了依照本发明的实施例的用焊球将半导体芯片连接到有机芯片载体的正视剖面图。
图2是图1中焊球的热循环疲劳检测数据表。
图3是图1的焊球上的切应变随芯片中心与焊球中心线间距离而改变的曲线图。
图4是图1的焊球上的轴应变随芯片中心与焊球中心线间距离而改变的曲线图。
具体实施方式
图1示出了依照本发明的实施例的电子结构10的正视剖面图。该电子结构10包括用焊件16连接到有机衬底14的半导体衬底12。该焊件16以机械和电气方式连接至位于该半导体衬底12上的导电焊盘20。同样，该焊件16以机械和电气方式连接至位于有机衬底14上的导电焊盘22。
该半导体衬底12可包括，但不限于，半导体芯片(例如，硅芯片或锗芯片)。该半导体衬底12可以有约为3ppm/℃热膨胀系数(CTE)，其中ppm表示百万分之一。
该有机衬底14可包括，但不限于，诸如环氧树脂、聚酰亚胺、聚四氟乙烯(PTFE)、玻璃布、铜-无胀钢-铜或其他强化层等有机材料及其组合。特别地，有机衬底14可包括有机芯片载体。有机衬底14具有在约10ppm/℃与约18ppm/℃之间的CTE。
该焊件16可包括，但不限于，焊球，例如可控塌陷芯片连接(C4)焊球。特别地，该焊件16可包括，低共熔的(eutectic)铅锡合金(即，按重量计铅约63％和锡约37％)、高熔点的铅锡合金、倾向于低共熔的(eutectic tipped)高熔点的合金、无铅焊料等等。举例来说，高熔点的铅锡合金可具有按重量计的铅与锡的比率为97∶3，熔点温度约为330℃。该焊件16具有在约21ppm/℃到28ppm/℃之间的CTE。需要特别指出的是，具有97∶3的铅锡重量比的铅锡合金的CTE约为28ppm/℃。
半导体衬底12和有机衬底14之间有一层填充材料24，其中将该焊件16密封在填充材料24中，而且其中，填充材料24具有至少约1千兆帕(Gpa)弹性模量。填充材料24用于减小热循环运行中可能产生的对焊件16的热应力。本领域的技术人员已知的任何填充材料都可用作填充材料24。特别地，已知的填充材料的例子包括，Dexter CNB840-38和Namics U8437-2。
该电子结构10可如下制造。形成或提供其上带有焊盘20的半导体衬底12。形成或提供其上带有焊盘22的有机衬底14。将高熔点铅锡焊料淀积并成形在半导体衬底12的焊盘20上以形成焊球。将低共熔铅锡焊膏淀积在有机衬底14的焊盘22上。将焊盘20上的高熔点焊料放置成和焊盘22上的低共熔焊膏相接触。在一低于高熔点铅锡焊料的熔化温度的温度使焊膏回流，然后冷却，形成焊件16，该焊件16以机械和电气方式把半导体衬底12连接到有机衬底14。接着，在半导体衬底12和有机衬底14之间放入填充材料24，使得填充材料24密封焊件16。
尽管填充材料24起减轻焊件16上的热应力的作用，但这样减小后的热应力仍可能使在焊件16与焊盘20之间界面处的焊件16发生破裂。因为在连接到焊盘20的焊件16与半导体衬底12之间的CTE局部失配程度，大于在连接到焊盘22的焊件16与有机衬底14间的失配程度，所以焊件16与焊盘20之间的界面比焊件16与焊盘22之间的界面更易于受到热应力损害。热应力损害对焊件16与焊盘20间界面的疲劳寿命有不利影响。
本发明公开了两种用于延长焊件16和焊盘20之间界面的疲劳寿命的创造性的技术。通过应用第一项发明的技术，S1/S2的比率大于1，其中S1表示被焊料渗湿的半导体衬底12的焊盘20的表面32的表面积，S2表示有机衬底14的焊盘22的表面34的表面积。通过应用第二项发明的技术，从焊件16的中心线26沿方向8距半导体衬底12的最近横侧边13的距离大于约0.25mm。此处的中心线26被定义为通过焊件16的质心28并沿方向9取向，即与表面32垂直。
通过相对于S2增大S1，与在焊盘22处的焊件16上的热应力和随后发生的热应变比较，具有S1/S2的比值大于1的第一项发明技术减少了在焊盘20处的焊件16上的热应力和跟着发生的热应变。第一项发明技术部分抵消了在焊盘20处的焊件16上的较高的热应力，而这里所述的较高的热应力是由于同焊件16与有机衬底14之间的CTE差比较，焊件16与半导体衬底12之间的CTE差相对较大的缘故。
图2是对图1中焊件16的热循环疲劳测试数据的表，该表证明随S1/S2比值的增加而延长了图1中焊件16与焊盘20之间界面的疲劳寿命。在以下图2的测试中，该电子结构10经受热循环，每次循环都从100℃到0℃再回到100℃。半导体衬底12是硅半导体芯片，有机衬底14是包括带有有机复合层的玻璃环氧树脂芯的有机芯片载体，焊件16是包括具有按照重量计的铅约97％和锡约3％的铅锡合金的C4焊球。填充材料24使用具有弹性模量7Gpa的Namics U8437-2型材料。
图2中第1行各栏标题的意思解释如下。“行”一栏表示行号。“样品大小”一栏表示同一批用于测试的相同电子结构10的样品数量。“芯片尺寸”一栏表示沿芯片12表面18的芯片尺寸。“有机衬底焊盘直径，D2”一栏表示焊盘22具有的直径。“芯片焊盘直径，D1”一栏表示焊盘20具有的直径。“D1/D2”一栏表示D1与D2之比。“S1/S2”一栏表示S1与S2之比，因此S1/S2＝(D1/D2)2。“焊球高度”一栏表示图1中所示沿方向9的高度H。“焊球中心线到芯片边缘的距离(DEDGE)”一栏表示如图1所示的沿方向8的距离DEDGE。“循环到50％失效的次数”一栏表示由平均样品大小算出的循环到50％样品失效的次数。由于每500次循环对这些样品做测试，因此“第一循环到失效”一栏是具有500次循环的容差，但除了第5行，因为该行样品为每100次循环测试失效。样品失效被定义为焊件16中出现裂痕或焊件16从焊盘20剥离。
如图2中的第4和3行所示，当S1/S2从0.40增加到0.77，循环到50％样品失效的次数从3250增加到了7963，而第一循环到失效从600增加到2500。应该指出，第2和3行是与第3和4行一致的，因为当S1/S2从0.77增加到0.81时，循环到50％样品失效的次数从7963增加到8430。应当指出第2，3和4行中DEDGE具有相同值100μm。
前述测试结果证明，作为本发明的第一项发明技术的基础，增大S1/S2将提高疲劳寿命。我们已使用有限元建模对整个的S1/S2比值延伸范围内疲劳寿命的增加进行预测。第一项发明技术包括几个相对于S1/S2的实施例。第一项发明技术的第1实施例是S1/S2＞1。第一项发明技术的第2实施例是使S1以至少约1.2的系数超过S2。第一项发明技术的第3实施例是使S1以约1.1与约1.3之间的系数超过S2。第一项发明技术的第4实施例为使S1以约1.3与约2.0之间的系数超过S2。
图2的行1和3阐述了本发明的第二项发明技术。对于第1和3行，DEDGE分别等于230μm(即0.23mm或9密耳)和100μm(即.10mm或4密耳)。对于第1和3行，图2显示，当DEDGE从100μm增加到230μm(即从.10mm增加到.23mm)，循环到50％失效的次数从7963次循环增加到13260次循环。因此，在距最近芯片边缘13(参照图1)几百微米以内的距离DEDGE，增大DEDGE将导致进行更多次循环以达到50％失效水平。应当指出，第1和3行中S1/S2具有相同值0.77。
图3和4也说明了在距最近的芯片边缘13几百微米内增大DEDGE的有益效果。图3和4分别是在焊件16与半导体衬底12的焊盘20之间的界面处的焊件16上平均切应变和平均轴应变的曲线图。图3中的平均切应变位于由图1中方向8和9定义的平面上，而图4中的平均轴应变与方向9平行。图3的切应变和图4的轴应变两者都是在连接C4焊球16的焊盘表面32的一部分上空间地平均的。
在图3和图4中，该半导体衬底12是硅半导体芯片，有机衬底14是包括带有有机复合层的玻璃环氧树脂芯的有机芯片载体，而焊件16是包括具有重量计的铅约97％和锡约3％的铅锡合金的C4焊球。填充材料24具有2到11Gpa的模量。芯片12的边缘13距芯片12的中心(未显示)的距离大约为8毫米。芯片12的表面18的尺寸为16mm×16mm。该C4焊球的高度H为0.1毫米。
在以下图3和4的模拟中，电子结构10经受热循环，每次热循环都从100℃到0℃再回到100℃。所得到的图3中的切应变和图4中的轴应变各被绘图为Dc的函数，其中Dc是沿方向8从半导体衬底12的中心到焊件16的中心线26的距离(见图1)。图3示出了三条切应变曲线102、105和111，分别与弹性模量为2Gpa、5Gpa和11Gpa的填充材料24相对应。同样，图4示出了三条轴应变曲线202、205和211，分别与弹性模量为2Gpa、5Gpa和11Gpa的填充材料24相对应。
图3中，取决于三条曲线102、105和111中哪一条相关，当C4焊球的中心线26距芯片12的边缘13的距离介于0.25mm与0.40mm之间时，平均切应变下降最快。该0.25mm距离是在曲线111上的点P1(斜率上出现陡变处)和对应于芯片12的边缘13的Dc＝8mm之间的Dc变化。该0.40mm距离是曲线105上的点P2(斜率上出现陡变处)和对应于芯片12的边缘13的Dc＝8mm之间的Dc变化。
图4中，取决于三条曲线202、205和211中哪一条相关，当从C4焊球的中心线26到芯片12的边缘13的距离在0.30毫米到1.0毫米之间时，平均轴应变下降最快。该0.30mm距离是在曲线211上的点P3(斜率上出现陡变处)和对应于芯片12的边缘13的Dc＝8mm之间的Dc变化。该1.0mm距离是在曲线202上的点P4(斜率上出现陡变处)和对应于芯片12的边缘13的Dc＝8mm之间的Dc变化。基于上述结果，第二项发明技术包括与DEDGE有关的若干实施例。根据图3的平均切应变曲线，对于第二项发明技术的第一实施例，DEDGE至少约0.25mm。根据图3的平均切应变曲线，对于第二项发明技术的第二实施例，DEDGE至少约0.40mm。根据图4的平均轴应变曲线，对于第二项发明技术的第三实施例，DEDGE至少约0.30mm。根据图4的平均轴应变曲线，对于第二项发明技术的第三实施例，DEDGE至少约1.00mm。
本发明的有效性基于这样的事实，即，因为焊件16与焊盘20之间的CTE差大于焊件16与焊盘22之间的CTE差，所以焊件16与焊盘20之间的界面比焊件16与焊盘20之间的界面更易于受到热应力损坏。于是，CTE连结参数P描述上述CTE差的特征，此处将P定义为(Csolder-Corganic)/(Csolder-Csemi)，其中Csolder是焊件16的CTE，Corganic是有机衬底14的CTE，Csemi是半导体衬底12的CTE。假定Csolder＞Corganic＞Csemi，P必须满足条件0＜P＜1。P＝1表示在所述的焊盘20和焊盘22之间的CTE差完全对称分布，而P＝0表示在所述的焊盘20和焊盘22之间的CTE差完全不对称分布。对于前文所述焊件16、有机衬底14和半导体衬底12的CTE范围，P满足条件0.17＜P＜0.72。因此，就这里所考虑的CTE范围而言，用于P的整个范围为0.15＜P＜0.75

Claims (18)

1.一种电子结构，包括：
半导体衬底，其上具有第一导电焊盘；
有机衬底，其上具有第二导电焊盘，其中第一焊盘的表面积超过第二焊盘的表面积；以及
将第一焊盘电连接到第二焊盘的焊件。
2.按照权利要求1的电子结构，其中从该焊件的中心线到该半导体衬底的最近横侧边的距离至少约0.25mm或0.40mm。
3.按照权利要求1或2的任意一项的电子结构，还包括：
在该半导体衬底和该有机衬底之间的填充材料，其中该填充材料密封该焊件，并且其中该填充材料具有至少约1千兆帕的弹性模量。
4.按照权利要求1或2的任意一项的电子结构，其中该有机衬底的热膨胀系数(CTE)在约10ppm/℃与约18ppm/℃之间。
5.按照权利要求1或2的任意一项的电子结构，其中P在约0.15与约0.75之间，这里P被定义为(Csolder-Corganic)/(Csolder-Csemi)，其中Csolder是该焊件的CTE，Corganic是该有机衬底的CTE，Csemi是该半导体衬底的CTE。
6.按照权利要求1或2的任意一项的电子结构，其中该有机衬底包括从由环氧树脂、聚酰亚胺、聚四氟乙烯及其组合构成的一组物质中选出的有机材料。
7.按照权利要求1或2的任意一项的电子结构，其中该焊件包括可控塌陷芯片连接(C4)焊球。
8.按照权利要求1或2的任意一项的电子结构，其中该焊件包括铅锡合金。
9.按照权利要求1的电子结构，其中，在该有机衬底中，该第一焊盘的表面积以至少约1.2、或在约1.1与1.3之间、或在约1.3与2.0之间的系数超过第二焊盘的表面积，并且该焊件将该第一焊盘电连接到该第二焊盘。
10.一种形成电子结构的方法，包括：
形成其上具有第一导电焊盘的半导体衬底，；
形成其上具有第二导电焊盘的有机衬底，其中该第一焊盘的表面积超过该第二焊盘的表面积；以及
通过利用焊件，将第一焊盘电连接到第二焊盘。
11.按照权利要求10的方法，其中从该焊件的中心线到半导体衬底的最近横侧边的距离至少约0.25mm或0.40mm。
12.按照权利要求10或11的任意一项的方法，还包括：
在该半导体衬底和该有机衬底之间装入填充材料，其中该填充材料密封该焊件，以及其中该填充材料具有至少约1千兆帕的弹性模量。
13.按照权利要求10或11的任意一项的方法，其中该有机衬底的热膨胀系数(CTE)在约10ppm/℃与约18ppm/℃之间。
14.按照权利要求10或11的任意一项的方法，其中P在约0.15与约0.75之间，这里P被定义为(Csolder-Corganic)/(Csolder--Csemi)，其中Csolder是该焊件的CTE，Corganic是该有机衬底的CTE，Csemi是该半导体衬底的CTE。
15.按照权利要求10或11的任意一项的方法，其中该有机衬底包括从由环氧树脂、聚酰亚胺、聚四氟乙烯及其组合构成的一组物质中选出的有机材料。
16.按照权利要求10或11的任意一项的方法，其中该焊件包括可控塌陷芯片连接(C4)焊球。
17.按照权利要求10或11的任意一项的方法，其中该焊件包括铅锡合金。
18.按照权利要求10的方法，其中在该形成步骤，该第一焊盘的表面积以至少约1.2、或在约1.1与1.3之间、或在约1.3到2.0之间的系数超过该第二焊盘的表面积。
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US7067916B2 (en) 2006-06-27
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TW567595B (en) 2003-12-21
KR100576029B1 (ko) 2006-05-02
JP2004531080A (ja) 2004-10-07
US20020195707A1 (en) 2002-12-26
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WO2003001585A1 (en) 2003-01-03
CN1275305C (zh) 2006-09-13

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