CN1476066A - 制造半导体器件的方法、用于该方法的粘附薄片和半导体器件 - Google Patents
制造半导体器件的方法、用于该方法的粘附薄片和半导体器件 Download PDFInfo
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Abstract
一种制造半导体器件的方法,包括步骤:(1)在粘附薄片上的粘附层部分上形成多个导电部分,所述粘附层包括基层和粘附层;(2)把具有电极的至少一个半导体元件附加到粘附层,其中半导体元件的无电极边附加到粘附层;(3)在每个导电部分和半导体元件的每个电极之间电连接导线;(4)把半导体元件密封到密封树脂中以在粘附薄片上形成半导体器件;和(5)将粘附薄片从半导体器件脱离。此方法使表面安装型薄半导体器件的生产成为可能。
Description
发明领域
本发明涉及一种无引线结构的表面安装型半导体器件的制造方法。特别是,本发明涉及一种低成本的薄半导体器件的制造方法。本发明也涉及一种用于上述半导体器件的制造方法中的粘附薄片。本发明还涉及一种薄的低成本的无引线结构表面安装型半导体器件。
背景技术
像半导体集成电路、晶体管和二极管此类的单个元件的管壳已经做得比较小和比较薄。对于有引线框架的半导体集成电路,要求引线框架的引线间距更加细小,目的是形成更多的引线。然而,如果减小引线宽度来满足此要求,会减小引线的强度,使得引线可能弯曲而形成短路。某些引线间距也应当是固定的,所以管壳应当有比较大的尺寸。因此,有引线框架的管壳尺寸比较大和相对厚。所以,为排除引线框架的影响,提出了一种无引线结构的表面安装型半导体器件。
日本专利公开No.9-252014(1997)公开了无引线半导体器件的一个实例,如图9所示。制造此半导体器件的方法包括步骤:把金属箔附加到基座部分3;蚀刻金属箔,以便在那里留下某些部分;使用粘附层2以将半导体元件1固定到金属箔部分(冲模垫)4a,它的尺寸基本上与半导体元件1相同;电连接在半导体元件1和金属箔部分4b之间的线6;用模中的密封树脂5实现转移压模;最后,模制密封树脂从基座部分3脱离以形成封装好的半导体元件。然而,这种方法产生的半导体器件包括粘附层2和与半导体元件1有关联的金属箔部分(模垫)4a。此结构在满足工业领域小而薄的半导体器件的需要时,还存在问题。
按照上述出版物中所公开的方法,在蚀刻金属箔的步骤和用密封树脂转移压模的步骤中,基座部分3必须充分粘附到金属箔部分4a和4b。另一方面,在转移压模的步骤之后,基座部分3又必须容易脱离模制树脂5以及容易脱离金属箔部分4a和4b。因此,对于基座部分3和金属箔部分4a和4b之间的接触性质的要求是相互矛盾的。具体地说,为蚀刻化学制品,粘附必须坚牢,同样,在转移压模的步骤中,粘附也必须坚牢以不允许半导体元件1在高温下和在模中浇铸模制树脂时施加的压力下产生移动。可是,在树脂压模后,基座部分3必须容易地从模制树脂5和金属箔部分4a和4b上脱离下来。然而,基座部分3的材料,如上述出版物中所公开的含氟聚合物、硅树脂和涂氟的金属,不可能满足对接触的上述矛盾要求。
日本专利公开No.2001-210743公开了无引线半导体器件的另一个实例及其制造方法。图10示出了此出版物所公开的一个半导体器件。此半导体器件制作如下。矩阵排列的槽x的金属板4作为基座部件。用粘附层2把半导体元件1固定到金属板4。在设计的必要部分,通过丝焊方式形成导线6,然后密封在密封树脂5中(图10(a))。然后研磨金属板4和粘附层2,以设计尺寸切割密封树脂5和金属板4,形成半导体器件(图10(b))。然而,本方法产生的半导体器件也包括在半导体元件1下共存的粘附层2和金属板4y。这样一种结构在满足工业领域中对薄的半导体器件的需要时仍存在问题。
如上所述,传统的制造方法粘附薄的半导体器件有困难。在传统的方法中,半导体元件本身应研磨成薄的形状以形成薄的半导体器件。所以,在此方法中,在芯片中经常出现破裂或碎裂,引起成本增加。使用粘合剂等也包含了额外的工艺步骤和材料,引起成本增加。
发明内容
本发明的一个目的是提供一种制造方法,其能够用于生产无引线结构的更薄型的表面安装型半导体器件。
本发明的另一个目的是提供一种用于上述制造方法的粘附薄片。
本发明的另一个目的是提供一种无引线结构的薄型表面安装型半导体器件。
本发明已经进行积极有效研究以解决上述问题,并发明了下述制造方法。
所以,本发明旨在提供一种制造半导体器件的方法,包括步骤:
(1)在粘附薄片上的粘附层的部分上形成多个导电部分,所述粘附层包括基层和粘附层;
(2)把具有电极的至少一个半导体元件附加到粘附层,其中半导体元件的无电极边附加到粘附层;
(3)在每个导电部分和半导体元件的每个电极之间电连接导线;
(4)把半导体元件密封到密封树脂中以在粘附薄片上形成半导体器件;和
(5)将粘附薄片从半导体器件上脱离。
根据本发明的制造方法的步骤(2)中,半导体元件附加到作为支撑部分的粘附薄片的粘附层。在制造方法的步骤(5)中,粘附薄片从已经形成的半导体器件上脱离。本发明的制造方法不需要设置额外结合到传统半导体器件中的金属(模垫)和粘附层以固定半导体元件。所以,本发明的方法可以产生比较薄的半导体器件。
附加到粘附薄片的半导体元件在转移步骤等中能够避免产生移动。在步骤(4)中,例如转移-压模密封树脂步骤中,在高温下和在模中浇铸树脂时产生的高压力下,半导体元件也能够避免产生移动。
在传统的技术中,为了形成薄的半导体器件,半导体元件本身需要过量研磨,因为增加了模垫和粘附层。相反,本发明的方法不包括此过量研磨来产生薄的半导体器件,因而能够在产生比较少的破裂或碎裂的情况下形成半导体元件。本发明的制造方法不需要额外的材料,例如粘合剂,所以具有成本降低的优点。本制造方法由于没有使用额外材料的步骤,因此比较简单和有利。
在制造半导体器件的方法中,附加半导体元件的粘附层区域优选地在步骤(2)前用保护层予以覆盖。
通常,半导体元件本身的制造方法在没有空气粒子的清洁环境中实施。然而,此严格清洁环境不可能用于制造半导体器件的方法。在这种情况,外部物质倾向于沉积在粘附层上。在半导体元件附加到粘附层区域之前,如果保护层一直在该区域上,可以避免外来物质进入到半导体元件和粘附层之间。
在制造半导体器件的方法中,粘附薄片的基层的弹性模量在150℃下为0.3GPa或更大,而粘附薄片的粘附层的弹性模量优选地在150℃下为0.1MPa或更大。
把半导体元件密封到树脂里的步骤,例如步骤(4),在约150到约180℃的高温下进行。所以,包括每个具有上述弹性模量的基层和粘附层的粘附薄片优选具有良好的热阻。在这方面,基层优选具有弹性模量0.3GPa或更大,更优选是0.5GPa或更大,再更优选是1GPa或更大。通常,基层的弹性模量优选地为从约0.3到约100Gpa之间。粘附层优选地具有弹性模量0.1MPa或更大,更优选是0.5MPa或更大,再更优选是1MPa或更大。通常,粘附层的弹性模量优选地为从约0.1到约10Mpa之间。具有此弹性模量的粘附层,在步骤(4)等步骤中可以抗软化或抗流动,使得压模可以能因比较稳定的方式来实现。弹性模量由实施例部分中描述的方法具体确定。
在制造半导体器件的方法中,粘附薄片的粘附层对硅镜面晶片的粘附强度,优选地为从0.2到10N/10mm之间。
具有这样粘附强度的粘附薄片比较适合用于粘附。在步骤(1)到(4)中,附加到此薄片的粘附层的半导体元件可以抑制移动。在步骤(5)中,半导体器件容易脱离具有此粘附强度的粘附层,使半导体器件在具有较少损坏的情况下予以形成。优选地,粘附强度为从0.2到10N/10mm之间,更优选地为从0.2到2N/10mm之间。粘附强度由实施例部分中描述的方法具体确定。
本发明还在于提供一种用于制造半导体器件的方法中的粘附薄片,其包括基层和粘附层。
本发明中的薄片适用于本发明中的制造半导体器件的方法。如上所述,粘附薄片的基层弹性模量,优选地,在150℃下为0.3GPa或更大,粘附薄片的粘附层的弹性模量,优选地,在150℃下为0.1MPa或更大。在半导体器件的制造方法中,把半导体元件密封到树脂中的步骤,例如步骤(4),可以在约150到约180℃的高温下进行。所以,包括每个具有上述弹性模量的基层和粘附层的粘附薄片优选具有好的热阻。在这方面,基层优选具有0.3GPa或更大的弹性模量,更优选为0.5GPa或更大,再更优选为1GPa或更大。通常,基层的弹性模量,优选为从约0.3到100Gpa之间。粘附层优选具有0.1MPa或更大的弹性模量,更优选为0.5MPa或更大,再更优选为1MPa或更大。通常,粘附层的弹性模量优选为从约0.1到10Mpa之间。具有此弹性模量的粘附层,在步骤(4)等可以抗软化或抗流动,使得压模能以比较稳定的方式得以实现。弹性模量由实施例部分中描述的方法具体确定。
粘附层对硅镜面晶片的粘附强度,优选为从0.2到10N/10mm之间,更优选为从0.2到2N/10mm之间。
本发明还旨在提供一种半导体器件,其包括:具有电极的半导体元件;每个由导线连接到半导体元件的每个电极的导电部分;和密封树脂。其中半导体元件和导电部分以下述方式密封在树脂中,即半导体元件的无电极边和每个导电部分的无引线边暴露在同一表面上。其中半导体器件以下列步骤形成:
(1)在粘附薄片上的粘附层的部分上形成多个导电部分,所述粘附层包括基层和粘附层;
(2)把具有电极的至少一个半导体元件附加到粘附层,其中半导体元件的无电极边附加到粘附层;
(3)在每个导电部分和半导体元件的每个电极之间电连接导线;
(4)把半导体元件密封到密封树脂中以在粘附薄片上形成半导体器件;和
(5)将粘附薄片从半导体器件上脱离。
如图1(A)和图1(B)所示,根据本发明,半导体元件10和导电部分40暴露在半导体器件的同一表面上。此器件较薄,因为其没有结合在传统器件中的金属(模垫)和粘附层。此半导体器件可以由任何方法形成,具体地说其为包括步骤(1)到(5)的方法。
附图说明
图1(A)和1(B)是显示根据本发明的半导体器件的截面图。
图2是显示根据本发明的半导体器件制造方法的示意图。
图3显示根据本发明的半导体器件的顶视图。
图4是显示根据本发明的半导体器件制造方法的步骤(1)的另一个实例示意图。
图5是显示根据本发明的半导体器件制造方法的步骤(1)中形成的具有导电部分的粘附薄片的顶视图。
图6是显示根据本发明的半导体器件制造方法中使用的粘附薄片的截面图。
图7和8是显示在实例的方法中形成的具有导电部分的粘附薄片的顶视图。
图9和10是分别显示传统的半导体器件的截面图。
具体实施方式
下面参照附图,对包括半导体器件及其制造方法的本发明的具体实施方式进行具体说明。首先,根据本发明的半导体器件结构将参照图1(A)和1(B)进行具体描述,其分别为根据本发明的半导体器件的截面图。
半导体元件10由导线60各自连接到导电部分40。半导体元件10上端形成电极(图中未示出)。为避免外部环境影响,半导体元件10和导线60密封在密封树脂50中。半导体元件10和导电部分40的下表面在模制树脂50的表面上露出。在这种结构中,半导体元件10的无电极边和每个导电部分40的无引线边与同一表面齐平。因此,本发明的半导体器件既没有模垫,也没有连接半导体元件的粘附层。
图1(A)和图1(B)示出的结构不同之处在于,每个导电部分40的侧面46在图1(A)的结构中是暴露的,但在图1(B)的结构是嵌入式的。关于图1(A)和图1(B)差别的进一步的细节将在后面进行描述。
传统的半导体器件具有厚度约100到约200μm的模垫和厚度约10到约50μm的半导体元件-焊接粘附层。所以根据本发明,如果半导体元件和覆盖在半导体元件上的密封树脂具有相同的厚度,半导体器件的厚度可以减小110到250μm。图9所示的传统结构具有约为300到约700μm的厚度T1。其中安装在电路板上的电极放置在半导体元件下面。所以,根据本发明,厚度减小应该是很有效的。
下面将参照图2,对根据本发明的包括步骤(1)到(5)的制造半导体器件的方法的一个实例进行说明。
粘附薄片30包括基层32和粘附层31经过步骤(1),其中多个导电部分40形成在粘附层31的部分上。本发明中的步骤(1)也可以的通过各种方法来实现以形成导电部分40。例如,可以采用下述方法。参照图2(a),金属箔41附加到粘附薄片30的粘附层31。然后参照图2(b),使用通常的光刻技术实行图案蚀刻以形成导电部分40。金属箔41可以包括在半导体领域通常采用的任何箔材料。此箔的实例包括铜箔、铜-镍合金箔、Fe-Ni合金箔和Fe-Ni-Co合金箔。如果有必要,与粘附层31接触的金属箔41的表面42可以预先处理,以使其具有适于将半导体器件安装电路板等上的过程的状态。
图3是显示形成的导电部分40的排列平面图。形成的导电部分40与半导体元件10的电极数具有相对应的数量。电镀引线47用于电连接和电镀导电部分40。图2(b)是图3沿虚线a-b的截面图。
然后执行步骤(2),至少一个有电极的半导体元件10附加到粘附层31以使半导体元件10的无电极边与粘附层31形成接触。实行步骤(3),设置导线60使每个导电部分40电连接到半导体元件10的每个电极。步骤(2)和(3)显示在图2(e)中。
在步骤(2)前,电镀引线47可以最好用丝焊连接方式以在每个导电部分40的表面44上形成电镀层。此电镀工艺通常包括但并不限于Ni电镀和金电镀。
然后执行步骤(4),其中半导体元件10等密封到密封树脂50中以在粘附薄片30的粘附层31上形成半导体器件。密封在密封树脂50中的步骤可以通过通常的利用模具的转移压方式来实现。图2(f)示出了步骤(4)。在转移压模后,如果有必要,可以加热模制树脂以进行后固化。后固化加热也可以在分离粘附薄片30的步骤(5)之前或之后进行(如后描述)。
然后执行步骤(5),其中粘附薄片30与半导体器件分离。本步骤形成半导体器件90。步骤(5)显示在图4(g)中。在使用电镀引线47的情况,电镀引线部分被切断,从而形成半导体器件(图2(h))。在上述过程之后,得到如图1(A)所示的半导体器件。切断电镀引线47的步骤,可以在分离粘附薄片30的步骤之前或之后进行。
本发明的半导体器件可以按照图2中(a),(b),(e),(f),(g)和(h)的顺序制造。然而,如图2(c)所示,优选使保护层45形成在粘附层31的区域上以在步骤(2)前将其附加到半导体元件10上。保护层45有利于避免外来物质进入半导体元件10和粘附层31之间。
例如,保护层45可以通过图案蚀刻金属箔41而形成。图2(b)所示的步骤(1)中通过蚀刻去除了金属箔41的部分,以使将附加到半导体元件10的一些区域露出以形成金属箔40,如图2所示。与此不同,图2(C)所示,在将粘附到半导体元件10的区域不进行蚀刻以留下金属箔部分45。留下的金属箔部分45形成了保护层。然后,在步骤(2)中,剥落金属箔部分45(参见图2(d))。剥落保护层45(金属箔部分45)的方法不受限制,而可以包括各种方法。此后,同样执行图2中(e)和(f)部分所示步骤以形成半导体器件90。
金属箔部分45保护将被附加到半导体元件10的区域,它可以电连接到电镀引线,使其在对每个导电部分40的表面44进行电镀的过程中被电镀。否则,金属箔部分45不可以被连接到电镀引线。如果在电镀过程中没有电位加到金属箔部分45,电镀液可能会浸滤金属箔部分45的组分。所以优选电镀金属箔部分45。
作为另一种蚀刻方法,在如图2(b)所示的步骤后,也可以采用印刷保护涂层等方法,在步骤(2)前于粘附层31上形成保护层45。然而,此方法可能增加工艺步骤的数目。所以,蚀刻形成的金属箔部分45优选用于形成保护层45。
在上述参照图2和3的描述中,采用电镀方式以对每个导电部分40的表面进行电镀。在电镀方法中,也可以采用无电极电镀以取代电镀。在无电极电镀方法中,电镀引线47是不必要的,各个导电部分40在电学上彼此独立。所以,在形成模制树脂的步骤(4)之后,切断电镀引线的步骤是不必要的。此方法提供了图1(B)所示的半导体器件。无电极电镀方法通常需要一个步骤以保护避免电镀的部分,其上不形成涂层,因而可能增加工艺步骤数目。所以,优选的仍是电镀方式。
在参照图2的上述方法中,在粘附薄片30的粘附层31的部分上形成导电部分的步骤(1)通过将金属箔41附加到粘附层31上的方法予以实现。作为替代方法,可以使用电镀技术以在粘附层31上形成金属箔。例如,在粘附层31表面上的全部可以是用无电极电镀方法用金属进行薄电镀(通常无电极电镀厚度约0.05到约3μm),然后进行电镀以形成希望厚度的金属箔41。作为替代方式,可以用汽相沉积或溅射技术在粘附层31上形成薄金属层(通常厚度约0.05到约3μm),然后可以进行电镀以形成希望厚度的金属箔41。
另外,也可以在粘附薄片30的粘附层31上形成光敏抗蚀层,采用与导电部分所希望的形状和数目相应的一定图案的曝光掩膜的通常光刻技术,进而曝光和显影以形成与导电部分所希望的形状和数目相应的一定图案的抗蚀剂层。在此方法中,曝光掩膜有此形状以使电镀引线对导电部分40形成电连接以供电镀使用。此后,可以实现无电极电镀(通常无电极电镀厚度约0.05到约3μm)。剥离抗蚀剂层,然后使用电镀引线进行电镀以形成具有希望厚度的导电部分40。
另一方面,也可以使用汽相沉积或溅射技术,以在粘附薄片30的粘附层31上形成薄金属层41(通常具有厚度约0.05到约3μm)。在金属层41上可以形成光敏抗蚀剂层,采用与导电部分的所希望的形状和数目相应的一定图案的曝光掩膜的通常光刻技术,进而曝光和显影以形成与导电部分的希望的形状和数目相应的一定图案的抗蚀剂层。在此步骤中,相应的导电部分40可以由电镀引线连接,以便进行电镀。此后,由电镀引线可以实现希望厚度的电镀,并且可以剥离抗蚀剂层。然后,可以实现软蚀刻以去掉由汽相沉积或溅射生长成的薄金属层41,从而形成导电部分40。在此方法中,薄铜箔例如MicroThin(铜箔的商标名,例如厚度3μm,Mitsui Mining &Smelting Co.,Ltd.)可以附加到粘附薄片30的粘附层31上,代替由汽相沉积或溅射生长成的非常薄的金属层41。
另外,在粘附薄片30的粘附层31部分上形成导电部分40的步骤(1),也可以通过如图4所示的印刷加工方法来实现。图4的(a),(b),(d)和(g)给出所述方法的一个实施例,其中在步骤(2)前在粘附层31上没有形成保护层。图4中的(a),(c),(e),(f)和(h)示出了该方法的一个实施例,其中在步骤(2)前在粘附层31上形成了保护层。
参照图4(a),金属箔41附加到过程膜70。参照图4(b)和(c),金属箔41经过印刷加工以形成一定的图案。然后参照图4(d)和(e),金属箔41附加到粘附薄片30的粘附层31。此后,剥离过程膜70,从而形成导电部分40(图4(g)和(h))。在图4(f)中,金属箔45在步骤(2)前作为保护层,保护将附加到半导体元件的区域。在印刷加工后,导电部分40和金属箔45转移到粘附薄片30。所以,过程膜70的优选方式包括弱粘附强度的粘附薄片和粘附强度会因受加热、电子束或紫外线照射等而减弱的粘附膜。在微细加工等情况,特别优选的是,过程膜在加工时具有强的粘附强度中,其中焊接区域做得很小,在转移时具有弱的粘附强度。此薄片的实例包括热起泡剥离带(ReverAlpha(商标名),Nitto Denko Corporation)和可紫外固化的粘附薄片(ElepHolder,Nitto Denko Corporation)。
为容易理解,根据本发明的上述方法制造单个半导体器件。然而,在实际过程中可以同时形成多个半导体元件,如图5所示。图5(a)是显示粘附薄片30的平面示意图。粘附薄片30的上端面具有大量方块80的矩阵,其中每个方块80包括将附加到一个半导体元件的区域和围绕该区域形成的导电部分。图5(b)是一个方块80的放大图,其中希望数目的导电部分40形成在将附加到半导体元件的区域81的周围。
例如,图5(a)中粘附薄片宽度(W1)为500mm。在此实例中,薄片经过通常的光刻并在金属箔蚀刻设备中进行加工处理,以形成一定数量的方块80并连续地绕成一卷。在适当时候,由此产生的宽度500mm的粘附薄片30被切成小块,所述小块具有包括附加半导体元件的步骤(2)、丝焊的步骤(3)和通过转移压模密封在树脂中的后续步骤(4)等所需要数目的方块。在多个半导体元件通过转移压模方式密封在树脂中后,模制树脂也切成一定大小以形成半导体器件。
在本发明的优选模式中,粘附薄片30稳定地粘附到半导体元件10,并且保持半导体元件10和导电部分40直到密封步骤(4)完成,然后其容易地从半导体器件90上剥离下来。如上所述,此粘附薄片30具有基层32和粘附层31。基层32的厚度通常为但不限于从约12到约100μm,优选从25到50μm之间。粘附层31的厚度通常是,但不限于从约1到20μm,优选地从5到10μm之间。粘附薄片可以是粘附条带的形状。
包括转移压模等步骤的步骤(4)可以在约150到180℃的高温下进行。所以,基层32和粘附层31应该能经受上述加热过程。如上所述,基层32优选具有弹性模量在150℃下为0.3GPa或更大。基层32可以用有机材料或无机材料制成。如果采用电镀方法或类似方法,优选使用有机材料。有上述弹性模量的有机基层材料的实例包括抗热有机膜,如聚酰亚胺膜、聚乙醚胺膜、聚次苯硫膜、聚脂膜和交联聚乙烯膜(polyimide film;polyetherimidefilm;a polyphenylenesulfide film;a polyester film;and acrosslinked polyethylene film)。
用于粘附层31的粘合剂实例包括热弹性粘合剂,例如橡胶基、乙烯共聚物基或聚酰亚胺基粘合剂和压敏粘合剂,例如硅基或丙烯酸粘合剂。可以适当选择这些粘合剂中的任何一种,但是从抗热和粘附的观点,优选硅基压敏粘合剂。如上所述,优选地,粘附层31的弹性模量在150℃下为0.1MPa或更大。对硅镜面镜片的粘附层的粘附强度,优选在从0.2到10N/10mm之间。粘附层31可以在加热、电子束和紫外光等的影响粘附作用减小,从而使得在步骤(5)中能够被容易地剥离。此粘附薄片的实例包括热起泡剥离条带和可紫外固化的粘附薄片。
粘附薄片30根据需要可以具有抗静电功能。参照图6,下面对提供抗静电功能的粘附薄片30的方法进行说明。例如,抗静电功能通过对粘附层31或基层32加抗静电剂或导电填充剂的方法来提供。作为替代方式,抗静电剂可以加到基层32和粘附层31之间的界面33,或加到基层32的背表面34。根据抗静电功能,在粘附薄片从半导体器件脱离的步骤中静电得到抑制。本发明中可以采用能提供抗静电功能的任何制剂,不受限制。抗静电剂的实例包括聚丙烯两性的表面活性剂、聚丙烯阳离子表面活性剂和顺丁烯二酸酐-苯乙烯基阴离子表面活性剂(acrylic amphoteric surfactants,acryliccationic surfactants,maleic anhydride-styrene based anionicsurfactants)。抗静电层的材料实例包括Bondip PA、Bondip PX和BondipP(Konishi Co.,Ltd)。可以使用任何传统的填充剂,例如包括金属如Ni、Fe、Cr、Co、Al、Sb、Mo、Cu、Ag、Pt和Au;它们的任何合金或氧化物;以及碳,例如碳黑。可以单独使用这些材料之一种,或两种或更多种组合使用。导电填充剂可以是粉末或纤维形式。此外,任何其它已知的添加剂,如抗氧化剂、色素、增塑剂、填充剂和增粘剂,可以加到粘附薄片中。
实施例
下面将参照实施例对根据本发明的制造半导体器件的方法进行更加详细地说明。
实施例1
粘附薄片的生产
硅基粘合剂(SD-4587L,Toray Dow Corning Co.,Ltd.)加到厚度为25μm,宽为500mm的聚酰亚胺膜(KaptonH,Du Pont-Toray Co.,Ltd.)上,然后在150℃下干燥3分钟以形成具有厚度为5μm的粘附层的粘附薄片。粘附薄片的粘附层弹性模量在150℃下为0.15MPa,对硅镜面晶片的粘附强度为0.25N/10mm。用作基层的聚酰亚胺膜弹性模量在150℃下为1.8GPa。
半导体器件的制造
厚度35μm的铜箔(BHY-138T,Japan Energy Corporation)附加到粘附薄片的粘附层上以形成易变形的金属-附加粘附薄片。在图案蚀刻后,与每个方块80(有500mm的W1)相应的如图5所示的一个方块具有如图7所示的排列方式的导电部分40。参照图7,16个导电部分40形成在长方形的每个边上,形成总共64个导电部分40。金属箔用通常的光刻技术进行蚀刻以形成多个方块82。结果,形成了由电镀引线47电连接的导电部分(在图7中未示出,但在图8中示出)。图8示出了由图案蚀刻形成的16个方块82。形成电镀引线47以连接所有的导电部分40。此后,实现通常的电镀,在导电部分40上形成Ni/Au电镀层(Ni厚度5μm,Au厚度1μm)。如图8所示的金属-附加薄片切成许多段,每个段有4×4的方块82的矩阵。具有4×4的方块82的一段称为一个单元。
测试铝汽相-沉积的硅芯片,其每个大小为6mm×6mm,在室温下每个固定到粘附薄片的粘附层表面(与图5(b)中的部分81相应的指定的安装面)。直径25μm的金导线,把硅芯片的每个电极丝焊到每个导电部分。焊线总数是每个芯片64个。
在包括160个铝汽相-沉积芯片的十个单元(每个单元具有4×4矩阵)上进行丝焊。丝焊的成功率为100%。随后,对模制树脂(HC-100,Nitto DenkoCorporation)实行转移压模。在树脂成模后,在室温下剥离粘附薄片。然后在175℃下实行后固化达5小时。然后,切割每个单元成为一个方块,从而得到半导体器件。
在形成的半导体器件内部,用软X-射线仪(微-聚焦的X射线电视放射镜SMX-100 Shimadzu Corporation)观测。结果,可以证明形成的半导体器件中没有变形的导线、没有偏移的芯片等。
实例2
除了使用厚度18μm的铜-镍合金箔(C7025,Japan Energy Corporation)外,采用实例1中的方法来形成半导体器件。丝焊的成功率为100%。在形成的半导体器件内部,观测证明,形成的半导体器件没有变形的导线、没有偏移的芯片等。丝焊条件
设备: UTC-300BI SUPER(Shinkawa Ltd.)
超声波频率: 115kHz
超声波输出时间: 15ms
超声波输出功率: 120mW
焊接负载: 1.18N
检查负载: 1.37N转移模条件
设备: TOWA成模机
成模温度: 175℃
时间: 90s
夹具压力: 200kN
转移速度: 3mm/s
转移压力: 5kN弹性模量测定方法
基层和粘附层的弹性模量是在下列条件下测定的:
评价系统:Rheometrics Viscoelastic Spectrometer(ARES)
温度上升速率: 5℃/min
频率: 1Hz
测量模式: 张力模式粘附强度测量方法
宽度10mm,长度50mm的粘附薄片在150℃下、0.5Mpa、0.5m/min的条件下层压在硅镜面晶片(CZN<100>2.5-3.5(4inch)(productname),Shin-Etsu Handotai Co.,Ltd.),接着,存放在150℃的热空气炉中达1小时。然后,粘附薄片在温度23℃和相对湿度65%下,以300mm/min的牵引速率沿180℃方向牵引,测试得到的中心值确定为粘附强度。丝焊成功率
焊接测试仪PTR-30(Rhesca Co.,Ltd.)在牵引测试的测量模式条件下,测量速度为0.5mm/s,用来测量每个焊线的牵引强度。0.04N或更大的牵引强度的情况,评价为“成功”,小于0.04N评价为“失败”。丝焊成功率从测量为“成功”情况的百分比中得到。
根据本发明的半导体器件的制造方法中,可以使用相对厚的半导体晶片来形成薄的半导体器件。根据本发明,半导体元件在加工过程中可以没有位移,半导体器件可以通过相对少的步骤和相对低的成本来进行生产。
Claims (6)
1.一种半导体器件的制造方法,包括步骤:
(1)在粘附薄片上的粘附层的部分上形成多个导电部分,所述粘附层包括基层和粘附层;
(2)把具有电极的至少一个半导体元件附加到粘附层,其中半导体元件的无电极边附加到粘附层;
(3)在每个导电部分和半导体元件的每个电极之间电连接导线;
(4)把半导体元件密封到密封树脂中以在粘附薄片上形成半导体器件;和
(5)将粘附薄片从半导体器件上脱离。
2.根据权利要求1所述的方法,其特征在于在步骤(2)前,附加半导体元件的粘附层区域被保护层予以覆盖。
3.根据权利要求1或2所述的方法,其特征在于粘附薄片基层的弹性模量在150℃下为0.3GPa或更大,且粘附薄片的粘附层的弹性模量在150℃下为0.1MPa或更大。
4.根据权利要求1至3中任何一项所述的方法,其特征在于粘附薄片的粘附层对硅镜面晶片的粘附强度为0.2至10N/10mm。
5.一种用于制造上述权利要求1至4中任何一项所述的半导体器件的方法中的粘附薄片,其包括基层和粘附层。
6.一种半导体器件,其包括
具有电极的半导体元件;
由导线各自连接到半导体元件的每个电极的导电部分;和
密封树脂,其中半导体元件和导电部分按下述密封在密封树脂中,即半导体元件的无电极边和每个导电部分的无引线边暴露在同一表面上,其中:
半导体器件可以通过下列步骤形成:
(1)在粘附薄片上的粘附层的部分上形成多个导电部分,所述粘附层包括基层和粘附层;
(2)把具有电极的至少一个半导体元件附加到粘附层,其中半导体元件的无电极边附加到粘附层;
(3)在每个导电部分和半导体元件的每个电极之间电连接导线;
(4)把半导体元件密封到密封树脂中以在粘附薄片上形成半导体器件;和
(5)将粘附薄片从半导体器件上脱离。
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2003
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- 2003-07-16 CN CNA031784593A patent/CN1476066A/zh active Pending
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2005
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CN105895606A (zh) * | 2014-12-29 | 2016-08-24 | 飞思卡尔半导体公司 | 具有带状线的封装半导体器件 |
Also Published As
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JP2004063615A (ja) | 2004-02-26 |
US20040018659A1 (en) | 2004-01-29 |
US20050133824A1 (en) | 2005-06-23 |
US6858473B2 (en) | 2005-02-22 |
US7235888B2 (en) | 2007-06-26 |
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