CN1290389C - 有内构电子元件的电路板及其制造方法 - Google Patents
有内构电子元件的电路板及其制造方法 Download PDFInfo
- Publication number
- CN1290389C CN1290389C CNB021518017A CN02151801A CN1290389C CN 1290389 C CN1290389 C CN 1290389C CN B021518017 A CNB021518017 A CN B021518017A CN 02151801 A CN02151801 A CN 02151801A CN 1290389 C CN1290389 C CN 1290389C
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- Prior art keywords
- electronic component
- insulating barrier
- wiring
- circuit board
- support plate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP339837/01 | 2001-11-05 | ||
JP339837/2001 | 2001-11-05 | ||
JP2001339837A JP3910045B2 (ja) | 2001-11-05 | 2001-11-05 | 電子部品内装配線板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1438833A CN1438833A (zh) | 2003-08-27 |
CN1290389C true CN1290389C (zh) | 2006-12-13 |
Family
ID=19154129
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB021518017A Expired - Fee Related CN1290389C (zh) | 2001-11-05 | 2002-11-05 | 有内构电子元件的电路板及其制造方法 |
Country Status (3)
Country | Link |
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US (1) | US6948944B2 (ja) |
JP (1) | JP3910045B2 (ja) |
CN (1) | CN1290389C (ja) |
Families Citing this family (59)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004200464A (ja) * | 2002-12-19 | 2004-07-15 | Anden | 金属配線板 |
US7208825B2 (en) * | 2003-01-22 | 2007-04-24 | Siliconware Precision Industries Co., Ltd. | Stacked semiconductor packages |
DE10343053A1 (de) * | 2003-09-16 | 2005-04-07 | Siemens Ag | Elektronisches Bauelement und Anordnung mit einem elektronischen Bauelement |
JP3979404B2 (ja) * | 2004-06-30 | 2007-09-19 | カシオ計算機株式会社 | 半導体装置 |
WO2005062318A1 (ja) * | 2003-12-18 | 2005-07-07 | Matsushita Electric Industrial Co., Ltd. | 電子部品 |
JP4841806B2 (ja) * | 2004-02-02 | 2011-12-21 | 新光電気工業株式会社 | キャパシタ装置とそれを備えた半導体装置、及びキャパシタ装置の製造方法 |
JP4361826B2 (ja) * | 2004-04-20 | 2009-11-11 | 新光電気工業株式会社 | 半導体装置 |
FI117812B (fi) * | 2004-08-05 | 2007-02-28 | Imbera Electronics Oy | Komponentin sisältävän kerroksen valmistaminen |
JP2006120943A (ja) * | 2004-10-22 | 2006-05-11 | Shinko Electric Ind Co Ltd | チップ内蔵基板及びその製造方法 |
US7025607B1 (en) * | 2005-01-10 | 2006-04-11 | Endicott Interconnect Technologies, Inc. | Capacitor material with metal component for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate |
DE102005006638B4 (de) * | 2005-02-14 | 2009-01-02 | Siemens Ag | Haftfeste Leiterbahn auf Isolationsschicht |
JP4545022B2 (ja) * | 2005-03-10 | 2010-09-15 | 三洋電機株式会社 | 回路装置およびその製造方法 |
JP4175351B2 (ja) * | 2005-08-26 | 2008-11-05 | 松下電工株式会社 | 凹凸多層回路板モジュール及びその製造方法 |
JP4766049B2 (ja) * | 2005-09-20 | 2011-09-07 | 株式会社村田製作所 | 部品内蔵モジュールの製造方法および部品内蔵モジュール |
JP4826248B2 (ja) * | 2005-12-19 | 2011-11-30 | Tdk株式会社 | Ic内蔵基板の製造方法 |
JP2007266379A (ja) * | 2006-03-29 | 2007-10-11 | Toshiba Corp | 部品内蔵プリント配線板、部品内蔵プリント配線板の製造方法および電子機器 |
KR100751995B1 (ko) * | 2006-06-30 | 2007-08-28 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
KR100783277B1 (ko) | 2006-08-31 | 2007-12-06 | 동부일렉트로닉스 주식회사 | 반도체소자 및 그 제조방법 |
US20080053700A1 (en) * | 2006-09-06 | 2008-03-06 | O'connor Kurt F | Sealed electronic component |
JP2011501870A (ja) * | 2007-05-08 | 2011-01-13 | オッカム ポートフォリオ リミテッド ライアビリティ カンパニー | はんだの無い電子組立体及びそれらの製造方法 |
US7926173B2 (en) | 2007-07-05 | 2011-04-19 | Occam Portfolio Llc | Method of making a circuit assembly |
DE102007024189A1 (de) * | 2007-05-24 | 2008-11-27 | Robert Bosch Gmbh | Verfahren zur Herstellung einer elektronischen Baugruppe |
TW200906263A (en) * | 2007-05-29 | 2009-02-01 | Matsushita Electric Ind Co Ltd | Circuit board and method for manufacturing the same |
US8106496B2 (en) * | 2007-06-04 | 2012-01-31 | Stats Chippac, Inc. | Semiconductor packaging system with stacking and method of manufacturing thereof |
US8300425B2 (en) * | 2007-07-31 | 2012-10-30 | Occam Portfolio Llc | Electronic assemblies without solder having overlapping components |
JPWO2009118925A1 (ja) * | 2008-03-27 | 2011-07-21 | イビデン株式会社 | 電子部品内蔵配線板及びその製造方法 |
DE102008023714B4 (de) * | 2008-05-15 | 2011-01-20 | Semikron Elektronik Gmbh & Co. Kg | Anordnung mit einem Hauptträger und einer Leiterplatte mit Bauelementen |
TWI453877B (zh) * | 2008-11-07 | 2014-09-21 | Advanced Semiconductor Eng | 內埋晶片封裝的結構及製程 |
US8441804B2 (en) * | 2008-07-25 | 2013-05-14 | Infineon Technologies Ag | Semiconductor device and method of manufacturing a semiconductor device |
US8183677B2 (en) * | 2008-11-26 | 2012-05-22 | Infineon Technologies Ag | Device including a semiconductor chip |
US9691734B1 (en) | 2009-12-07 | 2017-06-27 | Amkor Technology, Inc. | Method of forming a plurality of electronic component packages |
US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
US8320134B2 (en) | 2010-02-05 | 2012-11-27 | Advanced Semiconductor Engineering, Inc. | Embedded component substrate and manufacturing methods thereof |
KR101104210B1 (ko) * | 2010-03-05 | 2012-01-10 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
TWI411075B (zh) | 2010-03-22 | 2013-10-01 | Advanced Semiconductor Eng | 半導體封裝件及其製造方法 |
CN102378464A (zh) * | 2010-08-12 | 2012-03-14 | 环鸿科技股份有限公司 | 电路板模块 |
EP2421339A1 (de) | 2010-08-18 | 2012-02-22 | Dyconex AG | Verfahren zum Einbetten von elektrischen Komponenten |
US9406658B2 (en) | 2010-12-17 | 2016-08-02 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
DE102011012186B4 (de) * | 2011-02-23 | 2015-01-15 | Texas Instruments Deutschland Gmbh | Chipmodul und Verfahren zur Bereitstellung eines Chipmoduls |
US8487426B2 (en) | 2011-03-15 | 2013-07-16 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with embedded die and manufacturing methods thereof |
US8491315B1 (en) * | 2011-11-29 | 2013-07-23 | Plastronics Socket Partners, Ltd. | Micro via adapter socket |
JP2013222924A (ja) * | 2012-04-19 | 2013-10-28 | Furukawa Electric Co Ltd:The | 部品内蔵基板 |
US9113574B2 (en) * | 2012-10-25 | 2015-08-18 | Ibiden Co., Ltd. | Wiring board with built-in electronic component and method for manufacturing the same |
JP2015038912A (ja) * | 2012-10-25 | 2015-02-26 | イビデン株式会社 | 電子部品内蔵配線板およびその製造方法 |
KR102107038B1 (ko) * | 2012-12-11 | 2020-05-07 | 삼성전기주식회사 | 칩 내장형 인쇄회로기판과 그를 이용한 반도체 패키지 및 칩 내장형 인쇄회로기판의 제조방법 |
AT514564B1 (de) * | 2013-07-04 | 2015-02-15 | Austria Tech & System Tech | Verfahren zum Ankontaktieren und Umverdrahten |
KR20150074649A (ko) * | 2013-12-24 | 2015-07-02 | 삼성전기주식회사 | 반도체 패키지 및 그 제조 방법 |
KR102231101B1 (ko) * | 2014-11-18 | 2021-03-23 | 삼성전기주식회사 | 소자 내장형 인쇄회로기판 및 그 제조방법 |
US10264664B1 (en) | 2015-06-04 | 2019-04-16 | Vlt, Inc. | Method of electrically interconnecting circuit assemblies |
JP6444269B2 (ja) * | 2015-06-19 | 2018-12-26 | 新光電気工業株式会社 | 電子部品装置及びその製造方法 |
US10903734B1 (en) | 2016-04-05 | 2021-01-26 | Vicor Corporation | Delivering power to semiconductor loads |
US10785871B1 (en) | 2018-12-12 | 2020-09-22 | Vlt, Inc. | Panel molded electronic assemblies with integral terminals |
US10158357B1 (en) | 2016-04-05 | 2018-12-18 | Vlt, Inc. | Method and apparatus for delivering power to semiconductors |
US11336167B1 (en) | 2016-04-05 | 2022-05-17 | Vicor Corporation | Delivering power to semiconductor loads |
CN107567195A (zh) * | 2016-07-01 | 2018-01-09 | 立迈科技股份有限公司 | 电路板的制作方法 |
CN106332451A (zh) * | 2016-08-31 | 2017-01-11 | 安徽赛福电子有限公司 | 电子元器件插脚转接组件 |
WO2018194012A1 (ja) | 2017-04-19 | 2018-10-25 | 株式会社村田製作所 | モジュール |
US11482481B2 (en) * | 2019-09-27 | 2022-10-25 | Intel Corporation | Semiconductor device and system |
EP4017226A4 (en) * | 2020-07-07 | 2023-07-19 | Shennan Circuits Co., Ltd. | INTEGRATED CIRCUIT CARD AND METHOD OF MANUFACTURING FOR INTEGRATED CIRCUIT CARD |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US359159A (en) * | 1887-03-08 | Storage-floor | ||
US3728661A (en) * | 1970-03-12 | 1973-04-17 | Honeywell Inf Systems | Modular cabling system |
US4530552A (en) * | 1983-11-25 | 1985-07-23 | Amp Incorporated | Electrical connector for integrated circuit package |
DE3538048A1 (de) * | 1984-10-25 | 1986-04-30 | Fuji Photo Film Co., Ltd., Minami-Ashigara, Kanagawa | Einrichtung zum herstellen von fotoabzuegen auf fortlaufendem fotopapier |
US4647666A (en) * | 1985-04-01 | 1987-03-03 | Iowa State University Research Foundation, Inc. | Heterocyclic synthesis via thallation and subsequent palladium-promoted olefination |
JPH06120671A (ja) | 1991-03-12 | 1994-04-28 | Japan Radio Co Ltd | 部品埋め込み多層配線基板 |
JP3208176B2 (ja) | 1992-05-18 | 2001-09-10 | イビデン株式会社 | 電子回路部品を埋め込んだ多層プリント配線板 |
JPH06314859A (ja) | 1993-04-28 | 1994-11-08 | Ibiden Co Ltd | 電子部品搭載用基板及びその製造方法 |
JP3152559B2 (ja) | 1994-04-04 | 2001-04-03 | イビデン株式会社 | 半導体搭載基板 |
US5805431A (en) * | 1996-01-17 | 1998-09-08 | Synergy Microwave Corporation | Surface Mountable transformer |
JPH11127055A (ja) * | 1997-10-23 | 1999-05-11 | Murata Mfg Co Ltd | 複合電子部品 |
DE10036900C2 (de) * | 2000-07-28 | 2002-07-11 | Siemens Ag | Verfahren zur Kontaktierung einer flexiblen Leiterplatte mit einem Kontaktpartner und Anordnung aus flexibler Leiterplatte und Kontaktpartner |
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CN1438833A (zh) | 2003-08-27 |
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US6948944B2 (en) | 2005-09-27 |
US20030087538A1 (en) | 2003-05-08 |
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