CN111362694B - 陶瓷介电组合物以及包含其的多层陶瓷电容器 - Google Patents

陶瓷介电组合物以及包含其的多层陶瓷电容器 Download PDF

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CN111362694B
CN111362694B CN202010187414.5A CN202010187414A CN111362694B CN 111362694 B CN111362694 B CN 111362694B CN 202010187414 A CN202010187414 A CN 202010187414A CN 111362694 B CN111362694 B CN 111362694B
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ltoreq
dielectric composition
ceramic
auxiliary component
ceramic dielectric
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CN111362694A (zh
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朴宰成
尹硕晛
金昶勋
金斗永
曹秀景
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Samsung Electro Mechanics Co Ltd
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Abstract

本发明公开一种陶瓷介电组合物以及包含其的多层陶瓷电容器，所述陶瓷介电组合物包含由(Ca1‑xSrx)(Zr1‑yTiy)O3、Ca(Zr1‑yTiy)O3、Sr(Zr1‑yTiy)O3、(Ca1‑xSrx)ZrO3和(Ca1‑xSrx)TiO3中的一种或更多种表示的基体材料粉末，其中，x和y分别满足0≤x≤1.0和0.2≤y≤0.9。所述陶瓷介电材料在实现相对高电容的同时，可具有高的室温介电常数、优异的ESD保护特性并可确保耐受电压特性。

Description

陶瓷介电组合物以及包含其的多层陶瓷电容器
本申请是申请日为2015年11月20日、申请号为201510810082.0的发明专利申请“陶瓷介电组合物以及包含其的多层陶瓷电容器”的分案申请。
技术领域
本公开涉及一种陶瓷介电组合物以及包含该陶瓷介电组合物的多层陶瓷电容器，所述陶瓷电子组件能够应用于汽车电子并具有优异的机械强度和静电放电(ESD)保护特性。
背景技术
通常，使用陶瓷材料的电子组件(例如，电容器、电感器、压电元件、压敏电阻或热敏电阻等)包括：陶瓷主体，由陶瓷材料形成；内电极，形成在陶瓷主体中；外电极，安装在陶瓷主体的表面上，以连接到内电极。
在陶瓷电子组件中，多层陶瓷电容器通常包括多个堆叠的介电层、彼此面对地设置的内电极(且各个介电层置于内电极之间)以及电连接到内电极的外电极。
由于多层陶瓷电容器的固有优点(例如，小尺寸、高电容、易于安装等)，因此多层陶瓷电容器已被广泛地用作移动通信装置(例如，平板电脑、个人数字助理(PDA)、移动电话等)的组件。
特别地，用于汽车应用的多层陶瓷电容器应具有优异的机械强度和优异的静电放电(ESD)保护特性。
通常，作为铁电材料的介电材料(满足X7R特性)或C0G基(C-零-G 顺电材料)已被用作应用于具有静电放电(ESD)保护特性的多层陶瓷电容器的陶瓷介电组合物。
铁电材料具有高程度的介电常数，因此提供的优点在于：介电层可被设计得相对厚。然而，当对静电放电(ESD)保护特性进行评估时，在高电场环境下会出现电致伸缩裂纹，或者由于DC偏置特性导致电容会减小，从而实际上会将更高的电压施加到电容器，因此ESD保护特性劣化。
C0G基顺电材料具有低的介电常数，因此介电层会相对薄，因此，耐受电压特性会劣化，从而不会满足ESD保护特性。
因此，因此需要对因无论直流(DC)电场如何介电常数都保持不变而具有相对高的介电常数并且同时具有优异的DC偏置特性的介电材料进行研究，以作为汽车静电放电(ESD)保护电容器的介电组合物。
发明内容
本发明的一方面可提供一种陶瓷介电组合物以及包含该陶瓷介电组合物的多层陶瓷电容器，所述陶瓷介电组合物能够在汽车电子中使用并具有优异的机械强度以及静电放电(ESD)保护特性。
根据本公开的一方面，一种陶瓷介电组合物可包含由(Ca1-xSrx)(Zr1-yTiy)O3、 Ca(Zr1-yTiy)O3、Sr(Zr1-yTiy)O3、(Ca1-xSrx)ZrO3和(Ca1-xSrx)TiO3中的一种或更多种表示的基体材料粉末，其中，x和y分别满足0≤x≤1.0和0.2≤y≤0.9。
x和y可具有不同的值。
根据本公开的另一方面，一种多层陶瓷电容器可包括陶瓷主体，其中，介电层以及第一内电极和第二内电极交替地堆叠在陶瓷主体中。第一外电极和第二外电极形成在陶瓷主体的相背对的端部上并电连接到第一内电极和第二内电极。介电层可包含含有由(Ca1- xSrx)(Zr1-yTiy)O3、Ca(Zr1-yTiy)O3、 Sr(Zr1-yTiy)O3、(Ca1-xSrx)ZrO3和(Ca1-xSrx)TiO3中的一种或更多种表示的基体材料粉末的陶瓷介电组合物，其中，x和y分别满足0≤x≤1.0和0.2≤y≤0.9。
根据本公开的另一方面，一种多层陶瓷电容器可包括陶瓷主体，其中，介电层以及第一内电极和第二内电极交替地堆叠在陶瓷主体中。第一外电极和第二外电极形成在陶瓷主体的相背对的端部上并电连接到第一内电极和第二内电极。介电层可包含陶瓷介电组合物，所述陶瓷介电组合物具有50或更大的室温介电常数，并且当DC电场从0V/μm变化到5V/μm时满足10％或更小的介电常数(εr)变化率。
附图说明
通过下面结合附图进行的详细描述，本公开的以上和其他方面、特征和其他优点将会被更清楚地理解，在附图中：
图1是示出根据本公开的实施例和对比示例的介电常数随直流电压(V) 改变的曲线图；
图2是根据本公开的示例性实施例的多层陶瓷电容器的示意性透视图；
图3是沿着图2的A-A’线截取的多层陶瓷电容器的示意性剖视图。
具体实施方式
在下文中，将参照附图详细描述本公开的实施例。
然而，本公开可按照多种不同的形式实施，并不应该被解释为局限于在此阐述的实施例。确切地说，提供这些实施例以使本公开将是彻底的和完整的，并且将把本公开的范围充分地传达给本领域技术人员。
在附图中，为了清晰起见，可夸大元件的形状和尺寸，并且相同的标号将始终用于表示相同或相似的元件。
本公开涉及一种陶瓷介电组合物。包含陶瓷介电组合物的电子组件的示例可包括电容器、电感器、压电元件、压敏电阻、热敏电阻等。在下文中，将作为电子组件的示例描述陶瓷介电组合物和多层陶瓷电容器。
根据本公开的示例性实施例的陶瓷介电组合物可包含由 (Ca1-xSrx)(Zr1-yTiy)O3、Ca(Zr1-yTiy)O3、Sr(Zr1-yTiy)O3、(Ca1-xSrx)ZrO3和(Ca1-xSrx)TiO3中的一种或更多种表示的基体材料粉末，其中，x和y分别满足 0≤x≤1.0和0.2≤y≤0.9。
根据本公开的示例性实施例的陶瓷介电组合物的介电常数可为50或更大。在某一实施例中，在室温下，所述组合物的介电常数为100或更大。
此外，使用根据本公开的示例性实施例的陶瓷介电组合物的多层陶瓷电容器可具有优异的DC偏置特性。例如，当施加直流(DC)电场时，介电常数不变，因此电容不减小，从而耐受电压特性不会劣化，并且ESD保护特性也可优异。
在下文中，将详细地描述根据本公开的示例性实施例的陶瓷介电组合物的各种成分。
a)基体材料粉末
根据本公开的示例性实施例的陶瓷介电组合物可包含由 (Ca1-xSrx)(Zr1-yTiy)O3、Ca(Zr1-yTiy)O3、Sr(Zr1-yTiy)O3、(Ca1-xSrx)ZrO3和 (Ca1-xSrx)TiO3中的一种或更多种表示的基体材料粉末，其中，x和y分别满足 0≤x≤1.0和0.2≤y≤0.9。
通常，使用作为铁电材料的介电材料(满足X7R特性)或COG基顺电材料作为应用于具有静电放电(ESD)保护特性的多层陶瓷电容器的陶瓷介电组合物。
例如，在将陶瓷介电组合物应用于汽车电子的情况下，需要多层陶瓷电容器具有优异的机械强度和优异的静电放电(ESD)保护特性。
铁电材料具有高介电常数，因此可将介电层设计得相对厚。但是当对静电放电(ESD)保护特性进行评估时，在高电场环境下会出现电致伸缩裂纹，或者由于DC偏置特性导致实际电容会减小，从而实际上会将更高的电压施加到电容器，因此ESD保护特性劣化。
此外，在使用C0G基顺电材料的情况下，介电常数相对低，因此为了确保电容器的电容，介电层的厚度应减小，因此耐受电压特性会劣化，并且不会满足ESD保护特性。
根据本公开的示例性实施例，陶瓷介电组合物可包含使用具有优异的DC 偏置特性的顺电材料的基体材料粉末，但与普通的顺电材料相比，基体材料粉末的室温介电常数增大大约4倍或更多倍。
例如，通过在增大顺电材料的室温介电常数的同时使用具有优异的DC 偏置特性的顺电材料，可确保优异的ESD保护特性，可获得高电容，同时可提高耐受电压特性。
详细地讲，基体材料粉末可由(Ca1-xSrx)(Zr1-yTiy)O3、Ca(Zr1-yTiy)O3、 Sr(Zr1- yTiy)O3、(Ca1-xSrx)ZrO3和(Ca1-xSrx)TiO3中的一种或多种表示。这种材料可以是具有优异的DC偏置特性的顺电材料。
此外，为了增大顺电材料的室温介电常数，可调节Zr/Ti在材料的固溶元素中的比值。
例如，可通过调节y以获得满足0.2≤y≤0.9的Zr/Ti的比值，从而使根据本公开的示例性实施例的顺电材料的介电常数相对于普通顺电材料增大4倍或更多倍。
在y小于0.2的情况下，顺电材料的介电常数会相对低，因此当介电层形成为具有小的厚度以获得需要的电容时，耐受电压特性会劣化。
在y大于0.9的情况下，不会实现X7R(-55℃～125℃)温度特性。
例如，根据本公开的示例性实施例，可通过调节y以获得满足0.2≤y≤0.9 的Zr/Ti的比值，从而使室温绝缘电阻优异。
然而，当x和y彼此相同时，室温绝缘电阻会减小。因此，根据本公开的示例性实施例的x和y可具有不同的值。
例如，通过将具有优异的DC偏置特性的顺电材料中的各种成分的组成比调节为处于预定范围内，根据本公开的示例性实施例的陶瓷介电组合物的基体材料粉末可具有高的室温介电常数以及优异的DC偏置特性。
由于基体材料粉末的室温介电常数比根据现有技术的顺电材料的室温介电常数高，因此可将介电层设计得更厚，并且由于顺电材料可呈现优异的DC 偏置特性，因此ESD保护特性也可优异。
基体材料粉末不受具体限制，但可具有1000nm或更小的平均粒径。
b)第一辅助成分
根据本公开的示例性实施例，陶瓷介电组合物还可包含含有锰(Mn)、钒(V)、铬(Cr)、铁(Fe)、镍(Ni)、钴(Co)、铜(Cu)和锌(Zn) 中的至少一种或多种的氧化物或碳酸盐作为第一辅助成分。
可基于100％原子百分比的基体材料粉末包含0.1％至1.0％原子百分比的量的包含Mn、V、Cr、Fe、Ni、Co、Cu和Zn中的至少一种或更多种的氧化物或碳酸盐作为第一辅助成分。
第一辅助成分可用于降低使用陶瓷介电组合物的多层陶瓷电容器的烧结温度并提高高温耐受电压特性。
可基于100％原子百分比的基体材料粉末通过包含在各种辅助成分中的金属离子的原子百分比(at％)来限定下面将描述的第一辅助成分的含量和第二辅助成分的含量。
当第一辅助成分的含量小于0.1％原子百分比时，抗还原性和可靠性会劣化。
当第一辅助成分的含量大于1.0％原子百分比时，会出现不良效果(例如，烧结温度升高、电容减小、老化率增大等)。
例如，根据本公开的示例性实施例的陶瓷介电组合物基于100％原子百分比的基体材料粉末还可包含0.1％至1.0％原子百分比的第一辅助成分，从而陶瓷介电组合物可在相对低的温度下进行烧结，并且获得优异的高温耐受电压特性。
c)第二辅助成分
根据本公开的示例性实施例，陶瓷介电组合物可包含含有镁(Mg)和铝(Al)中的至少一种的氧化物或碳酸盐作为第二辅助成分。
陶瓷介电组合物基于100％原子百分比的基体材料粉末可包含0.1％至1.0％原子百分比的第二辅助成分(含有Mg和Al中的至少一种的氧化物或碳酸盐)。
在陶瓷介电组合物中，基于100％原子百分比的基体材料粉末可包含0.1％至1.0％原子百分比的量的含有Mg和Al中的至少一种的氧化物或碳酸盐作为第二辅助成分。
第二辅助成分可用于降低使用陶瓷介电组合物的多层陶瓷电容器的烧结温度并提高多层陶瓷电容器的高温耐受电压特性。
当第二辅助成分的含量小于0.1％原子百分比时，抗还原性和可靠性会劣化。
当第二辅助成分的含量大于1.0％原子百分比时，会出现不良效果(例如，烧结温度升高、电容减小、老化率增大等)。
例如，根据本公开的示例性实施例的陶瓷介电组合物基于100％原子百分比的基体材料粉末还可包含0.1％至1.0％原子百分比的第二辅助成分，从而陶瓷介电组合物可在相对低的温度下进行烧结，并且获得优异的高温耐受电压特性。
d)第三辅助成分和第四辅助成分
根据本公开的示例性实施例，陶瓷介电组合物可包含含有铈(Ce)、铌 (Nb)、镧(La)和锑(Sb)中的至少一种的氧化物或碳酸盐作为第三辅助成分，并且陶瓷介电组合物还可包含含有硅(Si)、钡(Ba)、钙(Ca)和铝(Al)中的至少一种的氧化物或碳酸盐或者包含含有Si的玻璃复合物作为第四辅助成分。
第三辅助成分(含有铈(Ce)、铌(Nb)、镧(La)和锑(Sb)中的至少一种的氧化物或碳酸盐)可被添加到陶瓷介电组合物中，从而可提高抗还原性和可靠性。
第四辅助成分(含有Si、钡(Ba)、Ca和Al中的至少一种的氧化物或碳酸盐或者含有Si的玻璃复合物)可被添加到陶瓷介电组合物中，从而可降低烧结温度，并且可促进烧结。
图1是示出根据本公开的实施例和对比示例的介电常数随直流电压(V) 改变的曲线图。
参照图1，可理解的是，在使用本公开的实施例的陶瓷介电组合物的多层陶瓷电容器中，当施加DC电压，同时DC电压从0V增大到10V时，介电常数不变。
此外，可理解的是，在使用对比示例的已商业化的X5R介电材料的多层陶瓷电容器中，当施加DC电压时，随着DC电压从0V增大到10V，介电常数快速减小。
因此，使用根据本公开的示例性实施例的陶瓷介电材料的多层陶瓷电容器可具有优异的DC偏置特性。例如，当对其施加直流(DC)电场时，介电常数不变，因此电容不减小，从而可实现多层陶瓷电容器的高电容特性。
此外，由于DC偏置特性可以优异，室温介电常数可高于根据现有技术的顺电材料的室温介电常数，从而可将介电层设计为具有相对大的厚度，因此，ESD保护特性可以优异。
图2是根据本公开的示例性实施例的多层陶瓷电容器100的多层陶瓷电容器的示意性透视图，图3是沿着图2的A-A’线截取的示意性剖视图。
参照图2和图3，根据本公开的示例性实施例的多层陶瓷电容器100可包括陶瓷主体110，其中，介电层111以及第一内电极121和第二内电极122 交替地堆叠在陶瓷主体110中。分别电连接到与介电层111交替地设置在陶瓷主体110中的第一内电极121和第二内电极122的第一外电极131和第二外电极132可形成在陶瓷主体110的相背对的端部上。
陶瓷主体110的形状不受具体限制，但可以为长方体形状。此外，陶瓷主体110的尺寸不受具体限制，并且陶瓷主体可基于其用途而具有合适的尺寸。例如，陶瓷主体可具有(0.6～5.6mm)×(0.3～5.0mm)×(0.3～1.9mm) 的尺寸。
根据电容器的电容设计，可选择性地改变介电层111的厚度。根据本公开的示例性实施例，在烧结之后，单个介电层的厚度可以为例如0.2μm或更大。
在介电层具有相对小的厚度的情况下，存在于单个介电层中的对可靠性起负面影响的颗粒的数量相对少。因此，介电层的厚度可以为0.2μm或更大。
第一内电极121和第二内电极122可堆叠为使其端表面分别交替地暴露于陶瓷主体110的相背对的端表面。
第一外电极131和第二外电极132可形成在陶瓷主体110的相背对的端部上，并可分别电连接到交替地设置的第一内电极121和第二内电极122的暴露的端表面，从而构成电容器电路。
包含在第一内电极121和第二内电极122中的导电材料不受具体限制。然而，由于根据本公开的示例性实施例的介电层的材料可具有顺电材料和铁电材料彼此混合或固溶的形式，因此可使用贵金属。
用作导电金属的贵金属可以为钯(Pd)或钯(Pd)合金。
例如，钯(Pd)合金可以为钯(Pd)以及从锰(Mn)、铬(Cr)、钴(Co) 和铝(Al)中选择的至少一种的合金。钯(Pd)在合金中的含量可以为95％重量百分比或更多。
用作导电材料的贵金属还可以为银(Ag)或银(Ag)合金。
第一内电极121和第二内电极122的厚度可基于用途等适当地确定，而不受具体限制。例如，第一内电极121或第二内电极122的厚度可以为0.1 至5μm或0.1至2.5μm。
包含在第一外电极131和第二外电极132中的导电材料不受具体限制，但可使用镍(Ni)、铜(Cu)或它们的合金。
第一外电极131和第二外电极132的厚度可基于用途等适当地确定，而不受具体限制。例如，第一外电极131和第二外电极132中的每个的厚度可以为10至50μm。
陶瓷主体110的介电层111可包含根据本公开的示例性实施例的陶瓷介电组合物。
根据本公开的示例性实施例的陶瓷介电组合物可包含由 (Ca1-xSrx)(Zr1-yTiy)O3、Ca(Zr1-yTiy)O3、Sr(Zr1-yTiy)O3、(Ca1-xSrx)ZrO3和 (Ca1-xSrx)TiO3中的一种或更多种表示的基体材料粉末，其中，x和y分别满足 0≤x≤1.0和0.2≤y≤0.9。
由于根据本公开的另一示例性实施例的这种陶瓷介电组合物的特性与如上所述的根据本公开的示例性实施例的陶瓷介电组合物的特性相同，因此将省略其详细的描述。
根据本公开的另一示例性实施例的多层陶瓷电容器100可包括陶瓷主体 110，其中，介电层111以及第一内电极121和第二内电极122交替地堆叠在陶瓷主体110中。第一外电极131和第二外电极132可形成在陶瓷主体110 的相背对的端部上，并电连接到第一内电极121和第二内电极122。介电层111可包含陶瓷介电组合物，所述陶瓷介电组合物的室温介电常数为50或更大，并且当DC电场从0V/μm变化到5V/μm时，满足10％或更小的介电常数(εr)变化率。
根据本公开的另一示例性实施例，介电层111可包含室温介电常数为50 或更大并且当DC电场从0V/μm变化到5V/μm时满足介电常数(εr)变化率为10％或更小的陶瓷介电组合物，从而当施加直流(DC)电场时，由于介电常数不变，因此电容不会减小，从而可实现高电容特性。
此外，由于陶瓷介电组合物可具有优异的DC偏置特性，例如，当施加直流(DC)电场时，介电常数不变，因此电容不减小，可实现优异的ESD 保护特性等。
陶瓷介电组合物可包含由(Ca1-xSrx)(Zr1-yTiy)O3、Ca(Zr1-yTiy)O3、 Sr(Zr1-yTiy)O3、(Ca1-xSrx)ZrO3和(Ca1-xSrx)TiO3中的一种或更多种表示的基体材料粉末，其中，x和y分别满足0≤x≤1.0和0.2≤y≤0.9。
由于陶瓷介电组合物的其他特征与根据本公开的示例性实施例的多层陶瓷电容器和介电陶瓷电容器的特征相同，因此将省略其的描述。
在下文中，将通过本公开的实施例和对比示例更详细地描述本公开，以有助于对本公开的具体理解。因此，本公开的范围不受本实施限制。
(Ca,Sr)(Zr,Ti)O3(现有的C0G基顺电材料)用作基体材料主要成分。此外，为了实现相对高的介电常数，可按照下面表1示出的来调节Zr/Ti(B位点的固溶元素)的比值。
在这种情况下，为了抑制由于Ti含量增大导致烧结体减小，添加3％重量百分比的Mn-Zr-Si化合物、抗还原性添加剂作为辅助成分。
当制备浆料时，将氧化锆球用作混合/分散媒介，并且将基体材料主要成分和辅助成分粉末与乙醇/甲苯、分散剂和粘合剂混合，然后进行15小时的球磨。
在空气气氛的条件下，在1250℃的温度时对制备的浆料混合物进行焙烧，以合成(Ca,Sr)(Zr,Ti)O3相，并且为了使在焙烧过程中出现颈缩现象的焙烧粉末能够再次变为原始颗粒，另外地执行了湿磨。
然后，制造用于确认材料的基本特性的块状样品，并且制造用于确认ESD 特性是否实际上被提高的试验样品并对其进行评估。如下为试验方法和结果。
块状样品的制造
为了制造块状样品，采用小的刮刀方式的涂布机和制备的浆料制造具有 10至15μm的厚度的片，并进行堆叠，从而在对堆叠的片进行压制之后，生的样品具有大约0.8mm的厚度，接下来进行切割，从而形成具有1.0cm×1.0 cm(宽×长)的尺寸的块状样品。
在空气气氛下，在400℃时对制造的块状样品进行焙烧，并且在0.5％H2气氛下，在1230℃时对其进行烧结，测量块状样品的电容(TCC)的电特性、绝缘电阻、温度系数等。
使用LCR测试仪在1kHz和AC 1V下测量电容器(应用了块状样品) 的室温电容和介电损失，在取了10个样品并分别对10个样品施加DC电压的状态下在60秒之后测量室温绝缘电阻。
在1kHz和AC 1V的条件下，在-55至125℃的温度范围内测量电容(TCC) 的温度系数。
【表1】
Figure BDA0002414685420000101
*：对比示例
【表2】
Figure BDA0002414685420000102
Figure BDA0002414685420000111
*：对比示例
参照表1和表2，可以理解的是，在Ti的含量y为0.1的样品1(对比示例)的情况下，含量y脱离了本公开的数值范围，从而介电常数值相对低。
此外，可以理解的是，在基体材料粉末的主要成分的摩尔量满足本公开的数值范围的样品2至10(本公开的实施例)的情况下，室温介电常数比根据相关技术的顺电材料的室温介电常数高至少4倍，并且绝缘电阻和TCC特性也优异。
同时，可以理解的是，在样品4的情况下，满足如下所述的介电常数、 TCC特性和ESD保护特性，但是绝缘电阻相对低。
因此，在基体材料粉末由本公开的实施例中的(Ca1-xSrx)(Zr1-yTiy)O3、 Ca(Zr1- yTiy)O3、Sr(Zr1-yTiy)O3、(Ca1-xSrx)ZrO3和(Ca1-xSrx)TiO3中的一种或更多中表示的情况下，x和y可具有不同的值。
试验样品的制造以及ESD特性的确认
使用通过基于基体材料的组成对10个块状样品的介电特性进行确认而选择的样品7至10的陶瓷介电组合物来制造具有1608标准尺寸和4.7nF的电容的用于ESD保护的电容器。
当制备浆料时，使用0.8mm的氧化锆球作为混合/分散媒介将基体材料粉末和辅助成分粉末彼此混合，并且使用如上所述制备的浆料和滚降式(off-roll type)涂布机来制造具有15μm的厚度的片。
在片上印刷Ni内电极，并且对其上印刷有Ni内电极的70个有源片进行堆叠，同时对其进行压制，从而制造条。
利用切割机将压制的条切割为具有1608标准尺寸(1.6mm×0.8mm)的电子组件。
在对制造的电子组件(具有1608标准尺寸)进行焙烧以及在1190至 1230℃时对其进行烧结达1小时(0.1％的H2/99.9％的N2、H2O/H2/N2气氛) 之后，完成烧结的电子组件，从而完成用于ESD保护的电容器。然后，测量完成的电容器的电特性。
通过与块状样品的测量方法相同的方法来测量基本电特性，并且为了测量ESD保护特性，在释放ESD电压的放电枪和各个样品彼此连接并接地的状态下，施加20kV、22kV或25kV的显著高的电压，测量IR，从而判断电容器是否通过测试。
下面的表3总结了本公开的实施例和对比示例的评估结果。
【表3】
Figure BDA0002414685420000121
在对比示例(X7R顺电材料)的情况下，使用现有的介电组合物，即使在介电层的厚度为70μm左右的情况下，例如，介电层被设计为具有相对厚的厚度，在ESD测试的高电场环境下，有效电容也快速地减小。因此，在这种情况下，难以满足在22kV或更大的测试条件下的ESD保护特性。
此外，在使用现有的顺电材料(具有相对低的介电常数)的情况下，DC 偏置特性优异，但是介电常数很低，从而为了满足电容器的电容，介电层应变薄，因此，耐受电压特性劣化。因此，在这种情况下，电容器未通过ESD 测试的评估标准。
如上所述，根据本公开的示例性实施例，陶瓷介电组合物在实现相对高电容的同时，可具有相对高的室温介电常数、优异的ESD保护特性并确保耐受电压特性。
此外，由于使用根据本公开的示例性实施例的陶瓷介电组合物的多层陶瓷电容器可具有优异的DC偏置特性，例如，当施加直流(DC)电场时，介电常数不变，因此电容不下降，可实现高电容特性、优异的ESD保护特性等。
虽然上面示出并描述了示例性实施例，但是对本领域的技术人员将明显的是，在不脱离由权利 要求限定的本发明的范围的情况下，可以做出修改和改变。

Claims (8)

1.一种陶瓷介电组合物，包括由(Ca1-xSrx)(Zr1-yTiy)O3表示的基体材料粉末，其中，x和y分别满足0≤x≤1.0和0.2≤y≤0.9，x和y具有不同的值，
其中，所述陶瓷介电组合物基于100％原子百分比的基体材料粉末还包括0.1％至1.0％原子百分比的第一辅助成分，其中，第一辅助成分为含有铁、镍、钴、铜和锌中的至少一种的氧化物或碳酸盐，
所述陶瓷介电组合物基于100％原子百分比的基体材料粉末还包括0.1％至1.0％原子百分比的第二辅助成分，其中，所述第二辅助成分为包含镁和铝中的至少一种的氧化物或碳酸盐，
所述陶瓷介电组合物还包括第三辅助成分和不同于所述第二辅助成分的第四辅助成分，所述第三辅助成分为包含铈、铌、镧和锑中的至少一种的氧化物或碳酸盐，所述第四辅助成分为包含硅、钡、钙和铝中的至少一种的氧化物或碳酸盐，或者为包含硅的玻璃复合物，并且
所述陶瓷介电组合物还包括Mn-Zr-Si化合物。
2.如权利要求1所述的陶瓷介电组合物，其中，x满足0.4≤x≤0.5。
3.如权利要求1所述的陶瓷介电组合物，其中，y满足0.3≤y≤0.5。
4.如权利要求1所述的陶瓷介电组合物，其中，陶瓷介电组合物的室温介电常数为50或更大。
5.一种多层陶瓷电容器，包括：
陶瓷主体，介电层以及第一内电极和第二内电极交替地堆叠在陶瓷主体中；
第一外电极和第二外电极，形成在陶瓷主体的相背对的端部上并电连接到第一内电极和第二内电极，
其中，介电层包含含有由(Ca1-xSrx)(Zr1-yTiy)O3表示的基体材料的陶瓷介电组合物，其中，x和y分别满足0≤x≤1.0和0.2≤y≤0.9，x和y具有不同的值，
其中，所述陶瓷介电组合物基于100％原子百分比的基体材料还包括0.1％至1.0％原子百分比的第一辅助成分，其中，第一辅助成分为含有铁、镍、钴、铜和锌中的至少一种的氧化物或碳酸盐，
所述陶瓷介电组合物基于100％原子百分比的基体材料还包括0.1％至1.0％原子百分比的第二辅助成分，其中，所述第二辅助成分为包含镁和铝中的至少一种的氧化物或碳酸盐，
所述陶瓷介电组合物还包括第三辅助成分和不同于所述第二辅助成分的第四辅助成分，所述第三辅助成分为包含铈、铌、镧和锑中的至少一种的氧化物或碳酸盐，所述第四辅助成分为包含硅、钡、钙和铝中的至少一种的氧化物或碳酸盐，或者为包含硅的玻璃复合物，并且
所述陶瓷介电组合物还包括Mn-Zr-Si化合物。
6.如权利要求5所述的多层陶瓷电容器，其中，x满足0.4≤x≤0.5。
7.如权利要求5所述的多层陶瓷电容器，其中，y满足0.3≤y≤0.5。
8.如权利要求5所述的多层陶瓷电容器，其中，陶瓷介电组合物的室温介电常数为50或更大。
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