CN109994447B - 半导体模块 - Google Patents
半导体模块 Download PDFInfo
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Abstract
本发明得到能够兼顾模块小型化和端子的耐折裂度的提高的半导体模块。半导体芯片(1、2、3)通过封装件(4)而封装。多个端子(8、10、12)与半导体芯片(1、2、3)连接,从封装件(4)凸出。多个端子(8、10、12)具有以第1间距彼此并排配置的多个第1端子(12)以及以比第1间距宽的第2间距彼此并排配置的多个第2端子(8、10)。各端子(8、10、12)具有根部(13)、比根部(13)细的前端部(14)以及将根部(13)与前端部(14)进行连接的连接部(15)。多个第1端子(12)的连接部(15)为直角。多个第2端子(8、10)的连接部(15)为圆弧状。
Description
技术领域
本发明涉及能够兼顾模块小型化和端子的耐折裂度的提高的半导体模块。
背景技术
就使用了引线框的半导体模块而言,为了确保向基板的插入性等,端子的前端部比根部细。在窄的前端部与宽的根部的边界部由于模块自身以及散热鳍片等的重量而在振动时反复施加应力,因此,存在端子易于折裂的问题。对此,提出了为了使端子的耐折裂度提高而将前端部与根部的边界部设为圆弧状(例如,参照专利文献1的图3、图4)。
专利文献1:日本实开昭50-61770号公报
就作为端子而具有控制端子和功率端子的功率模块而言,两端子的数量、间距、宽度等是不对称、不均等的。因此,如果将全部的端子的边界部设为圆弧状,则即使是间距短的控制端子,为了确保端子间绝缘距离也不得不加宽间距。其结果,存在阻碍模块的小型化的问题。
发明内容
本发明就是为了解决上述课题而提出的,其目的在于得到能够兼顾模块小型化和端子的耐折裂度的提高的半导体模块。
本发明涉及的半导体模块,其特征在于,具有:半导体芯片;封装件,其封装所述半导体芯片;以及多个端子,它们与所述半导体芯片连接,从所述封装件凸出,所述多个端子具有以第1间距彼此并排配置的多个第1端子以及以比所述第1间距宽的第2间距彼此并排配置的多个第2端子,各端子具有根部、比所述根部细的前端部以及将所述根部与所述前端部进行连接的连接部,所述多个第1端子的所述连接部为直角,所述多个第2端子的所述连接部为圆弧状。
发明的效果
在本发明中,间距窄的多个第1端子的连接部为直角,间距宽的多个第2端子的连接部为圆弧状。由此,能够兼顾模块小型化和端子的耐折裂度的提高。
附图说明
图1是表示实施方式涉及的半导体模块的俯视图。
图2是表示实施方式涉及的半导体模块的内部构造的俯视图。
图3是表示实施方式涉及的半导体模块的侧视图。
图4是将功率端子放大后的图。
图5是表示对振动重复次数与施加于功率端子的连接部的应力的关系进行模拟得到的结果的图。
图6是表示在功率端子的连接部形成圆弧的冲裁工序的图。
图7是表示在功率端子的连接部形成圆弧的冲裁工序的图。
图8是表示实施方式涉及的逆变器系统的侧视图。
标号的说明
1、2、3半导体芯片,4封装件,8、10功率端子(第2端子),12控制端子(第1端子),13根部,14前端部,15连接部,16散热鳍片,17基板。
具体实施方式
图1是表示实施方式涉及的半导体模块的俯视图。图2是表示实施方式涉及的半导体模块的内部构造的俯视图。半导体芯片1、2、3通过模塑树脂等封装件4而封装。半导体芯片1是IGBT或者MOSFET等晶体管。半导体芯片2是二极管。半导体芯片3是对半导体芯片1进行控制的控制芯片。
半导体芯片1、2安装于引线框5之上,两者的下表面电极通过引线框5而彼此连接。半导体芯片1、2的上表面电极通过导线6而彼此连接。半导体芯片3与半导体芯片1的控制电极通过导线7而连接。引线框5与功率端子8连接。半导体芯片2的上表面电极通过导线9而与功率端子10连接。半导体芯片3通过导线11而与控制端子12连接。这样,功率端子8、10以及控制端子12与半导体芯片1、2、3连接,从封装件4凸出。
控制端子12以1.778mm或者3.556mm的间距彼此并排配置。功率端子8、10以比控制端子12的间距宽的5.08mm的间距彼此并排配置。
图3是表示实施方式涉及的半导体模块的侧视图。功率端子8、10以及控制端子12各自具有从封装件4凸出的根部13、比根部13细的前端部14以及将根部13与前端部14进行连接的连接部15。就控制端子12而言,间距窄、端子数量也多,在产生振动时施加于每个端子的应力小,因此基本未发现折裂的产生。因此,就控制端子12而言,将连接部15设为直角而优先考虑端子间距的最小化。另一方面,施加高电压的功率端子8、10为了确保绝缘距离而加宽间距。因此,就功率端子8、10而言,施加于每个端子的应力大,易于产生折裂。因此,就功率端子8、10而言,将连接部15设为圆弧状。其结果,能够兼顾模块小型化和端子的耐折裂度的提高。
图4是将功率端子放大后的图。功率端子8、10的连接部15的圆弧的半径r越小,由振动等引起的应力越向角部集中,因此优选r较大。但是,存在如果r的大小超过某个定值,则应力集中的缓和效果饱和的倾向。因此,优选圆弧的半径r与功率端子8、10的前端部14的宽度L之间的关系为r/L≥1/3。
图5是表示对振动重复次数与施加于功率端子的连接部的应力的关系进行模拟得到的结果的图。可知,为了使在针对半导体模块所设想的最大的振动重复次数N时施加于功率端子8、10的连接部15的应力小于疲劳极限,需要设为r/L≥1/3。
图6以及图7是表示在功率端子的连接部形成圆弧的冲裁工序的图。图6是功率端子的连接部的圆弧的角度θ大于或等于90°的情况,图7是θ小于90°的情况。通过由2个冲头A、B进行的冲裁工序而在功率端子8、10的连接部15形成圆弧。但是,如图中的虚线所示,由于冲头的磨损而在加工面产生偏离。如果在θ小于90°的情况下在加工面产生偏离,则在连接部15的凸起部产生金属毛刺,有可能导致端子间绝缘距离不足或者端子间短路。另一方面,在θ大于或等于90°的情况下,即使冲头的位置稍微变动也不会产生毛刺。因此,对于功率端子8、10的连接部15,优选圆弧的角度θ大于或等于90°。
图8是表示实施方式涉及的逆变器系统的侧视图。散热鳍片16被安装在封装件4的下表面。通过使端子8、10、12的细的前端部14贯穿基板17,从而将基板17安装至多个端子8、10、12。散热鳍片16对半导体芯片1、2、3所产生的热进行散热,基板17对半导体芯片1、2、3进行控制。在本实施方式中,通过提高功率端子8、10相对于散热鳍片16和基板17的重量的耐折裂度而提高逆变器系统的机械可靠性。
此外,半导体芯片1、2不限于由硅形成,也可以由与硅相比带隙更大的宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或者金刚石。就由这样的宽带隙半导体形成的半导体芯片而言,由于耐电压性、容许电流密度高,因此能够小型化。通过使用该实现了小型化的半导体芯片,从而能够使组装有该半导体芯片的半导体模块也小型化、高集成化。另外,由于半导体芯片的耐热性高,因此能够使散热器的散热鳍片小型化,能够将水冷部空冷化,因此能够进一步将半导体模块小型化。另外,由于半导体芯片的电力损耗低且高效,因此能够使半导体模块高效化。
Claims (7)
1.一种半导体模块,其特征在于,具有:
半导体芯片;
封装件,其封装所述半导体芯片;以及
多个端子,它们与所述半导体芯片连接,从所述封装件凸出,
所述多个端子具有以第1间距彼此并排配置的多个第1端子以及以比所述第1间距宽的第2间距彼此并排配置的多个第2端子,
各端子具有根部、比所述根部细的前端部以及将所述根部与所述前端部进行连接的连接部,
所述多个第1端子的所述连接部为直角,
所述多个第2端子的所述连接部为圆弧状。
2.根据权利要求1所述的半导体模块,其特征在于,
所述第2端子的所述连接部的圆弧的半径r与所述第2端子的所述前端部的宽度L之间的关系为r/L≥1/3。
3.根据权利要求1所述的半导体模块,其特征在于,
所述第2端子的所述连接部的圆弧的角度大于或等于90°。
4.根据权利要求2所述的半导体模块,其特征在于,
所述第2端子的所述连接部的圆弧的角度大于或等于90°。
5.根据权利要求1至4中任一项所述的半导体模块,其特征在于,
还具有安装于所述封装件的散热鳍片以及安装于所述多个端子的基板。
6.根据权利要求1至4中任一项所述的半导体模块,其特征在所述半导体芯片由宽带隙半导体形成。
7.根据权利要求5所述的半导体模块,其特征在于,
所述半导体芯片由宽带隙半导体形成。
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5061770U (zh) * | 1973-10-05 | 1975-06-06 | ||
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JP2015090960A (ja) * | 2013-11-07 | 2015-05-11 | 株式会社デンソー | 半導体パッケージ |
CN105470227A (zh) * | 2014-09-29 | 2016-04-06 | 瑞萨电子株式会社 | 半导体器件 |
CN106298553A (zh) * | 2015-06-11 | 2017-01-04 | 台达电子企业管理(上海)有限公司 | 封装模组及其制作方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JPS5061770U (zh) * | 1973-10-05 | 1975-06-06 | ||
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