CN1098617C - 电路基板上安装带粘接剂的电子元器件的方法 - Google Patents

电路基板上安装带粘接剂的电子元器件的方法 Download PDF

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CN1098617C
CN1098617C CN97117465A CN97117465A CN1098617C CN 1098617 C CN1098617 C CN 1098617C CN 97117465 A CN97117465 A CN 97117465A CN 97117465 A CN97117465 A CN 97117465A CN 1098617 C CN1098617 C CN 1098617C
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chip
electrode
bonding agent
electronic devices
components
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CN1174490A (zh
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塚越功
小林宏治
松田和也
福岛直树
小出遵一
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Showa Denko Materials Co ltd
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Hitachi Chemical Co Ltd
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Abstract

本发明揭示一种将电子元器件S(1)安装在电路基板上的方法，包括：在各电子元器件电极形成的电极形成面上形成与电极形成面面积大致相同面积的薄膜状热硬化性粘接剂层(4)、得到带粘接剂的电子元器件的粘接剂层形成工序；将形成了粘接剂层的电极与基板电极相对进行定位的定位工序；及电极定位后将电子元器件的电极与基板电极相互加热压接固定的热压工序。

Description

电路基板上安装带粘接剂的电子元器件的方法
本发明涉及电路基板上安装多种电子元器件的方法及适用于该方法的带粘接剂的电子元器件的制造方法。
随着半导体芯片等电子元器件(在本说明书中，“电子元器件”包含安装在电路基板上的电阻、电容及半导体芯片等)的小型化及薄型化，采用这些元器件的电路及电极等呈高密度化及高精密化。这样微细电极的连接，由于很难采用焊接的方法连接，因此最近采用粘接剂的方法逐渐多起来。其中，有在粘接剂中掺有导电粒子进行压接、在粘接剂厚度方向形成电气连接的方法(例如日本特开昭55-104007号公报)，还有不用导电粒子在连接时进行压接、利用电极表面微细凹凸的直接接触形成电气连接的方法(例如日本特开昭60-262430号公报)。
采用这些粘接剂的连接方式，能够在较低温度下进行连接，连接部分具有柔性，因此可靠性高，加之在使用薄膜状或带状粘接剂时，能够供给一定厚度的长条状，所以可实现安装生产线的自动化，或者通过加热加压这样简单的工序将半导体芯片与基板电极加以电气连接，可以同时得到两者的粘接及机械固定，因此正受到关注。
近来年，通过发展上述方式，将多个芯片种类高密度安装在比较小形基板上的多芯片组件(MCM：Multi Chip Module)更受到注意。这种情况下的问题在于，一般首先在基板上形成粘接剂层，在有分离层(Separator)时然后将其剥离，接着将基板电极与芯片电极对准安放，然后定位粘接，而这种方法在芯片侧形成粘接剂层，这就必须在比基板小的芯片面积上形成，因此有装置复杂的问题。
另外，MCM使用的电子元器件芯片有半导体芯片、有源元件、无源元件、电阻、电容等许多种类(以下称为芯片类)。
这样，MCM使用的芯片类的种类很多，与此相应芯片的尺寸(面积、高度)也有许多种。因此与基板连接时，在基板上粘接剂层的形成方法及与基板的热压粘接方法等方面产生了过去没有的问题。
也就是说，粘接剂为薄膜状时，粘接剂的宽度(带宽)必须因每一种芯片尺寸而异。但是，由于MCM在小型基板上高密度安装了多种芯片类元器件，因此安装时的空间很小，难以采用多种带宽。另外，带宽的品种很多，材料管理就非常麻烦，安装设备也由于每一种带宽必须要各自的驱动、压接、卷绕等装置而变得规模庞大，产生导致设备占用空间大、价格高等缺点。
为此，虽然也尝试在基板全部表面形成粘接剂层后安装各种尺寸的芯片(日本特公昭61-27902号公报)，但是其缺点是，非连接部分剩余粘接剂的去除处理很麻烦，另外在安装部分以外多用了粘接剂层，导致成本上升。再有，因为在基板全部表面形成粘接剂，因此连接时热量影响相邻的芯片安装部分，例如促进热固性粘接剂的反应，使相邻部分的粘接剂在芯片安装前已变得不能使用，或者芯片安装后也会因连接温度导致粘接剂软化，容易使相邻芯片连接不良。还有，在芯片安装后去除不好的芯片时，也由于热固性粘接剂的反应，很难拆下不好的芯片，粘接剂的去除也困难。
另一方面，还尝试形成与芯片大致相同大小的粘接剂层，这是在圆片(Wafer)状态形成粘接剂层再一起切割，例如日本特公平4-30742号公报所示，但对于每一种芯片要准备多种不同种类的带粘接剂的基片，这样粘接剂的保存有一定寿命，有工艺管理复杂等缺点。
另外，还尝试仅仅在芯片突起电极(也叫做Bump)的顶点端部形成粘接剂，将能够连接的间距加大，这种方法如日本特开昭63-276237号公报及日本特开平2-199847号公报等所示。这些都是仅仅在突起的顶点形成粘接剂，与基板的粘接面积仅仅是突起电极的附近，粘接力较弱，连接可靠性也不高。解决的方法是在突起电极顶点以外形成粘接剂，为此另外必须采用注入填充材料等手段，因此工序增加，成本提高。
另外，当芯片高度不一样时，或基板双面安装时，用过去一般进行的将平行设置的金属模具压紧的压接法平行设置的压辊法等，不能均匀进行加热加压，不能用于微细电极的连接。
本发明鉴于上述缺点，提出能在电路基板上高效安装电子元器件的方法及适用于该安装方法的带粘接剂的电子元器件群和带粘接剂的电子元器件的制造方法。
本发明为将多种电子元器件的电极粘接固定在电路基板上、电气连接并保持各电子元器件的电子元器件安装在电路基板上的方法，包括：将多种电子元器件的电极粘接固定在电路基板上、电气连接并保持各电子元器件，所述方法包括下述工序：
在所述各电子元器件电极形成的电极形成面上，形成与该电极形成面的面积大致相同面积的薄膜状热固性粘接剂层，从而得到带粘接剂电极的粘接剂层形成工序；
将形成了粘接剂层的电极与基板电极对准安放并定位的定位工序；
增加粘接剂的凝聚力达到能够保持接触状态程度的暂时固定工序；
对暂时固定的电极之间进行热压的热压工序；及
在增加粘接剂的凝聚力达到能够保持连接状态程度的状态下，检查电子元器件的电极与基板电极之间的电气连接的检查工序。
采用该本发明，由于在电子元器件的电极形成面预先形成粘接剂层，并将生成了粘接剂的电极形成面与基板电极粘接，因此基本上没有从电极形成面挤出来的多余的粘接剂。所以在将电子元器件安装在电路基板上时，没有必须进行象以往那样产生的多余粘接剂的去除处理，因而能提高效率，同时能降低成本。
另外，在将电极与基板粘接时，是将电极定位之后进行加热压接，因此能够根据需要进行位置修正，所以能够可靠地进行定位。而且，即使在安装高度或尺寸等不同的电子元器件时，由于对每一个电子元器件的电极进行加热压接固定，因此能够对各电极均匀进行加热加压，能够可靠而且方便地安装各电子元器件。特别是能够连接微细的电极。
前述薄膜状粘接剂的面积，相对于电子元器件的电极形成面面积，最好在正负30％以内。这是因为，若大于30％，则从电极形成面挤出来的粘接剂过多，常常必须要有粘接剂的去除工序；若小于30％，则有可能不能可靠地粘接。
前述电子元器件，最好利用吸附等方法分别保持在加热头上，并利用加热头对电子元器件的端面进行加热。由于加热头在保持着电子元器件状态不变下定位在规定的位置，并能在保持原样不动情况下加热粘接固定，因此能够简化装置及工序。
在前述热压工序中，最好在增加粘接剂的凝聚力达到够保持连接状态程度的状态下，具有检查电极间电气连接的检查工序。也就是说，增加凝聚力处于暂时固定状态下进行电气连接的检查，若有异常，由于是暂时固定状态，就能够很容易进行返修。
图1A及图1B表示说明本发明安装方法工序的剖视示意图。
图2A、图2B及图2C表示本发明粘接剂的宽度及芯片的排列举例的平面图。
图3表示本发明其他实施例的剖视示意图。
图4表示本发明其他实施例的剖视示意图。
图5A至图5D表示本发明带粘接剂芯片的构成的剖视示意图。
图6A、图6B及图6C表示本发明带粘接剂芯片的各种状态的剖视示意图。
图7A及图7B表示本发明带粘接剂芯片群的结构的剖视示意图。
图8表示本发明的安装带粘接剂芯片的MCM立体图。
下面一面参照实施例所示的附图一面说明本发明。
图1为说明本发明的一种实施例的剖视示意图。图1A为有关本发明安装方法所采用的热压装置的一部分，例如在通过吸附等能够固定住芯片1的加热头2及平台3之间放有由粘接剂层4及分离层5构成的粘接带6。这种情况下，粘接剂层4与电子元器件的芯片1(半导体芯片)的电极形成面相对放置。这里，电子元器件不限于半导体芯片，也可以是有源元件、无源元件、电阻、电容等。
粘接带6通过吸附等紧贴于平台3，或者也可以在利用平台3的前后辊筒(图中未画出)施加张力的状态下移动。另外，粘接剂层4能够从分离层5上剥离，由于分离层5紧贴住或因张力而固定，因此更容易剥离。
通过在加热头2与平台3之间加压，使半导体芯片1的电极形成面与比其要大的粘接剂4接触。粘接剂层4的大小按照MCM使用的多种芯片中最大芯片的尺寸选择，这样也能够适用于其他芯片，另外从便于操作来看也希望如此。这时最好选择芯片的长×宽的较小尺寸，因为如果这样能够减小带宽，而且能够减小装置的占地空间。
粘接剂层4的宽度(一般为带宽)可以如图2A那样与芯片尺寸有几乎同样大小，也可以如图2B那样比芯片尺寸大一些，或者也可以如图2C那样排成2排以上，这些根据操作性及批量大小等考虑选择。
在图1A中，由于加热头2加热至规定温度，因此从芯片1的电极形成面的背面直接加热，沿芯片大小的粘接剂层区域部分优先被加热。在该加热时，芯片1周围的粘接剂因为散热少，仅仅是导热性差的粘接剂，因此几乎不加热，维持薄膜状，而与芯片1紧贴的粘接剂层4因加热而呈低粘度化，或者因粘接性增强与转而与芯片1粘接构成一体，薄膜强度提高。因此，形成沿芯片1大小的粘接剂层4凝聚力下降线10。
这种情况下加热头2的加热温度最好是处于粘接剂层4软化流动(比较理想的标准是粘度在1000泊以下，最理想为100～10泊)、而且粘接剂的硬化反应刚要开始的低位状态(标准为反应率20％以下)，根据使用的粘接剂系适当选定，加热头2的加热温度在后述的潜在性硬化剂活性温度以下进行，能提高带粘接剂芯片的保存性，因此就更理想了。
图1B表示将加热头2从平台3离开时的示意图。由于沿芯片1大小的粘接剂凝聚力下降线的作用能将与芯片1大致相同大小的粘接剂层4转而与芯片1粘接。平台3上的粘接剂层4形成挖去了与转而与芯片1粘接的粘接剂层4的形状，利用剩下的粘接剂层4及分离层5等仍保持薄膜形状，然后通过去除或移动将新的粘接面放在平台3上。
在图1A及图1B的情况下，由于将粘接剂层4从分离层5剥离而得到带粘接剂的芯片，因此，能够直接与基板连接，形成连续的MCM生产。保存时，也可以在粘接剂面上重新形成分离层。在图1A及图1B中，若通过暂时连接等方式预先将各种芯片置于带上，则作为带粘接剂的芯片从带上剥离芯片时也是适合的。这种情况下，因为能够按照顺序连续供给带粘接剂的各种芯片，因此对于提高生产率是有效的。
图3表示本发明其他得到粘接剂芯片的一种实施例的剖视示意图。图3所示为压接装置的一部分，在通过吸附等使芯片1固定的加压头8与平台3之间放有由粘接剂层4及分离层5构成的粘接带6。这里，粘接带6通过吸附等紧贴于平台3，或者也可以在利用平台3的前后辊筒(图中未画出)施加张力的状态下移动。
加压头8上装有切割刀具7(jig)，切割刀具7沿芯片1大小的周围形成刀刃，当带宽与芯片尺寸大致相同时，刀刃只有2边也行。利用切割刀具将粘接剂层4至少厚度方向的一部分或全部切断，将与芯片1大致相同大小的粘接剂层4粘附在芯片1上。这种情况下，加压头8也可以处于不加热的状态，在不加热情况下，因为可以进行室温作业，所以能够防止因热量而导致粘接剂失效。作为切割刀具7，可以采用金属或陶瓷等刀具，或采用热、紫外线、激光等能量线。
在切割刀具7是刀刃通过加压切断时，切割刀具7的高度，也就是说与芯片1接触面的距离要根据粘接剂层4或者分离层5的切口深度来考虑决定，但最好将粘接剂层4完全切断，因为这样容易将带粘接剂的芯片与粘接剂层4分开。这种情况下，将切割切具7能够收缩在加压头8中、作为上下可动的机构，这样就提高了连续生产率。
在图1A、图1B及图3中，最好如图4那样在平台3与分离带5之间放入橡胶等缓冲层11，这样容易得到沿芯片尺寸的轮廓大小的带粘接剂的芯片。
根据上述所得到的带粘接剂的芯片的种种形态，利用图5A至图5D及图6A及图6C加以说明。无论哪一种形态，与芯片1有大致相同面积的薄膜状粘接剂都覆盖了电极形成面，在芯片电极面的整个面上都有。
图5A为带粘接剂的芯片的基本构成，半导体芯片1与粘接剂层4实际上是同样大小。图5B及图5C的粘接剂4与半导体芯片1相比大小略有不一样，这种情况有利于与基板连接后最佳粘接剂量的调节。大小范围在芯片尺寸±30％左右，从带粘接剂的芯片的形状稳定性来看比较理想，但最好是同样大小。在本发明中，包括上述5A～图5C所示，表现出来与半导体芯片有大致相同的大小。图5D为在粘接剂层4上形成分离层5的情况，对于保存时防止灰尘等附着在粘接剂表面上这一点是比较理想的。
图6A及图6B表示有突起极电12的芯片的情况，图6C为没有突起电极、但有布线层13的情况的芯片。另外，图6A及图6B为粘接剂中含有导电粒子14的情况，图6C为不含导电粒子的情况。图6A～图6C的这些突起电极及导电粒子的有无情况可以互相交替组合。
图7A表示带粘接剂的芯片群，与芯片有大致相同大小的薄膜状粘接剂覆盖了芯片电极形成面的全部而形成若干个独立的带粘接剂的芯片，然后在分离带上形成带粘接剂的芯片群，也可以呈连续带状卷绕起来。
另外，也可以如图7B那样，粘接剂层4沿芯片大小的形状独立形成在分离带5上。这种情况下，例如预先按基板上安放各种芯片的次序依次在分离带上形成，这样因为能够连续供给带粘接剂的芯片，因此对于提高生产率是有效的。
以上所述构成的带粘接剂的芯片，对于单芯片的安装也能够适用，但下面说明的是利用该方法的多芯片安装方法。
首先，将应该连接的带粘接剂芯片电极与基板电极用显微镜或图像存储装置进行定位。这时同时使用定位标记也是有效的。接着，在应该连接的电极间加热加压，对同一个基板得到若干个芯片的导电连接。作为加热加压的条件，也可以一个一个芯片进行，但若能够同时压接若干个，则对于提高生产率是有效的。
作为加热加压的方法，除了采用通常的压机以外，也可以采用高压釜等静压的方法，特别在芯片的厚度及大小等不一样的情况下，作为均匀的加热加压方法是有效的。所谓本发明中所说的静压，是指在物体的外表面垂直作用一定压力的状态。这里一般芯片面积为2～20mm见方，与此相比连接部分的厚度为1mm以下，多数为0.1mm以下，则芯片面积相当大，就能获得电极连接方向的压力。
在加热加压时，也可以进行在应该连接的电极之间的导通检查。由于可以在粘接剂未硬化或硬化反应不充分的状态下进行导通检查，因此很容易进行返修作业。这时最好在粘接剂的反应率为30％左右以下进行检查，这样比较容易兼顾到利用溶剂进行返修作业。另外，当粘接剂的反应未满10％时，由于电极未完全固定，因此最好同时进行加压。
通过上述操作，在基板上安装了芯片的电路基板9如图8所示，能够得到利用粘接剂层4将多个各种形状及尺寸的芯片类元器件1高密度安装在比较小形的基板9上的多芯片组件(MCM)。作为能够适用于本发明的基板9，例如可以有聚酰亚胺或聚酯等塑料薄膜、玻璃纤维及环氧等的复合体、硅等半导体或玻璃、陶瓷等无机物基板等。
本发明所用的粘接剂层4，热可塑料材料或利用热或光而硬化的材料都能适用。其中最好采用硬化性材料，因为连接后的耐热性及耐湿性好。其中含有潜在性硬化剂的环氧系粘接剂及含过氧化物等自由基系硬化剂的丙烯系粘接剂，由于能够短时间硬化，连接操作性好，分子构造上粘接性强，因此是特别理想的。潜在性硬化剂，其因加热或压力而产生反应开始的活性点比较明显，对于具有加热或压力工序的本发明是较理想的。
作为潜在性硬化剂，有咪唑系、酰肼系、三氟化硼-胺配合物、氨基亚胺、多胺盐、盐、双氰胺等以及它们的变性物，这些可以单独使用或2种以上的混合物使用。
这些是阴离子或阳离子聚合型等所谓离子聚合性的触媒型硬化剂，由于容易获得快速硬化性及可以很少考虑化学当量的问题，因此比较理想。在它们当中，由于咪唑系是非金属系，不容易发生电腐蚀，另外从反应性及连接可靠性考虑，是特别理想的。作为硬化剂，其他还可以采用聚胺类、聚硫醇、多酚、酸酐等，也可以与前述触媒型硬化剂同时并用。另外，以硬化剂为核心、其表面用高分子物质或无机物覆盖而成的微胶囊型硬化剂，由于它兼顾了长期保存性及快速硬化性这一对矛盾的特性，因此比较理想。
本发明所用的粘接剂的硬化剂活性温度，最好为40～200℃。这是因为，若不到40℃，则与室温的温差较小，必须在低温下保存；若超过200℃，则连接时对其他构件将产生热影响，根据上述理由，50～150℃就更为理想。本发明中所说的活性温度是用DSC(差示扫描热量计)、将环氧树脂及硬化剂的掺合物作为试样、用10℃/分从室温升温时的发热峰值温度来表示。若活性温度处于低温侧，则出现反应性好而保存性下降的趋势，因此考虑这些因素决定。在本发明中，通过硬化剂活性温度以下的热处理提高带粘接剂的芯片的保存性，在活性温度以上能够得到较好的多芯片连接。因而最好在硬化剂的活性温度以下调节熔融粘度以形成凝聚力下降线。
在这些粘接剂层4中最好添加导电粒子14或少量的绝缘粒子(图中未画出)，因为它作为带粘接剂的芯片在制造时加热加压条件下的厚度保持材料起作用。这时，导电粒子或绝缘粒子的比例为体积的0.1～30％左右，对于各向导电异性为体积的0.5～15％。粘接剂层4也可以采用分隔形成绝缘层及导电层的多层结构。这种情况下，由于提高了分辨率，因此能够完成高密度的电极连接。
作为导电粒子14，有Au、Ag、Pt、Co、Ni、Cu、W、Sb、Sn、焊锡等金属粒子或碳、石墨等，另外可以将这些导电粒子作为核心材料，或者在由非导电性的玻璃、陶瓷、塑料等高分子等构成的核心材料上覆盖前述那样的材料构成的导电层而形成。特别是用绝缘层覆盖导电材料而形成的绝缘覆盖粒子，或者同时并用导电粒子及玻璃、陶瓷、塑料等绝缘粒子，由于也能提高分辨率，因此可以适用。
为了确保在微小的电极上有1个以上、最好有尽可能多的粒子数，小直径的粒子比较适合，导电粒子14的直径在15μm以下，更加理想的是7～1μm。若不到1μm，与电极表面的接触较难。另外，导电材料3的粒子直径最好要均匀，因为如果这样，从电极之间流出的就少。
在这些导电粒子中，以塑料等高分子核心材料形成导电层、或者焊锡等热熔融金属比较好，因为利用加热加压或者加压有变形性，增加了连接时与电路的接触面积，提高了可靠性。特别是以高分子类材料为核心的情况，因为它不呈现焊锡那样的融点，能够在连接温度下广泛控制软化状态，容易适应电极的厚度及平坦性的差异，因此是特别理想的。
另外，例如Ni或W等硬质金属粒子、或者表面有许多突起的粒子的情况，由于导电粒子嵌入电极或布线图形中，因此在电极表面上有氧化膜或污染层存在时也能得到低的连接电阻，提高了可靠性，所以是比较理想的。
采用本发明的多芯片安装法，能够将不同大小尺寸的带粘接剂的芯片安装在基本上，因此容易在小面积基板上安装多个芯片。
采用本发明，采用每一种芯片形成必须量的粘接剂层的芯片，与每一种芯片尺寸采用不同粘接带的情况相比，带宽用很少几种即可完成，能够简化安装装置。另外，与基板表面全部形成粘接剂层的情况相比，热量及压力对于相邻芯片或粘接剂等没有影响，又因为没有多余的粘接剂，因此比较经济。
采用本发明的理想的实施形态，由于粘接剂中含有潜在性硬化剂构成，因此利用硬化剂活性温度以下的热处理可以得到带粘接剂的芯片，因此提高了粘接剂的保存性，而在活性温度以上又能得到多芯片的高可靠性的连接。
采用本发明的利用静水压的多芯片安装法，因为密闭容器内的压力是一定的，因此能够同时处理多块MCM，所以批量效益高。另外，由于是利用气体或液体等介质加热，因此不需要昂贵的金属模具，利用不同种类的介质，可以适用于热、湿、厌气性等各种粘接剂。另外，在粘接剂的硬化必须要长时间的情况下，也可以通过一次操作大量制作。
采用本发明的多芯片安装法，由于在正式进行粘接剂硬化之前能够进行导通检查，因此发现连接不良部分时，粘接剂处于硬化反应不充分的状态，芯片的剥离及其后用丙酮等溶剂进行清洗就极其简单，容易进行返修作业。
另外，将带粘接剂的芯片在分离层上形成带粘接剂的芯片排列，可以按照安装到基板上的顺序形成，对于提高生产率是有效的。
采用本发明的带粘接剂的芯片的制造法，通过芯处加热，粘接剂层容易在芯片附近形成凝聚力下降线，另外通过能够将粘接剂层从分离层剥离，能够比较容易地得到带芯片大小的粘接剂的芯片。另外通过将该温度设定在硬化剂活性温度以下，能够对粘接剂的保存性没有影响而稳定使用。
采用本发明的带粘接剂的芯片的制造法，通过用切割刀具沿极其简单的芯片形状将粘接剂层厚度方向至少一部分切断，能够比较容易地得到带芯片大小的粘接剂的芯片。
下面用实施例进行更详细地说明，但本发明并不限于此。
实施例1
(1)粘接剂层的制作
将苯氧树脂(高分子量环氧树脂)与含有微胶囊型潜在性硬化剂的液状环氧树脂(环氧当量185)的比率定为30/70，得到醋酸乙脂的30％溶液。在该溶液中添加2％体积的在直径为3±0.2μm的聚苯乙烯系粒子上形成Ni/Au厚度为0.2/0.02μm的金属覆盖层的导电粒子，并加以混合分散。将该分散液用辊筒涂布机(Roll Coater)涂布在分离层上(硅处理聚对苯二甲酸乙二酯薄膜，厚度为40μm)，在100℃下干燥20分钟，得到厚度为20μm的粘接薄膜。
该粘接薄膜的根据DSC的活性温度为120℃，去除硬化剂的试样掺合粘度用数字粘度计NV-8(勒斯卡(レスカ)公司生产)测量，100℃时的粘度为800泊。
将该粘接薄膜与分离层-起切断，得到宽度为2mm的带状物。
(2)带粘接剂层的芯片的制作
将(1)中得到的带状物的粘接面朝上安装到芯片安装装置AC-SC450B(日立化成工业(株)生产的COB连接装置)中，用平台前后辊筒加上张力，使带状物能够在紧贴平台的状态下移动。通过吸附将评价用IC芯片(硅基板，2×10mm，厚度0.5mm，在长边一侧的2边形成300个叫做突起电极的直径50μm、高20μm的金电极)固定在加热头上。
利用上述构成，将加热头设定在110℃，以5Kgf/cm2对带状物的粘接剂表面热压3秒钟后，将加热头升起，去掉压力，将加热头离开平台。这时IC芯片前端带状物粘接剂的实际温度最高为102℃。通过上述过程，将与芯片大小几乎相等的粘接剂层从分离层上剥离而得到带粘接剂的芯片。
同样的做法，得到IC芯片尺寸为5×5mm(带宽5.5mm)2个及IC芯片尺寸为直径10mm(带宽10.5mm)1个一共4个带粘接剂的芯片。这些芯片的突起电极的间距不同，但突起电极的高度及硅基板的厚度则相同。
(3)连接
在15mm×25mm、厚度0.8mm的玻璃环氧基板(FR-4级)上有高度为18μm的铜箔电路，在电路端部有与上述(2)的IC芯片的突起电极的间距相对应的连接电极，在这样的玻璃环氧基板上放置前述的带粘接剂的芯片，在利用CCD摄像头对电极定位后，以150℃、20Kgf/mm2、15秒钟一次将全部连接好。由于芯片高度几乎相等，另外在芯片与加热头之间加入厚度100μm的特氟纶片作为缓冲材料，因此得到将4个带粘接剂的芯片一次连接好的MCM。
(4)评价
各芯片的电极与基板电极能够有了良好的连接。由于粘接剂仅仅在芯片附近有，因此在基板表面上几乎没有多余的粘接剂。生产1块MCM，在1分钟以内能够完成。
实施例2
用与实施例1大致相同的做法将IC芯片安装在基板上，但带粘接剂的芯片的制作方法改变了。也就是说，采用加压头上有切割刀具的方法，带宽设定为10mm。若对2×10mm芯片的情况加以说明，则切割刀具为在4边设置由镍铬合金构成的加热丝。加压头不加热，为室温。由于切割刀具为加热丝，因此切入离分层的切口深度能够为层厚，能得到粘接剂面上带有分离层的芯片。其他的芯片也同样能形成粘接剂。在芯片为直径10mm的情况，将切割刀具内径作成直径11mm的加热丝。这种情况下，各芯片的电极与基板电极也能够有良好连接。由于粘接剂仅仅在芯片附近有，因此在基板表面上几乎没有多余的粘接剂。
实施例3
用与实施例2大致相同的做法将IC芯片安装在基板上，但带粘接剂层的芯片的制作方法是将加热头设定在70℃。另外，切割刀具用刀片。这种情况也能够容易地得到带粘接剂层的芯片，通过同样并用切割刀具及加热手段，很容易使粘接剂紧贴芯片。加热温度可以比实施例1的要低。
实施例4
用与实施例1大致相同的做法将IC芯片安装在基板上，但带粘接剂层的芯片的的制作方法改变了。也就是说，预先在带上(宽度为10.5mm)暂时连接(100℃、5Kgf/cm2、3秒钟热压)各种芯片，成为如图7(a)那样能够连续按顺序供给各种芯片之后，用与实施例1同样的做法，得到将与芯片大小几乎相等的粘接剂层从分离层上剥离下来的带粘接剂的芯片。这种情况下，由于容易从分离层上剥离，而且能够按安装顺序得到芯片，因此生产率极高。各芯片的电极与基板电极能够有良好连接。
实施例5
将实施例4得到的带粘接剂的芯片以相邻芯片1mm的间隔再次暂时连接在连续的分离层上，得到图7B那样的带粘接剂层的芯片排列。由于按安装顺序从分离层取出芯片，因此生产率极高。各芯片的电极与基板电极能够有良好连接。另外，带粘接剂层的芯片排列能够卷绕在外径55mm的卷简芯上，收藏空间紧凑，因此也易于作业后的冷藏保管。各芯片的电极与基极电极能够有良好连接。
实施例6
用与实施例1大致相同的做法将IC芯片安装在基板上，但粘接剂的种类改变了。也就是说，未添加导电粒子。这种情况下，各芯片的电极与基板电极也能够有良好连接。这可以认为是由于芯片的突起电极与玻璃环氧基板的连接电极直接接触、利用粘接剂加以固定的缘故。
实施例7
用与实施例1大致相同的做法将IC芯片安装在基板上，但在得到带粘接剂的芯片后设置检查电极间电气连接的中间检查工序。首先，在实施例6中一面以150℃、20Kgf/mm2加压2秒钟一面用万用表测量各连接点的连接电阻。或者，在150℃、20Kgf/mm2、4秒钟条件下连接后从连接装置取出。由于在加热加压作用下粘接剂的硬化正开始，因此各IC芯片暂时固定在基板一侧，在无压力下同样进行检查。结果两种情况都有1个IC芯片异常。
因此，通过机械方法将异常芯片剥离，用新的芯片进行前述同样的连接，结果全部良好。由于两种情况的粘接剂的硬化反应都处于不完全状态，因此芯片的剥离及其后用溶剂的清洗也都极其简单，很容易进行返修作业。根据DSC的发热量判断粘接剂的反应率，前者为7％，后者为20％。
在以上的通电检查工序及返修工序之后，再用150℃、20Kgf/mm2连接15秒钟，两种情况都显示有良好的连接特性。一旦粘接剂硬化后，芯片的剥离及其后用溶剂的清洗将极其困难，但是在本实施例那样在狭窄基板上有多个芯片存在的情况，返修作业也较容易。
实施例8
与实施例1中将IC芯片安装在基板上的方法大致相同，但连接时的加热加压手段采用利用静压的方法。
也就是说，将带粘接剂的芯片置于玻璃环氧基板上，将利用CCD摄像头对电极进行定位后的暂时贴附芯片的基板放入压力釜中，经120℃、20Kgf/mm2、30分钟的气压处理后冷却至室温取出。在本实施例中，与各芯片的高度无关，施加了相同的压力，因此没有必要采用实施例1中使用的那种缓冲材料。另外，根据压力釜的容量，能够同时大量地处理多个MCM。
实施例9
用与实施例1大致相同的做法将IC芯片安装在基板上，但将分离层改换为聚四氟乙烯。(厚度80μm)。进行与实施例1同样的评价，则其芯片端部的粘接剂边缘能够以锋利且更接近于芯片大小的形状转而与芯片粘接。可以认为这是由于与实施例1相比，分离层有了柔软性，因此能够沿着芯片边缘切断粘接剂。这里两者的弹性率，聚对苯二甲酸乙二脂薄膜为200Kgf/mm2，而聚四氟乙烯为40Kgf/mm2。
实施例10
用与实施例1大致相同的做法将IC芯片安装在基板上，但在分离层与平台之间放置厚度为0.5mm硅橡胶后制作带粘接剂的芯片。这种情况下与实施例1相比，其芯片端部的粘接剂边缘能够以锋利且更接近于芯片大小的形状转而与芯片粘接。可以认为这是由于硅橡胶作为缓冲材料的作用，在分离层下存在有柔软的橡胶层时，电极面上形成的粘接剂厚度也要根据突起电极的高度或导电粒子来控制，因此在突起电极上形成了4μm左右，而在突起电极以外形成了原来粘接剂厚度、即20μmμ。
比较例
在将实施例1中的IC芯片安装在基板上的方法中，将带分离层的粘接薄膜按芯片大小切断粘贴在电极形成面上。由于芯片很小，要正确粘贴很花时间，为了制作1块MCM需0分钟以上，与实施例1在1分钟以内即可完成相比，效率很低。
从上述实施例及比较例可以知道，采用本发明，能够在不同尺寸的芯片电极面上正确形成粘接剂，同时能够将不同尺寸的若干芯片一次安装，因此能够高效率地生产MCM。

Claims (3)

1.一种电路基板上安装带粘接剂的电子元器件的方法，包括：将多种电子元器件的电极粘接固定在电路基板上、电气连接并保持各电子元器件，其特征在于，所述方法包括下述工序：
在所述各电子元器件电极形成的电极形成面上，形成与该电极形成面的面积大致相同面积的薄膜状热固性粘接剂层，从而得到带粘接剂电极的粘接剂层形成工序，
将形成了粘接剂层的电极与基板电极对准安放并定位的定位工序，
增加粘接剂的凝聚力达到能够保持接触状态程度的暂时固定工序，
对暂时固定的电极之间进行热压的热压工序，及
在增加粘接剂的凝聚力达到能够保持连接状态程度的状态下，检查电子元器件的电极与基板电极之间的电气连接的检查工序。
2.如权利要求1所述的电路基板上安装带粘接剂的电子元器件的方法，其特征在于，
所述薄膜状粘接剂层的面积，相对于电极形成面的面积在正负30％以内。
3.如权利要求1所述的电路基板上安装带粘接剂的电子元器件的方法，其特征在于，
所述电子元器件保持在加热头上，所述热压工序利用所述加热头对电子元器件的电极进行加热加压。
CN97117465A 1996-08-06 1997-08-06 电路基板上安装带粘接剂的电子元器件的方法 Expired - Fee Related CN1098617C (zh)

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JPH10107048A (ja) 1998-04-24
EP0824270A3 (en) 1999-06-09
JP2009283961A (ja) 2009-12-03
JP3928753B2 (ja) 2007-06-13
US6479757B1 (en) 2002-11-12
US6841022B2 (en) 2005-01-11
KR100278594B1 (zh) 2001-01-15
US20030029556A1 (en) 2003-02-13
US6158115A (en) 2000-12-12
CN1174490A (zh) 1998-02-25
TW428259B (en) 2001-04-01
DE69727014D1 (de) 2004-02-05
JP2009283962A (ja) 2009-12-03
EP0824270B1 (en) 2004-01-02
EP0824270A2 (en) 1998-02-18
DE69727014T2 (de) 2004-06-09

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