CN107170745A - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN107170745A CN107170745A CN201710073374.XA CN201710073374A CN107170745A CN 107170745 A CN107170745 A CN 107170745A CN 201710073374 A CN201710073374 A CN 201710073374A CN 107170745 A CN107170745 A CN 107170745A
- Authority
- CN
- China
- Prior art keywords
- laminate
- semiconductor regions
- semiconductor
- insulation division
- dielectric film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 186
- 238000000034 method Methods 0.000 title claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 44
- 238000009413 insulation Methods 0.000 claims abstract description 54
- 238000003475 lamination Methods 0.000 claims abstract description 34
- 239000012212 insulator Substances 0.000 claims abstract description 24
- 238000009825 accumulation Methods 0.000 claims abstract description 16
- 239000004020 conductor Substances 0.000 claims description 71
- 239000000758 substrate Substances 0.000 claims description 20
- 230000002093 peripheral effect Effects 0.000 claims description 8
- 239000012528 membrane Substances 0.000 claims 1
- 239000013256 coordination polymer Substances 0.000 description 153
- 239000010410 layer Substances 0.000 description 73
- 238000003860 storage Methods 0.000 description 53
- 230000015572 biosynthetic process Effects 0.000 description 35
- 238000010276 construction Methods 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 12
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 9
- 229910052721 tungsten Inorganic materials 0.000 description 9
- 239000010937 tungsten Substances 0.000 description 9
- 229910052581 Si3N4 Inorganic materials 0.000 description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 8
- 238000005229 chemical vapour deposition Methods 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 238000009826 distribution Methods 0.000 description 6
- 239000012792 core layer Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 210000000746 body region Anatomy 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 241001232787 Epiphragma Species 0.000 description 1
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- -1 for example Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
Description
Claims (20)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201662304983P | 2016-03-08 | 2016-03-08 | |
US62/304,983 | 2016-03-08 | ||
US15/258,220 | 2016-09-07 | ||
US15/258,220 US10090319B2 (en) | 2016-03-08 | 2016-09-07 | Semiconductor device and method for manufacturing the same |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107170745A true CN107170745A (zh) | 2017-09-15 |
CN107170745B CN107170745B (zh) | 2020-09-29 |
Family
ID=59788732
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710073374.XA Active CN107170745B (zh) | 2016-03-08 | 2017-02-10 | 半导体装置及其制造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10090319B2 (zh) |
CN (1) | CN107170745B (zh) |
TW (1) | TWI643316B (zh) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109362206A (zh) * | 2018-08-24 | 2019-02-19 | 中国电子科技集团公司第二十九研究所 | 一种星载高热流密度tr组件阵列集成安装方法 |
CN109841628A (zh) * | 2017-11-24 | 2019-06-04 | 旺宏电子股份有限公司 | 半导体结构及其形成方法 |
CN110277401A (zh) * | 2018-03-14 | 2019-09-24 | 东芝存储器株式会社 | 半导体装置 |
CN110491878A (zh) * | 2018-05-15 | 2019-11-22 | 东芝存储器株式会社 | 半导体存储装置 |
CN110660789A (zh) * | 2018-06-28 | 2020-01-07 | 艾普凌科有限公司 | 半导体装置及半导体芯片 |
CN110838515A (zh) * | 2018-08-17 | 2020-02-25 | 东芝存储器株式会社 | 半导体晶片及半导体装置 |
CN112510047A (zh) * | 2019-09-13 | 2021-03-16 | 铠侠股份有限公司 | 半导体存储装置 |
CN112750839A (zh) * | 2019-10-30 | 2021-05-04 | 铠侠股份有限公司 | 半导体装置 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10083979B2 (en) * | 2016-09-16 | 2018-09-25 | Toshiba Memory Corporation | Semiconductor device, manufacturing method and controlling method of semiconductor device |
US10115731B2 (en) * | 2017-03-13 | 2018-10-30 | Toshiba Memory Corporation | Semiconductor memory device |
JP2019165089A (ja) * | 2018-03-19 | 2019-09-26 | 東芝メモリ株式会社 | 半導体装置 |
JP2020043119A (ja) * | 2018-09-06 | 2020-03-19 | キオクシア株式会社 | 半導体装置 |
KR20200073702A (ko) | 2018-12-14 | 2020-06-24 | 삼성전자주식회사 | 반도체 메모리 소자 및 그 제조 방법 |
JP2020155714A (ja) | 2019-03-22 | 2020-09-24 | キオクシア株式会社 | 半導体記憶装置 |
JP2021040009A (ja) | 2019-09-02 | 2021-03-11 | キオクシア株式会社 | 半導体記憶装置及びその製造方法 |
JP2021136279A (ja) * | 2020-02-25 | 2021-09-13 | キオクシア株式会社 | 半導体記憶装置 |
JP2022032210A (ja) | 2020-08-11 | 2022-02-25 | キオクシア株式会社 | 半導体記憶装置 |
JP2022035525A (ja) | 2020-08-21 | 2022-03-04 | キオクシア株式会社 | 半導体記憶装置の動作条件の調整方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080031048A1 (en) * | 2006-08-04 | 2008-02-07 | Jae-Hun Jeong | Memory device including 3-dimensionally arranged memory cell transistors and methods of operating the same |
CN101241914A (zh) * | 2007-01-26 | 2008-08-13 | 株式会社东芝 | 非易失性半导体存储装置 |
CN103680611A (zh) * | 2012-09-18 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | 3d nand存储器以及制作方法 |
CN104835824A (zh) * | 2014-02-06 | 2015-08-12 | 株式会社东芝 | 半导体存储装置及其制造方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012059966A (ja) * | 2010-09-09 | 2012-03-22 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
KR101787041B1 (ko) | 2010-11-17 | 2017-10-18 | 삼성전자주식회사 | 식각방지막이 구비된 반도체 소자 및 그 제조방법 |
JP2012151187A (ja) | 2011-01-17 | 2012-08-09 | Toshiba Corp | 半導体記憶装置の製造方法 |
US8933502B2 (en) * | 2011-11-21 | 2015-01-13 | Sandisk Technologies Inc. | 3D non-volatile memory with metal silicide interconnect |
US9240420B2 (en) * | 2013-09-06 | 2016-01-19 | Sandisk Technologies Inc. | 3D non-volatile storage with wide band gap transistor decoder |
US9209031B2 (en) | 2014-03-07 | 2015-12-08 | Sandisk Technologies Inc. | Metal replacement process for low resistance source contacts in 3D NAND |
US9876025B2 (en) * | 2015-10-19 | 2018-01-23 | Sandisk Technologies Llc | Methods for manufacturing ultrathin semiconductor channel three-dimensional memory devices |
-
2016
- 2016-09-07 US US15/258,220 patent/US10090319B2/en active Active
-
2017
- 2017-01-24 TW TW106102565A patent/TWI643316B/zh active
- 2017-02-10 CN CN201710073374.XA patent/CN107170745B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080031048A1 (en) * | 2006-08-04 | 2008-02-07 | Jae-Hun Jeong | Memory device including 3-dimensionally arranged memory cell transistors and methods of operating the same |
CN101241914A (zh) * | 2007-01-26 | 2008-08-13 | 株式会社东芝 | 非易失性半导体存储装置 |
CN103680611A (zh) * | 2012-09-18 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | 3d nand存储器以及制作方法 |
CN104835824A (zh) * | 2014-02-06 | 2015-08-12 | 株式会社东芝 | 半导体存储装置及其制造方法 |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109841628B (zh) * | 2017-11-24 | 2021-05-28 | 旺宏电子股份有限公司 | 半导体结构及其形成方法 |
CN109841628A (zh) * | 2017-11-24 | 2019-06-04 | 旺宏电子股份有限公司 | 半导体结构及其形成方法 |
CN110277401A (zh) * | 2018-03-14 | 2019-09-24 | 东芝存储器株式会社 | 半导体装置 |
CN110491878A (zh) * | 2018-05-15 | 2019-11-22 | 东芝存储器株式会社 | 半导体存储装置 |
CN110491878B (zh) * | 2018-05-15 | 2023-09-01 | 铠侠股份有限公司 | 半导体存储装置 |
CN110660789A (zh) * | 2018-06-28 | 2020-01-07 | 艾普凌科有限公司 | 半导体装置及半导体芯片 |
CN110660789B (zh) * | 2018-06-28 | 2023-09-12 | 艾普凌科有限公司 | 半导体装置及半导体芯片 |
CN110838515A (zh) * | 2018-08-17 | 2020-02-25 | 东芝存储器株式会社 | 半导体晶片及半导体装置 |
CN110838515B (zh) * | 2018-08-17 | 2023-10-20 | 铠侠股份有限公司 | 半导体晶片及半导体装置 |
CN109362206A (zh) * | 2018-08-24 | 2019-02-19 | 中国电子科技集团公司第二十九研究所 | 一种星载高热流密度tr组件阵列集成安装方法 |
CN109362206B (zh) * | 2018-08-24 | 2019-06-28 | 中国电子科技集团公司第二十九研究所 | 一种星载高热流密度tr组件阵列集成安装方法 |
CN112510047A (zh) * | 2019-09-13 | 2021-03-16 | 铠侠股份有限公司 | 半导体存储装置 |
CN112510047B (zh) * | 2019-09-13 | 2023-09-05 | 铠侠股份有限公司 | 半导体存储装置 |
CN112750839A (zh) * | 2019-10-30 | 2021-05-04 | 铠侠股份有限公司 | 半导体装置 |
CN112750839B (zh) * | 2019-10-30 | 2023-12-22 | 铠侠股份有限公司 | 半导体装置 |
Also Published As
Publication number | Publication date |
---|---|
US10090319B2 (en) | 2018-10-02 |
US20170263631A1 (en) | 2017-09-14 |
TW201803091A (zh) | 2018-01-16 |
CN107170745B (zh) | 2020-09-29 |
TWI643316B (zh) | 2018-12-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107170745A (zh) | 半导体装置及其制造方法 | |
CN108447865B (zh) | 三维存储器及其制造方法 | |
US10269620B2 (en) | Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof | |
TWI390714B (zh) | 非揮發性半導體記憶裝置及其製造方法 | |
KR102108879B1 (ko) | 수직형 메모리 장치 및 그 제조 방법 | |
CN104347638B (zh) | 非易失性存储装置 | |
CN110121778A (zh) | 三维存储器件 | |
JP2017163057A (ja) | 半導体記憶装置 | |
CN109935596B (zh) | 3d存储器件及其制造方法 | |
CN107195632A (zh) | 半导体装置及其制造方法 | |
CN102800676A (zh) | 非易失性存储器件及其制造方法 | |
US20170194345A1 (en) | Semiconductor memory device and method for manufacturing the same | |
CN107799546A (zh) | 存储装置及其制造方法 | |
CN106373964A (zh) | 半导体存储装置及其制造方法 | |
CN104979357A (zh) | 包括具有三维形状的源极线的非易失性存储器件 | |
CN110021608A (zh) | 半导体存储装置 | |
CN110491878A (zh) | 半导体存储装置 | |
CN106469734A (zh) | 存储器元件及其制作方法 | |
US9917101B1 (en) | Semiconductor memory device | |
JP2019102685A (ja) | 半導体装置 | |
JP2014056898A (ja) | 不揮発性記憶装置 | |
TWI804899B (zh) | 半導體裝置及其製造方法 | |
JP2019161015A (ja) | 記憶装置およびその製造方法 | |
CN105590933B (zh) | 三维叠层半导体结构及其制造方法 | |
TW202312458A (zh) | 半導體記憶裝置及其製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CP01 | Change in the name or title of a patent holder | ||
CP01 | Change in the name or title of a patent holder |
Address after: Tokyo Patentee after: TOSHIBA MEMORY Corp. Address before: Tokyo Patentee before: Pangea Co.,Ltd. Address after: Tokyo Patentee after: Kaixia Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. |
|
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20220208 Address after: Tokyo Patentee after: Pangea Co.,Ltd. Address before: Tokyo Patentee before: TOSHIBA MEMORY Corp. |