CN106796938A - 半导体元件 - Google Patents

半导体元件 Download PDF

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CN106796938A
CN106796938A CN201480081528.4A CN201480081528A CN106796938A CN 106796938 A CN106796938 A CN 106796938A CN 201480081528 A CN201480081528 A CN 201480081528A CN 106796938 A CN106796938 A CN 106796938A
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substrate
conductivity type
semiconductor element
active region
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CN106796938B (zh
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高桥彻雄
瓜生胜美
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Mitsubishi Electric Corp
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Abstract

具有：有源区域，其具有在第1导电型的衬底的上表面侧设置的第1导电型的发射极区域、在该衬底的上表面侧设置的第2导电型的基极区域和在该衬底的下表面侧设置的第2导电型的集电极层；以及二极管区域，其具有在该衬底的上表面侧设置的第2导电型的阳极层和在该衬底的下表面侧设置的第1导电型的阴极层，该阴极层在俯视图中与该有源区域分离，在该有源区域的上表面侧形成杂质浓度比该阳极层高的第2导电型的高浓度区域。

Description

半导体元件
技术领域
本发明涉及在例如开关、空调、冰箱、洗衣机、新干线、电车、混合动力汽车、太阳能或者风力发电用转换器等中使用的半导体元件。
背景技术
在专利文献1中公开有将IGBT和续流二极管集成于同一芯片的半导体元件。该半导体元件为了降低IGBT的导通电压，使得阴极区域的端部在远离IGBT部的方向上与阳极区域的端部分离大于或等于100μm。
专利文献1：日本特开2004－363328号公报
发明内容
与将开关元件和二极管设为彼此独立的部件的情况相比，将开关元件区域和二极管区域集成于1个芯片的半导体元件有利于装置的小型化。但是，在续流模式下存在下述问题，即，在流过二极管区域的电流中叠加流过开关元件区域的寄生二极管的电流。其结果，存在恢复电流变大的问题。
本发明就是为了解决上述问题而提出的，其目的在于提供一种能够减小恢复电流的半导体元件。
本发明所涉及的半导体元件的特征在于，具有：开关元件区域，其具有有源区域，该有源区域具有在第1导电型的衬底的上表面侧设置的第1导电型的发射极区域、在该衬底的上表面侧设置的第2导电型的基极区域和在该衬底的下表面侧设置的第2导电型的集电极层；以及二极管区域，其具有在该衬底的上表面侧设置的第2导电型的阳极层和在该衬底的下表面侧设置的第1导电型的阴极层，该阴极层在俯视图中与该有源区域分离，在该有源区域的上表面侧形成有杂质浓度比该阳极层高的第2导电型的高浓度区域。
本发明的其他特征将在下面得以明确。
发明的效果
根据本发明，由于在俯视图中使阴极层与有源区域分离，在有源区域的上表面侧形成杂质浓度比阳极层高的第2导电型的高浓度区域，因此能够维持开关元件区域的特性，并且减小恢复电流。
附图说明
图1是实施方式1所涉及的半导体元件的局部剖视图。
图2是实施方式1所涉及的半导体元件的俯视图。
图3是附加了电路符号后的半导体元件的局部剖视图。
图4是表示后退距离和续流模式下的衬底的载流子浓度的关系的图表。
图5是表示后退距离和恢复电流的关系的图表。
图6是实施方式2所涉及的半导体元件的局部剖视图。
图7是半导体元件的局部剖视图，示出通过设置阱区域而生成的二极管。
图8是实施方式3所涉及的半导体元件的局部剖视图。
具体实施方式
参照附图，对本发明的实施方式所涉及的半导体元件进行说明。对相同或者相对应的结构要素标注相同的标号，有时省略重复的说明。
实施方式1
将n型的导电型称为第1导电型，将p型的导电型称为第2导电型。本发明的实施方式1所涉及的半导体元件是将IGBT和续流用二极管(Free Wheeling Diode(FWD))集成于1个芯片的反向导通绝缘栅双极晶体管(Reverse-Conducting Insulated Gate BipolarTransistor，RC-IGBT)。图1是本发明的实施方式1所涉及的半导体元件的局部剖视图。该半导体元件具有第1导电型的衬底10。衬底10例如由Si、GaN或者SiC形成。在该衬底10制作出：有源区域R2，其构成开关元件区域R1的一部分；以及二极管区域R3。
对有源区域R2进行说明。在衬底10的上表面侧设置有第1导电型的载流子存储区域12。载流子存储区域12的杂质浓度比衬底10的杂质浓度高。在衬底10的上表面侧设置有位于载流子存储区域12之上的第2导电型的基极区域14。在衬底10的上表面侧设置有位于基极区域14之上的第1导电型的发射极区域16。发射极区域16的杂质浓度比载流子存储区域12的杂质浓度高。在基极区域14之上设置有与发射极区域16相邻的第2导电型的P+接触区域18。P+接触区域18的杂质浓度比基极区域14的杂质浓度高。
在衬底10的上表面侧设置有贯穿载流子存储区域12和基极区域14的沟槽栅极电极20。沟槽栅极电极20例如由多晶硅形成。沟槽栅极电极20的侧面和下表面由栅极绝缘膜22覆盖。发射极区域16、基极区域14、载流子存储区域12以及衬底10与栅极绝缘膜22接触。在衬底10的上表面形成有上表面电极24。前述的P+接触区域18设置于基极区域14和上表面电极24之间。为了防止上表面电极24和沟槽栅极电极20接触，在二者之间设置有层间绝缘膜26。如上所述，在有源区域R2的上表面侧形成有n沟道MOSFET构造。
在衬底10的下表面侧设置有第1导电型的缓冲层30。在衬底10的下表面侧设置有位于缓冲层30之下的第2导电型的集电极层32。在集电极层32的下表面设置有下表面电极34。
对二极管区域R3进行说明。在衬底10的上表面侧设置有载流子存储区域12。在衬底10的上表面侧设置有位于载流子存储区域12之上的第2导电型的阳极层40。阳极层40的杂质浓度比基极区域14的杂质浓度低，且比P+接触区域18的杂质浓度低。另外，在阳极层40和衬底10之间形成的载流子存储区域12的杂质浓度比衬底10的杂质浓度高。在阳极层40的上表面设置有上表面电极24。
与有源区域R2同样地，在二极管区域R3也设置有沟槽栅极电极20和栅极绝缘膜22。沟槽栅极电极20贯穿阳极层40和载流子存储区域12。
在衬底10的下表面侧设置有第1导电型的缓冲层30。在衬底10的下表面侧设置有位于缓冲层30之下的第1导电型的阴极层42。阴极层42的杂质浓度比衬底10的杂质浓度高。在阴极层42的下表面设置有下表面电极34。如上所述，在二极管区域R3形成有PIN二极管。
集电极层32从有源区域R2和二极管区域R3的边界起向二极管区域R3侧以距离W1延伸。阴极层42的端部42a在俯视图中在远离有源区域R2的方向上从该边界起后退了距离W1。有时将该距离W1称为后退距离。
图2是本发明的实施方式1所涉及的半导体元件的俯视图。开关元件区域R1具有有源区域R2和栅极区域R4。在栅极区域R4的表面形成有栅极电极。上表面电极24的轮廓以虚线示出。上表面电极24在有源区域R2作为发射极电极起作用，在二极管区域R3作为阳极电极起作用。阴极层42的轮廓以单点划线示出。阴极层42在俯视图中以距离W1与有源区域R2分离。此外，在半导体元件的外周设置有外周区域R5。
对本发明的实施方式1所涉及的半导体元件的动作进行说明。在开关元件的正向稳定动作时，电子经过有源区域R2的n沟道MOSFET而从上表面电极24流入至衬底10。衬底10的下表面是称为阳极短路的构造，电子电流最初从缓冲层30经过阴极层42而流入至下表面电极34(集电极电极)。然后，如果集电极层32和缓冲层30的结变为正向偏置，则空穴从集电极层32向衬底10流入，导电率调制开始，成为稳定状态。
如果有源区域R2的n沟道MOSFET截止，则衬底10内部的过剩载流子从基极区域14、P+接触区域18以及阳极层40向上表面电极24排出，开关元件成为截止状态。
如果上表面电极24的电位变得比下表面电极34的电位高，则续流模式(FWD模式)的动作开始。续流模式的动作根据栅极电位而不同，在这里对栅极电位为0V的情况进行说明。二极管的理想的导通状态(稳定状态)是下述状态，即，空穴从阳极层40经过载流子存储区域12向衬底10流入，电流向阴极层42流入。即，理想情况是，仅由从阳极层40向衬底10流入的空穴构成电流。
但是，实际上，有源区域R2也有助于电流。关于这一点，参照图3进行说明。图3是附加了电路符号后的半导体元件的局部剖视图。在续流模式下，除二极管D1以外，电流还流过由P+接触区域18、基极区域14、载流子存储区域12、衬底10以及阴极层42构成的二极管D2。因此，在续流模式下，二极管D2的电流叠加于二极管D1的电流。
如果下表面电极34的电位变得比上表面电极24的电位高，则载流子逐渐清除(swept)，二极管的截止动作(恢复动作)开始。在二极管D2正向偏置的期间，恢复电流从下表面电极34向上表面电极24流动。然后，如果二极管D2的正向偏置消失、衬底10内部的载流子消失，则成为截止状态。
如上所述，有源区域R2的基极区域14和P+接触区域18作为阳极进行动作。为了抑制由二极管D2形成的电流，降低基极区域14和P+接触区域18的杂质浓度即可。但是，由于基极区域14是决定n沟道MOSFET的阈值电压的部分，因此无法容易地低浓度化。另外，为了降低接触电阻，P+接触区域18必须是高浓度的，因此无法容易地低浓度化。如果作为阳极起作用的基极区域14和P+接触区域18的杂质浓度高，则在恢复时在衬底10残留大量载流子，因此恢复电流变大。
在本发明的实施方式1中，为了防止恢复电流变大，而使阴极层42在俯视图中与有源区域R2分离。因此，能够加长寄生PIN二极管即二极管D2的i层的长度。具体而言，如果将衬底的厚度设为d，则能够将i层的长度设为(d2+W12)。该长度比将阴极层形成至二极管区域R3和有源区域R2的边界为止时的i层的长度“d”长。由此，能够抑制由二极管D2形成的电流，因此能够减小恢复电流。另外，由于阳极层40的杂质浓度比基极区域14的杂质浓度以及P+接触区域18的杂质浓度小，因此能够抑制恢复电流。如上所述，通过减小恢复电流，从而Eon、Err等通断损耗下降，击穿耐量提高。
本发明的实施方式1所涉及的半导体元件会抑制如下情况，即，在杂质浓度比阳极层40高的第2导电型的高浓度区域形成于有源区域R2的上表面侧的情况下，由该高浓度区域使恢复电流增大。在实施方式1中，基极区域14和P+接触区域18是高浓度区域。但是，也可以是基极区域14和P+接触区域18中的任一方是高浓度区域，也可以将除基极区域和P+接触区域以外的区域设为高浓度区域。
下面，对后退距离W1进行研究。图4是表示后退距离W1和续流模式下的衬底10的载流子浓度的关系的图表。图4表示使用了下述模型的模拟结果，即，使后退距离反映于1维的二极管的衬底(i层)的长度。根据该模拟结果可知，通过增大后退距离W1，从而衬底的载流子浓度下降。特别地，如果将后退距离W1设为大于或等于衬底厚度d的1.5倍，则与W1＝0的情况相比，能够将衬底中央处的载流子浓度设为大致一半，因此能够充分地降低恢复电流。因此，俯视图中的阴极层42和有源区域R2的距离(后退距离W1)优选设为大于或等于衬底10的厚度d的1.5倍。
图5是表示后退距离W1和恢复电流的关系的图表。图5中的寿命是指衬底10中的空穴的寿命。寿命的值既可以通过模拟求出，也可以通过微波光电导衰减法(MicrowavePhoto Conductivity Decay法)求出。在图5中示出寿命分别为1微秒、2微秒、3微秒的情况下的恢复电流。
如果增大后退距离W1，则恢复电流减少，收敛于某个值。如果W1/寿命(/的左侧是分子，右侧是分母)的值大致大于或等于100，则与其值为50左右的情况相比，能够将恢复电流降低10％～20％。因此，俯视图中的阴极层和有源区域之间的距离(后退距离W1)优选设为，以米为单位，大于或等于衬底的以秒为单位的载流子的寿命[s]×100所得到的长度。另外，在W1/寿命的值大于或等于300的区域，由于恢复电流收敛，因此即使将该值设为大于300，恢复电流的抑制效果也几乎不会提高，只是元件变大而已。因此，优选W1/寿命的值设为100～300。
如果综合图4、5的结果，则优选将W1设为大于或等于1.5d，并且将W1/寿命的值设为100～300之间。
本发明的实施方式1所涉及的半导体元件在不丧失其特征的范围能够进行各种变形。例如，也可以在有源区域形成平面栅极构造。此前是将n型设为第1导电型，将p型设为第2导电型，但也可以使导电型反转。栅极区域R4、有源区域R2及二极管区域R3的位置关系不限定于图2的位置关系。例如，也可以是以包围二极管区域R3的方式形成有源区域R2。另外，也可以是以包围开关元件区域R1的方式形成二极管区域R3。并且，也可以是以与有源区域R2和栅极区域R4这二者接触的方式形成二极管区域R3。也可以省略载流子存储区域12和缓冲层30。此外，上述变形还可以适当地应用于以下的实施方式所涉及的半导体元件。
关于以下的实施方式所涉及的半导体元件，由于与实施方式1的共同点多，因此以与实施方式1的不同点为中心进行说明。
实施方式2
图6是本发明的实施方式2所涉及的半导体元件的局部剖视图。开关元件区域R1在有源区域R2和二极管区域R3之间具有栅极区域R4。在栅极区域R4形成有栅极电极50。栅极电极50是从外部接收栅极驱动信号的部分。在栅极区域R4设置有与栅极电极50连接的栅极线52。栅极线52将栅极电极50和沟槽栅极电极20连接。在栅极电极50及栅极线52之下设置有绝缘体54。在栅极区域R4的衬底10形成有第2导电型的阱区域56。与阳极层40相比，阱区域56形成至衬底10的更深位置。阱区域56的杂质浓度比阳极层40的杂质浓度高。
阱区域56与上表面电极24连接。因此，阱区域56在续流模式(FWD模式)下作为寄生的阳极起作用。因此，使阴极层42在俯视图中与阱区域56分离。俯视图中的阴极层42和阱区域56的距离为W2。图7是半导体元件的局部剖视图，示出通过设置阱区域而生成的二极管D3。由于使阴极层42的端部从栅极区域R4和二极管区域R3的边界起向与栅极区域R4分离的方向后退，因此二极管D3的i层相应地变长。由此，能够减小恢复电流。
如上所述，通过在有源区域R2和二极管区域R3之间设置栅极区域R4，从而能够将各要素的配置最优化。此外，优选应用在实施方式1中说明的后退距离W1的思路，将W2设为大于或等于1.5d，或者将W2/寿命的值设为100～300之间的值。
实施方式3
图8是本发明的实施方式3所涉及的半导体元件的局部剖视图。第2导电型的阱区域100形成于栅极区域R4的有源区域R2侧，未形成于栅极区域R4的二极管区域R3侧。另外，在二极管区域R3未形成沟槽栅极电极、栅极氧化膜以及载流子存储区域。因此，在二极管区域R3的衬底10的上表面侧仅形成有阳极层40。
俯视图中的阴极层42和阱区域100的距离为W3。由于阱区域100仅形成于有源区域R2侧，因此如果在与实施方式2相同的位置设置阴极层42的端部，则W3变得非常长。因此，能够充分地减小恢复电流。另外，由于将阱区域100仅形成于有源区域R2侧，因此即使使阴极层42的端部向栅极区域R4侧移动，也能够充分地减小恢复电流。
如上所述，就本发明的实施方式3所涉及的半导体元件而言，由于将阱区域100形成于有源区域R2侧，因此不需要使阴极层大幅度地后退。由此，不需要以阴极层的后退量将二极管区域增大等应对措施，因此能够减小二极管区域。
此外，也可以对上述各实施方式所涉及的半导体元件的特征适当地进行组合而提高本发明的效果。
标号的说明
10衬底，12载流子存储区域，14基极区域，16发射极区域，18P+接触区域，20沟槽栅极电极，22栅极绝缘膜，24上表面电极，26层间绝缘膜，30缓冲层，32集电极层，34下表面电极，40阳极层，42阴极层，50栅极电极，52栅极线，54绝缘体，56、100阱区域，R1开关元件区域，R2有源区域，R3二极管区域，R4栅极区域。

Claims (9)

1.一种半导体元件，其特征在于，具有：
开关元件区域，其具有有源区域，该有源区域具有在第1导电型的衬底的上表面侧设置的第1导电型的发射极区域、在所述衬底的上表面侧设置的第2导电型的基极区域和在所述衬底的下表面侧设置的第2导电型的集电极层；以及
二极管区域，其具有在所述衬底的上表面侧设置的第2导电型的阳极层和在所述衬底的下表面侧设置的第1导电型的阴极层，
所述阴极层在俯视图中与所述有源区域分离，
在所述有源区域的上表面侧形成有杂质浓度比所述阳极层高的第2导电型的高浓度区域。
2.根据权利要求1所述的半导体元件，其特征在于，
所述高浓度区域是所述基极区域。
3.根据权利要求1所述的半导体元件，其特征在于，具有：
上表面电极，其形成于所述衬底的上表面；以及
第2导电型的P+接触区域，其设置于所述基极区域和所述上表面电极之间，杂质浓度比所述基极区域高，
所述高浓度区域是所述P+接触区域。
4.根据权利要求1至3中任一项所述的半导体元件，其特征在于，
俯视图中的所述阴极层和所述有源区域之间的距离以米为单位大于或等于所述衬底的以秒为单位的载流子的寿命×100所得到的长度。
5.根据权利要求1至4中任一项所述的半导体元件，其特征在于，
俯视图中的所述阴极层和所述有源区域之间的距离大于或等于所述衬底的厚度的1.5倍。
6.根据权利要求1至5中任一项所述的半导体元件，其特征在于，
所述开关元件区域在所述有源区域和所述二极管区域之间具有形成了栅极电极和栅极线的栅极区域。
7.根据权利要求6所述的半导体元件，其特征在于，
具有在所述栅极区域的所述衬底形成的第2导电型的阱区域，
所述阴极层在俯视图中与所述阱区域分离。
8.根据权利要求7所述的半导体元件，其特征在于，
所述阱区域形成于所述栅极区域的所述有源区域侧，未形成于所述栅极区域的所述二极管区域侧。
9.根据权利要求1至8中任一项所述的半导体元件，其特征在于，
在所述阳极层和所述衬底之间具有杂质浓度比所述衬底高的第1导电型的载流子存储区域。
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