CN1065660C - 半导体封装基片及其制造方法以及半导体封装 - Google Patents

半导体封装基片及其制造方法以及半导体封装 Download PDF

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CN1065660C
CN1065660C CN97104303A CN97104303A CN1065660C CN 1065660 C CN1065660 C CN 1065660C CN 97104303 A CN97104303 A CN 97104303A CN 97104303 A CN97104303 A CN 97104303A CN 1065660 C CN1065660 C CN 1065660C
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insulator
substrate
lower wire
insulating barrier
encapsulation
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赵在元
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SK Hynix Inc
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Abstract

一种半导体封装基片及其制造方法及用该基片的堆叠式半导体封装，所述基片包括：绝缘体；分别形成于绝缘体的上下表面的上下凹槽；分别形成于上下凹槽中的多根第一上下导线；及每根皆与相应的各第一上下导线的一端相连的多根第二上下导线，这些导线分别从绝缘体的上下表面向外延伸。在上下凹槽中安装第一和第二半导体芯片，分别通过第三导线电连接第一上下导线与第一和第二半导体芯片，然后在上下凹槽中填充模制树脂，用以密封第一上下导线、半导体芯片和第三导线，从而形成堆叠式半导体封装。

Description

半导体封装基片及其制造方法以及半导体封装
本发明涉及一种半导体封装的基片、其制造方法、及用该基片的堆叠式半导体封装，特别涉及一种改进的基片、该基片的制造方法、及一种堆叠式半导体封装，通过在基片的上下表面上形成安装半导体芯片的凹槽，并堆叠利用该基片的每个已完成半导体封装，能实现高集成度，并能减薄和减轻半导体封装。
所年来，随着半导体技术的迅速发展，为了在给定面积上安装尽可能多的半导体芯片，人们已作了很大的努力。例如，图1中所示的安装两块半导体芯片的树脂密封型半导体封装。
图1是展示常规树脂密封型半导体装结构的纵剖图。如图所示，树脂密封型半导体封装包括：第一和第二半导体芯片1、1′，两块芯片设置成使两者的芯片焊盘(未示出)相互面对，且其间有一间隔；分别形成于第一和第二半导体芯片1、1′的每个芯片焊盘上的凸点3、3′；多根内引线4，其每一根的一端与第一半导体芯片1的相应凸点3相连；从内引线4的另一端延伸的多根外引线5；多根第二内引线4′，其每一根的一端与第二半导体芯片1′的相应凸点3′相连，每一根的另一端与相应一根第一内引线4相连；密封第一和第二半导体芯片1、1′及第一和第二内引线4、4′的模制件。
下面将详细说明制造有上述结构的常规树脂密封型半导体封装的方法。
首先，通过凸点3把第一内引线4安放在形成于第一半导体芯片1上的每个相应焊盘上，然后通过凸点3′把第二内引线4′安放在形成于第二半导体芯片1′上的每个芯片焊盘上。根据上述凸点键合法，凸点3、3′分别放置在第一和第二半导体芯片1、1′的每个焊盘上，第一和第二内引线4、4′放在凸点3、3′的上表面上，进行加热，以键合焊盘、凸点3，3′、内引线4，4′。该工艺利用凸点键合工艺的自动设备。
接着，在分别把第一和第二内引线4、4放到第一和第二半导体芯片1、1上后，把第二半导体芯片1的第二内引线4放置到第一半导体芯片1的相应第一内引线4上，利用激光进行键合，使内引线4、4相互连接在一起。然后，用环氧树脂密封包括第一和第二半导体芯片11、及第一和第二内引线44的预定区域，构成模制件6。根据用户的目的，成形从第一内引线4延伸构成且突出于模制件6之外的外引线5，于是制成该树脂密封型半导体封装。
然而，在该树脂密封型半导体封装中，限制了可安装的半导体芯片数，半导体封装不能堆叠起来利用。而且，利用凸点键合法键合内引线与半导体芯片焊盘，比起广泛应用的引线键合法来说，该方法是一种要求极严的工艺，且生产成本高。
因此，本发明的目的在于提供一种改进的半导体封装基片及其制造方法，能在单个封装中安装两块半导体芯片，因而能提供一种堆叠式半导体封装，通过堆叠利用该基片的已制成的半导体封装，能实现高集成度，且能减薄和减轻封装。
为了实现上述目的，本发明提供一种改进的半导体封装基片，该基片包括：有上下表面的绝缘体；形成于绝缘体的上下表面上的上下凹槽，用于安放半导体芯片；分别形成于上下凹槽中的多根第一上下导线；及形成于绝缘体的上下表面上的多根第二上下导线。
绝缘体由陶瓷或塑料构成，且绝缘体中至少形成有一个对准孔。第一上导线与相应的第一下导线电连接。
为了实现上述目的，本发明还提供一种制造半导体封装基片的改进方法，该方法包括以下步骤：形成第一绝缘层；分别在第一绝缘层的上下表面上形成第一上下导线图形；分别在第一绝缘层的上下表面上层叠上下第二绝缘层；在上下第二绝缘层上形成第二上下导线图形；用导电金属介质电连接相应的第一和第二导线；在上下第二绝缘层上形成上下凹槽，以此通过上下第二绝缘层暴露第一上下导线。
根据用户的目的，在上下部分上形成第一导线后，可以进行电连接上下部分上的第一导线的步骤，且可在第一和第二绝缘层中形成至少一个穿透图形的对准孔。
为了实现上述目的，还提供一种改进的堆叠式半导体封装，该封装包括：具有上下表面的绝缘体；形成于绝缘体的上下表面上的一对上下凹槽，用于在其上安放半导体芯片；形成于上下凹槽中的多根第一导线；每根皆与相应的第一导线的一端相连的多根第二导线，它们在绝缘体的上下表面沿向外的方向延伸形成；分别安放于上下凹槽中的第一和第二半导体芯片；使第一和第二半导体芯片与上下表面上的第一导线电连接的第三导线；填充上下凹槽用以密封上下表面上的第一导线、半导体芯片及第三导线的模制树脂。
绝缘体由陶瓷或塑料构成，绝缘体至少中可形成一个对准孔。形成于上下凹槽及表面上的第一和第二导线穿通绝缘体，彼此电连接。
通过以下给出的详细说明和只是说明性的附图，可以更充分地理解本发明，但本发明并为限于此，其中：
图1是展示已有技术的树脂密封型半导体封装结构的纵剖图；
图2A至2C-2是根据本发明一个实施例的半导体封装基片的示图，其中图2A是平面图，图2B是底面图，图2C-1和2C-2是沿图2A中a-a线所取的纵剖图；
图3A和3B至3G是纵剖图；图3A-1和3A-2分别是展示根据本发明一个实施例制造半导体封装基片的方法的顶视图和底视图；
图4A至4D是展示根据本发明一个实施例制造堆叠式半导体封装的方法的纵剖图；
图5是展示根据本发明另一实施例的堆叠式半导体封装的纵剖图；
图6是展示根据本发明的堆叠式半导体封装的堆叠态的纵剖图。
下面将结合各附图详细说明本发明的半导体封装基片、其制造方法及用该基片的堆叠式半导体封装。
图2A至2C是根据本发明一个实施例的半导体封装基片的示图，其中图2A是顶视平面图，图2B中底视平面图，图2C-1和2C-2是沿图2A中a-a线所取的纵剖图。
如2A和2B所示，上下凹槽11a、11b形成于用作基片的平坦绝缘体10的上下表面中心部分。绝缘体10由陶瓷或塑料绝缘材料构成。
多根第一上导线12a以固定间隔设置于上凹槽11a的底面上，多根第一下导线12b以固定间隔设置于下凹槽11b的底面上，并与第一上导线12a对称。
这里，如图2C-1所示，可以由绝缘体10形成电绝缘的第一上下导线12a、12b，或如图2C-2所示，也可以通过形成穿通绝缘体10的通孔并用导电材料13填充该通孔，形成电连接的第一上下导线12a、12b。
而且，多根第二上导线14a设置于绝缘体10的上表面上，彼此间有一定间隔，且每根皆与相应第一上导线12a的外端相连，并延伸到绝缘体10上表面的外缘。多根第二下导线14b设置于绝缘体10的下表面上，彼此间有一定间隔，且每根皆与相应第一下导线12b的外端相连，并延伸到绝缘体10下表面的外缘，与第二上导线14a对称。
即，如图2A和2B所示，第一和第二上导线12a、14a与第一和第二下导线12b、14b分别对称地形成于绝缘体10的上下表面上。第一导线12a、12b和第二导线14a、14b由如铝、铅、铜或钨等高导电金属材料构成。
垂直穿透绝缘体10的对准孔15形成于绝缘体10的四个角上。形成对准孔为的是便于在堆叠本发明的半导体封装时使每个封装对准。
图3A和3B是纵剖图，图3A-1和3A-2分别是展示根据本发明一个实施例的制造半导体封装基片的方法的顶视图和底视图，下面结合这些附图详细说明本发明的制造基片的方法。
首先，如图3A、3A-1和3A-2所示，在第一绝缘层10a的上下表面上形成上下第一导线12a、12b的图形，绝缘层由陶瓷或塑料构成。用光刻法在第一绝缘层10a上形成导电金属层，由此形成第一上下导线12a、12b图形。参见图3A、3A-1和3A-2，图3A是根据本发明的基片的平面图，图3A-1和3A-2是根据本发明的基片的顶视图和底视图。关于上下第一导线12a、12b图形，在半导体芯片安装在绝缘层10a上下表面的中心部位时，在半导体芯片(未示出)的周边设置多根第一导线12a、12b，这些导线彼此间有预定间距，这是一种令人满意的方法，但并不限于此方法。
在形成上下第一导线12a、12b图形后，如图3B所示，形成垂直穿透绝缘层10a的通孔，并用铝、铅、铜或钨材料13填充该通孔，从而分别电连接第一上下导线12a、12b的相应图形。按通过通孔连接第一上下导线12a、12b的工艺，在形成第一上下导线12a、12b之前，应在将要形成图形的位置预先形成通孔，然后在其上形成第一上下导线12a、12b图形。因而，更容易通过通孔电连接第一上下导线12a、12b。但应注意地是，可以根据本发明基片的用途，电连接或电绝缘第一上下导线的相应图形，这取决于用户的实际应用。即，如果欲使第一上下导线12a、12b彼此电绝缘，则可以略去上述通过孔连接第一上下导线的工艺。
然后，如图3C所示，在形成有第一上下导线12a、12b图形的第一绝缘层10a的上下表面上，分别层叠形成第二上下绝缘层10b、10c。第二上下绝缘层10b、10c由与第一绝缘层10a相同的陶瓷或塑料构成。这里，在第一绝缘层10a和第二上下绝缘层10b、10c由陶瓷材料构成时，叠置绝缘层10a、10b、10c，并在约1000-1500℃对它们进行加热，使这些层熔化彼此接合，从而构成一个一体的绝缘体10。
接着，如图3D所示，分别在第二上下绝缘层10b、10c上形成第二上下导线14a、14b图形。用形成第一上下导线12a、12b时所用的光刻法在第二绝缘层10b、10c上形成导电金属层，由此形成第二上下导线14a、14b图形。第二上下导线14a、14b分别从相应的第一上下导线12a、12b形成并按一定间距排列的位置处延伸至第二上下绝缘体10b、10c的上下表面的外缘。
如图3E所示，分别电连接第一与第二上导线12a、14a，第一与第二下导线12b、14b。为了连接相应的第一和第二导线12a、12b、14a、14b，形成通孔，使第一上下导线12a、12b暴露于第二上下绝缘层10b、10c上，并用导电金属42填充通孔，从而分别电连接第一上下导线12a、12b与相应的第二上下导线14a、14b。
然后，如图3F所示，把第二上下绝缘层10b、10c的中心部位研磨到第一绝缘层10a于其上形成的表面，即研磨到暴露第一上下导线12a、12b为止。结果，形成上下凹槽11a、11b，它们的大小刚好合适于其中安装半导体芯片(未示出)。
然后，形成垂直穿透绝缘体10的对准孔15，从而堆叠第二下绝缘层10c、第一绝缘层10a、和第二上绝缘层10b，构成一体的绝缘体10。形成对准孔15为的是在多层堆叠根据本发明的基片时能对准每片基片。
图4A至4D是根据本发明一个实施例制造堆叠式半导体封装的方法的纵剖图，如图4A所示，首先，制备根据本发明的基片。该基片与示于图2C-1中的本发明基片相同。
然后，如图4B所示，利用接合部件20作介质，把半导体芯片30、31贴到基片的上下凹槽的底面上。如图4C所示，用第三导线40作介质，分别电连接上下半导体芯片30、31的焊盘与相应的第一上下导线12a、12b。然后，如图4D所示，模制树脂填充上下凹槽11a、11b，构成密封上下半导体芯片30，31、第三导线40、及第一上下导线12a，12b的环氧树脂模制体50，从而制成根据本发明的堆叠式半导体封装。
图4A至4D中，第三导线40是键合引线，但并不限于此，可以用焊料球作第三导线40的材料。
图5是展示根据本发明另一个实施例的堆叠式半导体封装的纵剖图，该封装是利用通过导电金属13电连接相应的第一上下导线12a、12b的基片制造的，该基片如图2C-1所示。
图6是展示根据本发明的多个堆叠式半导体封装的堆叠情况的纵剖图。如该图所示，导电焊膏60施加到半导体封装100的第二上下导线14a、14b上，然后用焊膏60作接合介质，层叠式地把半导体封装100、110、120连接在一起。在上述堆叠工艺中，半导体封装100、110、120通过形成于每块半导体封装100、110、120中的对准孔15彼此垂直对准，然后层叠式连接。在上述方法中，根据用户的要求，堆叠多个半导体封装，可以高集成度地形成根据本发明的堆叠式半导体封装。
如上所述，根据本发明，提供一种可以在单个封装中安装两块半导体芯片的半导体封装基片及其制造方法，堆叠利用该基片完成的半导体封装，可以实现高集成度，并可减薄封装。
尽管为了说明公开了本发明的优选实施例，但在不脱离本发明所附权利要求所限定的范围和精神实质的情况下，本领域的技术人员可以作出各种改型、附加和替换。

Claims (19)

1．一种半导体封装基片，包括：
有上下表面的绝缘体；
分别形成于绝缘体的上下表面上的上下凹槽；
分别形成于上下凹槽中的多根第一上下导线；及
每根皆与相应的各第一上下导线的一端相连的多根第二上下导线，这些导线分别从绝缘体的上下表面沿向外的方向延伸。
2．根据权利要求1的基片，其特征在于，绝缘体由陶瓷构成。
3．根据权利要求1的基片，其特征在于，绝缘体由塑料构成。
4．根据权利要求1的基片，其特征在于，绝缘体中至少形成有一个对准孔。
5．根据权利要求1的基片，其特征在于，相应的第一上下导线通过导电金属电连接。
6．根据权利要求1的基片，其特征在于，第一和第二导线由选自铝、铅、铜和钨中的一种金属构成。
7．一种制造半导体封装基片的方法，包括以下步骤：
形成第一绝缘层；
分别在第一绝缘层的上下表面上形成第一上下导线图形；
分别在第一绝缘层的上下表面上层叠上下第二绝缘层；
在上下第二绝缘层上形成第二上下导线图形；
用导电金属介质电连接相应的第一和第二导线；
在上下第二绝缘层上形成上下凹槽，以此通过上下第二绝缘层暴露第一上下导线。
8．根据权利要求7的方法，还包括电连接相应的第一上下导线的步骤。
9．根据权利要求7的方法，其特征在于，在具有第一绝缘层和第二上下绝缘层的绝缘体上形成穿透绝缘体的对准孔。
10．一种堆叠式半导体封装，包括：
绝缘体；
形成于绝缘体的上下表面上的上下凹槽；
形成于上下凹槽中的多根第一上下导线；
每根皆与相应的第一上下导线的一端相连的多根第二上下导线，它们在绝缘体的上下表面上沿向外的方向延伸；
分别安放于上下凹槽中的第一和第二半导体芯片；
使第一和第二半导体芯片与上下表面上的第一上下导线电连接的第三导线；及
填充上下凹槽用以密封第一上下导线、半导体芯片及第三导线的模制树脂。
11．根据权利要求10的封装，其特征在于，绝缘体由陶瓷构成。
12．根据权利要求10的封装，其特征在于，绝缘体由塑料构成。
13．根据权利要求10的封装，其特征在于，绝缘体中至少形成有一个对准孔。
14．根据权利要求10的封装，其特征在于，第一和第二导线由选自铝、铅、铜和钨中的一种金属构成。
15．根据权利要求10的封装，其特征在于，第一上下导线通过导电金属电连接。
16．根据权利要求15的封装，其特征在于，导电金属由选自铝、铅、铜和钨中的一种金属构成。
17．根据权利要求10的封装，其特征在于，每根第三导线由金属连线构成。
18．根据权利要求10的封装，其特征在于，每根第三导线由凸点构成。
19．根据权利要求10的封装，其特征在于，每根第三导线由焊料球构成。
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