CN103887343B - 薄膜晶体管及其制作方法、阵列基板和显示装置 - Google Patents
薄膜晶体管及其制作方法、阵列基板和显示装置 Download PDFInfo
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- 239000010409 thin film Substances 0.000 title claims abstract description 60
- 238000002360 preparation method Methods 0.000 title claims abstract description 20
- 230000004888 barrier function Effects 0.000 claims abstract description 142
- 238000005530 etching Methods 0.000 claims abstract description 115
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 45
- 239000001257 hydrogen Substances 0.000 claims abstract description 45
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 45
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims abstract description 39
- 229910000077 silane Inorganic materials 0.000 claims abstract description 39
- 238000009413 insulation Methods 0.000 claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 239000010410 layer Substances 0.000 claims description 214
- 238000000151 deposition Methods 0.000 claims description 28
- 239000007789 gas Substances 0.000 claims description 27
- 230000015572 biosynthetic process Effects 0.000 claims description 19
- 239000011241 protective layer Substances 0.000 claims description 18
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 12
- 229910052738 indium Inorganic materials 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 10
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 6
- 239000011787 zinc oxide Substances 0.000 claims description 6
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 5
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 claims description 2
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 claims description 2
- 230000003628 erosive effect Effects 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 58
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 30
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 abstract description 16
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 16
- 230000008021 deposition Effects 0.000 abstract description 15
- 229910044991 metal oxide Inorganic materials 0.000 abstract description 8
- 150000004706 metal oxides Chemical class 0.000 abstract description 8
- 238000004062 sedimentation Methods 0.000 description 13
- 238000006243 chemical reaction Methods 0.000 description 12
- 229910052760 oxygen Inorganic materials 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- -1 IGZO Chemical class 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- 229910052725 zinc Inorganic materials 0.000 description 5
- 239000011701 zinc Substances 0.000 description 5
- 229910016048 MoW Inorganic materials 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000000427 thin-film deposition Methods 0.000 description 3
- RPAJSBKBKSSMLJ-DFWYDOINSA-N (2s)-2-aminopentanedioic acid;hydrochloride Chemical compound Cl.OC(=O)[C@@H](N)CCC(O)=O RPAJSBKBKSSMLJ-DFWYDOINSA-N 0.000 description 2
- 229910003978 SiClx Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Abstract
本发明提供一种薄膜晶体管及其制作方法、阵列基板和显示装置,所述薄膜晶体管包括:基板、栅电极、有源层、源漏电极、像素电极及一个或多个绝缘层,其中,至少一个绝缘层包括底层绝缘层及上层绝缘层,所述上层绝缘层中的氢含量高于所述底层绝缘层中的氢含量。本发明采用双层刻蚀阻挡层工艺制作薄膜晶体管,有效地降低了刻蚀阻挡层的氧化硅薄膜中的氢含量,避免硅烷分解产生的氢离子与有源层中的金属氧化物反应,使氧化物薄膜晶体管保持较优的特性,并提高了刻蚀阻挡层的薄膜沉积速率。
Description
技术领域
本发明涉及液晶显示技术,具体涉及液晶显示技术中的薄膜晶体管(TFT,ThinFilm Transistor)技术。
背景技术
图1示出了现有技术中氧化物薄膜晶体管的结构,如图1所示,现有技术中氧化物薄膜晶体管从下至上依次包括基板10、栅电极11、栅绝缘层12、有源层13、刻蚀阻挡层14、源漏电极15、保护层16及像素电极17。图2示出了现有技术中氧化物薄膜晶体管的制作方法,如图2所示,现有的制作方法中,首先在基板10上形成栅电极11(如图2中1a所示),接着形成栅绝缘层12,覆盖基板10及栅电极11(如图2中1b所示),然后在栅绝缘层12对应栅电极11的上方形成有源层13(如图2中1c所示),该有源层13由半导体氧化物(如铟镓锌氧化物(IGZO))制成,接着在有源层13上方形成刻蚀阻挡层14(如图2中1d所示),然后在刻蚀阻挡层14上方形成源漏电极15(如图2中1e所示),接着形成保护层16,覆盖源漏电极15、刻蚀阻挡层14及栅绝缘层12(如图2中1f所示),最后在源漏电极15和保护层16上方形成像素电极17(如图2中1g所示)。
与非晶硅(a-Si)薄膜晶体管的工艺流程比较,氧化物薄膜晶体管的制作流程增加了刻蚀阻挡层工艺(即如图2中1d所示的步骤),且氧化物薄膜的特性受界面特性影响比较大,特别是刻蚀阻挡层的薄膜沉积工艺,要求刻蚀阻挡层工艺中制作的氧化硅薄膜保持较低的氢含量,一般要求氧化硅薄膜中的氢含量低于6%(非晶薄膜晶体管工艺中采用的氮化硅薄膜的氢含量在20%左右)。刻蚀阻挡层工艺的目的,一方面在进行源漏电极的刻蚀工艺时,避免刻蚀液对金属的腐蚀;另一方面,刻蚀阻挡层工艺通常使用氧化硅材料,为保证氧化硅薄膜保持较低的氢含量,目前通常采用等离子增强型化学气相沉积法(PECVD)沉积氧化硅薄膜,采用该方法沉积氧化硅薄膜时,硅烷分解产生的氢离子易与有源层中的金属氧化物如IGZO中的In、Zn、O等反应,从而影响IGZO薄膜的特性,对此,目前通常采用的方法是降低沉积温度至200℃左右,但该方法带来的不利因素是反应气体流量恒定时,使得沉积形成的氧化硅薄膜中的氢含量增加,薄膜的稳定性变差,另外也使薄膜的沉积速率降低。
因此,如何改进氧化物薄膜晶体管的结构及制作工艺,降低刻蚀阻挡层中的氧化硅薄膜的氢含量,使氧化物薄膜晶体管保持较优的特性,并提高刻蚀阻挡层薄膜的沉积速率成为本领域亟待解决的问题。
发明内容
有鉴于此,本发明的主要目的在于提供一种薄膜晶体管及其制作方法、阵列基板和显示装置,采用双层刻蚀阻挡层工艺,降低刻蚀阻挡层中的氧化硅薄膜的氢含量,避免硅烷分解产生的氢离子与有源层中的金属氧化物反应,使氧化物薄膜晶体管保持较优的特性,并提高刻蚀阻挡层薄膜的沉积速率。
为达到上述目的,本发明的技术方案是这样实现的:
本发明提供的一种薄膜晶体管,包括:基板、栅电极、有源层、源漏电极、像素电极及一个或多个绝缘层,至少一个绝缘层包括底层绝缘层及上层绝缘层,所述上层绝缘层中的氢含量高于所述底层绝缘层中的氢含量。
具体的,所述薄膜晶体管为氧化物薄膜晶体管,所述绝缘层包括:栅绝缘层、刻蚀阻挡层及保护层,所述刻蚀阻挡层包括底层刻蚀阻挡层及上层刻蚀阻挡层,所述上层刻蚀阻挡层中的氢含量高于所述底层刻蚀阻挡层中的氢含量。
优选地,所述上层刻蚀阻挡层的氢含量为5%~10%,所述下层刻蚀阻挡层的氢含量为1%~5%。
具体的,所述氧化物薄膜晶体管的具体结构包括:
栅电极,形成于基板的上方;
栅绝缘层,覆盖于基板和栅电极的上方;
有源层,形成于栅绝缘层对应栅电极的上方;
底层刻蚀阻挡层,形成于有源层的上方;
上层刻蚀阻挡层,形成于底层刻蚀阻挡层的上方;
源漏电极,形成于上层刻蚀阻挡层的上方;
保护层,覆盖于栅绝缘层、源漏电极及上层刻蚀阻挡层的上方;
像素电极,形成于源漏电极和保护层的上方。
优选地,所述底层刻蚀阻挡层的厚度为200-1000埃,所述上层刻蚀阻挡层的厚度为1000-1500埃。
优选地,所述有源层由铟镓锌氧化物半导体或铟锌氧化物半导体制成。
优选地,所述有源层通过磁控溅射的方式沉积。
本发明还提供一种阵列基板,包括上述所述的薄膜晶体管。
本发明还提供一种显示装置,包括上述的阵列基板。
本发明还提供一种薄膜晶体管的制作方法,包括:在基板上形成栅电极、有源层、源漏电极、一个或多个绝缘层及像素电极,至少一个绝缘层在形成时,依次形成底层绝缘层及上层绝缘层,使所述上层绝缘层中的氢含量高于所述底层绝缘层中的氢含量。
具体的,所述薄膜晶体管为氧化物薄膜晶体管,所述绝缘层包括刻蚀阻挡层,所述制作方法包括:依次在基板上形成栅电极、栅绝缘层、有源层、刻蚀阻挡层、源漏电极、保护层及像素电极,形成所述刻蚀阻挡层时,依次形成底层刻蚀阻挡层及上层刻蚀阻挡层,使所述上层刻蚀阻挡层中的氢含量高于所述底层刻蚀阻挡层中的氢含量。
具体的,所述方法包括:
步骤a、在基板上形成栅电极;
步骤b、形成栅绝缘层,覆盖于基板和栅电极上方;
步骤c、在栅绝缘层对应栅电极的上方形成有源层;
步骤d、在有源层上方形成底层刻蚀阻挡层;
步骤e、在底层刻蚀阻挡层上方形成上层刻蚀阻挡层;
步骤f、在上层刻蚀阻挡层上方形成源漏电极;
步骤g、形成保护层,覆盖于栅绝缘层、源漏电极及上层刻蚀阻挡层上方;
步骤h、在源漏电极和保护层上方形成像素电极。
具体的,所述步骤d中,所述底层刻蚀阻挡层在200-300℃、300-800sccm的硅烷气体流量下沉积;所述步骤e中,所述上层刻蚀阻挡层在240-340℃、600-1200sccm的硅烷气体流量下沉积。
具体的,所述步骤d中,沉积所述底层刻蚀阻挡层的厚度为200-1000埃;所述步骤e中,沉积所述上层刻蚀阻挡层的厚度为1000-1500埃。
具体的,所述步骤c中,采用铟镓锌氧化物半导体或铟锌氧化物半导体制成有源层。
具体的,所述步骤c中,通过磁控溅射的方式沉积所述有源层。
与现有技术相比,本发明提供的薄膜晶体管采用双层结构制作刻蚀阻挡层,具有以下优点:一、在底层刻蚀阻挡层中采用比现有技术稍低的沉积温度及低硅烷气体流量的工艺,虽然采用了比现有技术更低的温度,但由于采用低硅烷气体流量,硅烷分解更充分,另外由于相对于上层刻蚀阻挡层,底层刻蚀阻挡层的流量较低,使得底层硅烷分解产生的氢离子的浓度与上层绝缘层相比更低,这样,有利于进一步降低刻蚀阻挡层中的氢含量;二、沉积上层刻蚀阻挡层时,形成的底层刻蚀阻挡层可阻挡产生的氢离子与有源层中的金属氧化物发生反应,从而可在高温及高硅烷气体流量的条件下沉积上层刻蚀阻挡层,有效地降低了刻蚀阻挡层的氧化硅薄膜中的氢含量,避免硅烷分解产生的氢离子与有源层中的金属氧化物反应,并提高了刻蚀阻挡层的薄膜沉积速率。
附图说明
图1为现有技术中氧化物薄膜晶体管的结构示意图;
图2为现有技术中氧化物薄膜晶体管的制作流程示意图;
图3为本发明的氧化物薄膜晶体管的结构示意图;
图4为本发明的氧化物薄膜晶体管的制作流程示意图。
附图标记说明
10、20 基板
11、21 栅电极
12、22 栅绝缘层
13、23 有源层
14 刻蚀阻挡层
24a 底层刻蚀阻挡层
24b 上层刻蚀阻挡层
15、25 源漏电极
16、26 保护层
17、27 像素电极
具体实施方式
本发明的基本思想为:将薄膜晶体管的至少一个绝缘层采用双层结构工艺制作,即分别制作底层绝缘层及上层绝缘层,从而可根据绝缘层薄膜的性质,分别采用不同的工艺条件制作底层绝缘层及上层绝缘层,同时将底层绝缘层作为阻挡层制作上层绝缘层,使上层绝缘层可在相对于底层绝缘层较高的温度及气体流量的条件下制作,提高了绝缘层薄膜的特性及薄膜沉积速率。
以下以氧化物薄膜晶体管中的刻蚀阻挡层为例,结合具体实施例及附图详细说明本发明的薄膜晶体管及其制作方法。
图3示出了本发明的氧化物薄膜晶体管的结构,如图3所示,本发明的氧化物薄膜晶体管包括:基板20、栅电极21、栅绝缘层22、有源层23、刻蚀阻挡层、源漏电极25、保护层26及像素电极27,其中,所述刻蚀阻挡层包括底层刻蚀阻挡层24a及上层刻蚀阻挡层24b,其中上层刻蚀阻挡层24b中的氢含量高于底层刻蚀阻挡层24a中的氢含量。
由于在制备过程中刻蚀阻挡层中势必会掺入氢离子,而如果将氢含量都维持在较低的水平下,则需降低硅烷的流速,但这样会影响薄膜沉积的速率,如果保持速率,则薄膜中的氢含量又会提高,因此制备两层刻蚀阻挡层,上层氢含量较高,下层氢含量较少,在不影响沉积速率的前提下,降低了刻蚀阻挡层中氢离子对氧化物半导体有源层的影响。
优选地,上层刻蚀阻挡层24b的氢含量具体可以为5%~10%,下层刻蚀阻挡层24a的氢含量具体可以为1%~5%。
而在优选的氢含量的条件下,制备出的氧化物薄膜晶体管的性能更好,同时,沉积速率也可以达到优化。
具体地,栅电极21,形成于基板20上方;栅绝缘层22,覆盖于基板20和栅电极21的上方;有源层23,形成于栅绝缘层22对应栅电极21的上方;底层刻蚀阻挡层24a,形成于有源层23的上方;上层刻蚀阻挡层24b,形成于底层刻蚀阻挡层24a的上方;源漏电极25,形成于上层刻蚀阻挡层24b的上方;保护层26,覆盖于栅绝缘层22、源漏电极25及上层刻蚀阻挡层24b的上方;像素电极27,形成于源漏电极25和保护层26的上方。
为改善氧化物薄膜晶体管的特性,本发明采用设置双层刻蚀阻挡层的结构,即分别设置底层刻蚀阻挡层与上层刻蚀阻挡层。在形成底层刻蚀阻挡层时,采用较低的沉积温度及较低的硅烷气体流量,以使反应气氛中硅烷分解产生的氢离子含量降低,避免由于氢离子与有源层中的金属氧化物如IGZO中的In、Zn、O等发生反应而对氧化物薄膜晶体管的特性产生影响;而在形成上层刻蚀阻挡层时,采用较高的沉积温度及较高的硅烷气体流量,此时由于沉积温度较高,反应气氛中硅烷分解得较充分,使得形成的氧化硅薄膜中的氢含量越低,另外,虽然设置的较高的沉积温度及硅烷气体流量,使得硅烷分解产生的氢离子浓度较高,但由于底层刻蚀阻挡层阻止了有源层中的金属氧化物如IGZO与氢离子的接触,避免了氢离子与金属氧化物如IGZO中的In、Zn、O等发生反应,从而并不会对氧化物薄膜晶体管的特性产生影响,同时由此得到的上层刻蚀阻挡层中的氢含量高于底层刻蚀阻挡层中的氢含量,因此,有效地降低了氧化硅薄膜中的氢含量,使氧化物薄膜晶体管保持较优的特性,提高了氧化物薄膜晶体管的稳定性,并提高了阻挡层薄膜的沉积速率。
这里需要说明的是,在沉积刻蚀阻挡层时,反应的温度及反应气氛中硅烷气体流量均影响反应气氛中硅烷分解产生的氢离子含量,反应温度恒定时,硅烷气体流量越低,硅烷分解得越充分,形成的氧化硅薄膜中氢含量越低,但沉积速率也会随之降低,反之,反应温度恒定时,硅烷气体流量设置较高,虽有助于提高沉积速率,但也容易导致硅烷气体分解不充分,从而不利于降低氧化硅薄膜中的氢含量,这里需要根据设置的温度及实际生产要求恰当地确定硅烷气体流量;另外,硅烷气体流量恒定时,温度越高,硅烷分解得越充分,分解产生的氢离子越多,沉积速率越快,但也容易导致产生的氢离子与金属氧化物如IGZO中的In、Zn、O等发生反应,从而对氧化物薄膜晶体管的特性产生影响,因此,应当综合考虑沉积速率及薄膜特性,恰当地设置反应的温度及反应气氛中硅烷气体流量。本发明在综合考虑沉积速率及薄膜特性的基础上,设置底层刻蚀阻挡层的沉积温度为200-300℃,优选250℃,硅烷气体流量为300-800sccm(标准状况下毫升每分钟),优选600sccm,沉积功率为6000W,使反应气氛中硅烷分解产生的氢离子含量降低,避免氢离子与有源层中的金属氧化物如IGZO中的In、Zn、O等发生反应,而对于上层刻蚀阻挡层,设置沉积温度为240-340℃,优选290℃,以使反应气氛中硅烷分解得更充分,降低氧化硅薄膜中的氢含量,而硅烷气体流量可根据实际生产要求设置,较高的硅烷气体流量有助于提高薄膜的沉积速率,为提高薄膜的沉积速率,本发明优选硅烷气体流量为600-1200sccm,优选900sccm,沉积功率为3500W。本发明通过上述工艺条件的设置,可使底层刻蚀阻挡层中的氧化硅薄膜中的氢含量大约降低至3%,上层刻蚀阻挡层中的氧化硅薄膜中的氢含量大约降低至5%(采用现有技术制作的氧化硅薄膜中的氢含量约为6%)。
另外,底层刻蚀阻挡层与上层刻蚀阻挡层的厚度的设置也会影响刻蚀阻挡层薄膜总的沉积速率及薄膜特性,本发明综合考虑薄膜沉积速率及薄膜特性,优选,底层刻蚀阻挡层的厚度为200-1000埃,优选500埃,所述上层刻蚀阻挡层的厚度为1000-1500埃,优选1500埃。
另外,为提高氧化硅与光刻胶的粘合性,通常在上层刻蚀阻挡层和光刻胶之间增加一层粘附层(图中未示出),该粘附层通常为一层几百埃的氮化硅薄膜,本发明中粘附层的结构与现有技术相同,此处不再赘述。
本发明的氧化物薄膜晶体管中各层薄膜可采用现有的制作方法及材料制成,如栅电极可为AlNd、Al、Cu、Mo、MoW或Cr的单层膜,或者可为由AlNd、Al、Cu、Mo、MoW或Cr任意组合所构成的复合膜;栅绝缘层可为氮化硅(SiNx)或氧化硅(Si02)薄膜;而有源层可采用磁控溅射的方式利用铟镓锌氧化物(IGZO)半导体或铟锌氧化物((IZO)半导体制成。
为实现上述氧化物薄膜晶体管,本发明进一步提供一种氧化物薄膜晶体管的制作方法,如图4所示,本发明的制作方法包括以下步骤:
步骤2a、在基板20上形成栅电极21;
步骤2b、形成栅绝缘层22,覆盖于基板20和栅电极21上方;
步骤2c、在栅绝缘层22对应栅电极21的上方形成有源层23;
步骤2d、在有源层23上方形成底层刻蚀阻挡层24a;
步骤2e、在底层刻蚀阻挡层24a上方形成上层刻蚀阻挡层24b;
步骤2f、在上层刻蚀阻挡层24b上方形成源漏电极25;
步骤2g、形成保护层26,覆盖于栅绝缘层22、源漏电极25及上层刻蚀阻挡层24b上方;
步骤2h、在源漏电极25和保护层26上方形成像素电极27。
上述各层薄膜均可采用现有的制作方法及材料制成,具体地,在步骤2a中,栅电极可采用AlNd、Al、Cu、Mo、MoW或Cr的单层膜,或者由AlNd、Al、Cu、Mo、MoW或Cr任意组合所构成的复合膜制成;在步骤2b中,栅绝缘层可为氮化硅(SiNx)或氧化硅(SiO2)薄膜;而在步骤2c中,有源层可采用磁控溅射的方式利用铟镓锌氧化物(IGZO)半导体或铟锌氧化物((IZO)半导体制成。
另外,本发明综合考虑沉积温度、硅烷气体流量及薄膜沉积厚度对氧化物薄膜晶体管的特性及沉积速率的影响,优选在步骤2d中,设置底层刻蚀阻挡层的沉积温度为200-300℃,优选250℃,硅烷气体流量为300-800sccm,优选600sccm,沉积功率为6000w,沉积厚度为200-1000埃,优选500埃;优选在步骤2e中,设置上层刻蚀阻挡层的沉积温度为240-340℃,优选290℃,硅烷气体流量为600-1200sccm,优选900sccm,沉积功率为3500W,沉积厚度为1000-1500埃,优选1500埃。
另外,为提高氧化硅与光刻胶的粘合性,通常在上层刻蚀阻挡层和光刻胶之间增加一层粘附层(图中未示出),该粘附层通常为一层几百埃的氮化硅薄膜,本发明中粘附层的制作方法均与现有技术相同,此处不再赘述。
由上可知,本发明采用双层刻蚀阻挡层工艺制作氧化物薄膜晶体管,在底层刻蚀阻挡层及上层刻蚀阻挡层分别采用不同的沉积温度及硅烷气体流量,有效地降低了刻蚀阻挡层的氧化硅薄膜中的氢含量,避免由于硅烷分解产生的氢离子与有源层中的金属氧化物反应而影响氧化物薄膜晶体管的特性,使氧化物薄膜晶体管保持较优的特性,并提高了刻蚀阻挡层薄膜的沉积速率。
以上以氧化物薄膜晶体管中的阻挡层为例,说明了本发明的薄膜晶体管及其制作方法。应当注意,上述提到的工艺参数包括温度、气体流量及沉积功率、薄膜厚度等均为本发明优选的工艺参数,本发明并不局限于此,本领域技术人员可根据实际需要对上述工艺参数进行调整。
另外,本发明采用双层结构制作绝缘层的原理并不仅限于氧化物薄膜晶体管中以氧化硅为材料的刻蚀阻挡层,也适用于氧化物薄膜晶体管中以氧化硅为材料的保护层,同时也适用于氧化物薄膜晶体管或者非晶硅薄膜晶体管中以氮化硅为材料的阻挡层或者保护层,其涉及的具体原理与上述作氧化物薄膜晶体管中的阻挡层相似,此处不再赘述。
本发明还提供一种阵列基板,包括上面所述的薄膜晶体管。
本发明还提供一种显示装置,包括上述的阵列基板。具体的,显示装置可以为液晶显示器,OLED显示器等。
以上所述,仅为本发明的较佳实施例而已,并非用于限定本发明的保护范围。
Claims (5)
1.一种薄膜晶体管的制作方法,所述薄膜晶体管为氧化物薄膜晶体管,所述制作方法包括:依次在基板上形成栅电极、栅绝缘层、有源层、刻蚀阻挡层、源漏电极、保护层及像素电极,形成所述刻蚀阻挡层时,依次形成底层刻蚀阻挡层及上层刻蚀阻挡层,使所述上层刻蚀阻挡层中的氢含量高于所述底层刻蚀阻挡层中的氢含量;且
所述上层刻蚀阻挡层和所述底层刻蚀阻挡层由硅烷沉积形成;
其中,所述底层刻蚀阻挡层在200-250℃、300-600sccm的硅烷气体流量下沉积,所述上层刻蚀阻挡层在290-340℃、900-1200sccm的硅烷气体流量下沉积。
2.如权利要求1所述的制作方法,其特征在于,所述方法包括:
步骤a、在基板上形成栅电极;
步骤b、形成栅绝缘层,覆盖于基板和栅电极上方;
步骤c、在栅绝缘层对应栅电极的上方形成有源层;
步骤d、在有源层上方形成底层刻蚀阻挡层;
步骤e、在底层刻蚀阻挡层上方形成上层刻蚀阻挡层;
步骤f、在上层刻蚀阻挡层上方形成源漏电极;
步骤g、形成保护层,覆盖于栅绝缘层、源漏电极及上层刻蚀阻挡层上方;
步骤h、在源漏电极和保护层上方形成像素电极。
3.如权利要求2所述的制作方法,其特征在于,所述步骤d中,沉积所述底层刻蚀阻挡层的厚度为200-1000埃;所述步骤e中,沉积所述上层刻蚀阻挡层的厚度为1000-1500埃。
4.如权利要求2所述的制作方法,其特征在于,所述步骤c中,采用铟镓锌氧化物半导体或铟锌氧化物半导体制成有源层。
5.如权利要求2所述的制作方法,其特征在于,所述步骤c中,通过磁控溅射的方式沉积所述有源层。
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