CN102683329B - 半导体封装件及其制法 - Google Patents

半导体封装件及其制法 Download PDF

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CN102683329B
CN102683329B CN201110084587.5A CN201110084587A CN102683329B CN 102683329 B CN102683329 B CN 102683329B CN 201110084587 A CN201110084587 A CN 201110084587A CN 102683329 B CN102683329 B CN 102683329B
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substrate
semiconductor package
packing colloid
semiconductor element
semiconductor
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CN102683329A (zh
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方颢儒
钟兴隆
张卓兴
蔡宗贤
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Siliconware Precision Industries Co Ltd
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Abstract

一种半导体封装件及其制法。该半导体封装件包括：表面具有多个半导体元件的基板、覆盖在该基板与各该半导体元件上的封装胶体、以及形成在该封装胶体的外露表面上的金属层，该封装胶体具有沟槽以划分多个封装单元，令每一个封装单元具有一个半导体元件，且该金属层还形成在该沟槽中，使每一个半导体元件的外侧封装胶体上均包覆有金属层，可避免各该半导体元件之间相互电磁波干扰。本发明还提供该半导体封装件的制法。

Description

半导体封装件及其制法
技术领域
本发明有关一种半导体封装件，尤指一种具有防内部电子元件相互电磁波干扰功能的半导体封装件及其制法。
背景技术
随着半导体技术的演进，半导体产品已开发出不同形状的封装产品，而为提升电性品质，多种半导体产品具有屏蔽的功能，以防止电磁干扰(Electromagnetic Interference，EMI)产生，如第5557142号美国专利。
第7125744B2号美国专利提供一种避免EMI的射频(Radiofrequency，RF)模组的方式。如图1A及图1B所示，该第7125744B2号美国专利所揭示的射频模组1将多个半导体元件11a，11b电性连接在一基板10上，再以如环氧树脂的封装胶体12包覆各该半导体元件11a，11b及基板10，并于该封装胶体12上罩设一金属薄膜13。该射频模组1由该封装胶体12保护该半导体元件11a，11b及基板10，并避免外界水气或污染物的侵害，且由该金属薄膜13保护该些半导体元件11a，11b免受外界EMI影响。
第7701040B2号美国专利揭示一种多个模组相互堆叠的封装件。如图2所示，该第7701040B2号美国专利所揭示的射频模组2于外围包覆有屏障(shielding)层23，以避免该射频模组2与其他模组产生相互电磁干扰。
但是，现有技术中的射频模组1，2的外围虽可由包覆金属材以达到避免EMI的目的，却无法避免其内部各该半导体元件11a，11b之间的电磁波干扰(EMI)，导致讯号容易发生错误。
因此，如何提供一种能避免射频模组内部的电子元件相互电磁波干扰的半导体封装件，实为一重要课题。
发明内容
鉴于上述现有技术的种种缺失，本发明的一目的在提供一种半导体封装件及其制法，以避免各该半导体元件之间相互电磁波干扰。
为达上述及其他目的，本发明提供一种半导体封装件，其主要包括一具有相对的第一表面及第二表面的基板、接置且电性连接于该基板的第一表面上的多个半导体元件、覆盖于该基板的第一表面与各该半导体元件上的封装胶体、以及形成于该基板与封装胶体上的金属层；其中，该封装胶体具有沟槽，以于该基板上划分多个封装单元，令每一个该封装单元具有至少一个该半导体元件，且该金属层复形成于该沟槽中，以包覆各该封装单元的周围，且令该基板的第二表面外露该金属层。
由上可知，本发明的半导体封装件，由沟槽的设计，使基板上划分出多个封装单元，令每一封装单元之间由金属层作包覆，使各该半导体元件之间不会相互受电磁波干扰。
另外，本发明还提供一种据上述结构的半导体封装件的制法。
附图说明
图1A及图1B为现有技术中射频模组的示意图，其中，图1A为立体图，图1B为剖面图。
图2为为现有技术中堆叠多个模组的封装件的剖面图。
图3A至图3E为本发明半导体封装件的制法的剖面示意图；其中，图3A’为图3A的另一实施例，图3D’为图3D的立体图。
主要元件符号说明
1、2              射频模组
10                基板
11a，11b，31，31’半导体元件
12，32            封装胶体
13                金属薄膜
23                屏障层
3                 半导体封装件
3’               封装单元
3a            承载件
3b            封装件预制品
30            基板
30a           上表面
30b           下表面
30c           侧表面
300           电性接触垫
310           焊线
310’         焊球
32a           顶面
32b           底面
32c           侧面
320           沟槽
33            金属层
L             预定切割线。
具体实施方式
以下由特定的具体实施例说明本发明的实施方式，熟悉此技术的人士可由本说明书所揭示的内容轻易地了解本发明的其他优点及功效。
须知，本说明书所附图式所绘示的结构、比例、大小等，均仅用以配合说明书所揭示的内容，以供熟悉此技术的人士的了解与阅读，并非用以限定本发明可实施的限定条件，故不具技术上的实质意义，任何结构的修饰、比例关系的改变或大小的调整，在不影响本发明所能产生的功效及所能达成的目的下，均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时，本说明书中所引用的如“上”、“一”、“二”及“下”等的用语，也仅是为便于叙述的明了，而非用以限定本发明可实施的范围，其相对关系的改变或调整，在无实质变更技术内容下，当亦视为本发明可实施的范畴。
请参阅图3A至图3E，为本发明半导体封装件的制法的示意图。于本实施例中，所述半导体封装件3可发出电磁波者，例如为射频(Radiofrequency，RF)模组。
如图3A及图3A’所示，提供一承载件3a，具有多个基板30(如图中的虚线作区分)，且各该基板30具有上表面(定义为第一表面)30a及下表面(定义为第二表面)30b；接着，接置多个半导体元件31于承载件3a上，亦即各该基板30的上表面30a上。
所述基板30的上表面30a及下表面30b上均具有多个电性接触垫300。
所述半导体元件31为射频芯片，例如：蓝芽芯片或Wi-Fi(Wireless Fidelity)芯片。
再者，如图3A所示，该半导体元件31以打线方式，即由焊线310，对应电性连接该基板30上表面30a上的电性接触垫300；或如图3A’所示，该半导体元件31’以覆晶方式，即由焊球310’，对应电性连接至该基板30上表面30a上的电性接触垫300。
如图3B所示，接续图3A的制程，将封装胶体32覆盖于该承载件3a(或基板30)的上表面30a及各该半导体元件31(含该焊线310)上。
所述封装胶体32具有外露的顶面32a及结合至该基板30上表面30a的底面32b。
如图3C所示，沿着各该基板30边缘的预定切割线L(如图3B所示)，切割该封装胶体32及该承载件3a，以形成多个分离的封装件预制品3b。该封装件预制品3b包括具有侧表面30c、上表面30a及下表面30b的基板30、接置于该基板30上表面30a上的多个半导体元件31、及覆盖于该基板30上表面30a与各该半导体元件31上的封装胶体32，且该封装胶体32经切割而具有侧面32c。
如图3D及图3D’所示，以镭射烧灼或机械切割，例如刀具切割方式，形成沟槽320于该封装件预制品3b的封装胶体32上，以于该基板30的上表面30a上划分多个封装单元3’，令每一个封装单元3’仅具有一个半导体元件31，但非指不可包括其他无影响电磁波干扰的电子元件。
所述沟槽320贯穿该封装胶体32以连通该封装胶体32的顶面32a与该基板30的部分上表面30a。
再者，于本实施例中，其中一个半导体元件31为蓝芽芯片，而另一个半导体元件31为Wi-Fi芯片。
如图3E所示，以例如化学镀膜的方式，如溅镀(sputtering)，形成金属层33于该沟槽320中、该封装胶体32的顶面32a与侧面32c上、该基极30的侧表面30c及其外露的上表面30a上，以包覆各该封装单元3’的周围，且令该基板的第二表面外露该金属层，俾形成该半导体封装件3，并由该金属层33作为电磁波屏障(EMI Shielding)，以防止各该半导体元件31之间相互电磁波干扰。也可以由涂布(coating)与回焊(reflow)方式形成该金属层33。
于本实施例中，由该金属层33，以防止蓝芽芯片与Wi-Fi芯片之间的讯号相互干扰。
再者，形成该金属层33的材质如铜(Cu)、镍(Ni)、铁(Fe)、铝(Al)、不锈钢(Sus)等。
因此，本发明的半导体封装件3及其制法，由该沟槽320的设计，使该半导体封装件3上划分出多个封装单元3’，令每一封装单元3’之间由金属层33的包覆，以避免该半导体封装件3上的各该半导体元件31之间发生电磁波相互干扰的问题。
上述实施例用以例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此项技术的人士均可在不违背本发明的精神及范畴下，对上述实施例进行修改。因此本发明的权利保护范围，应如本发明的权利要求所列。

Claims (14)

1.一种半导体封装件，其特征在于，包括：
基板，具有相对的第一表面及第二表面；
多个半导体元件，接置且电性连接于该基板的第一表面上；
封装胶体，覆盖于该基板的第一表面与各该半导体元件上，且该封装胶体具有沟槽，以于该基板上划分多个封装单元，令每一个该封装单元具有至少一个该半导体元件；以及
金属层，形成于该基板与封装胶体上、及该沟槽中，以包覆各该封装单元的周围，且令该基板的第二表面外露该金属层。
2.如权利要求1所述的半导体封装件，其特征在于，该半导体封装件为射频模组。
3.如权利要求1所述的半导体封装件，其特征在于，该半导体元件为射频芯片。
4.如权利要求1所述的半导体封装件，其特征在于，该封装胶体具有外露的顶面与侧面、及结合至该基板的第一表面的底面，且该沟槽贯穿该封装胶体以连通该顶面与该基板的第一表面。
5.如权利要求4所述的半导体封装件，其特征在于，该金属层形成于该封装胶体的顶面与侧面上。
6.如权利要求1所述的半导体封装件，其特征在于，该金属层选自铜、镍、铁、铝或不锈钢材质。
7.一种半导体封装件的制法，其特征在于，包括：
准备一封装件预制品，包含：
基板，具有相对的第一表面及第二表面；
多个半导体元件，接置且电性连接于该基板的第一表面上；及
封装胶体，覆盖于该基板的第一表面与各该半导体元件上；
形成沟槽于该封装件预制品的封装胶体上，以于该基板上划分多个封装单元，令每一个该封装单元具有至少一个该半导体元件；以及
形成金属层于该基板与封装胶体上、及该沟槽中，以包覆各该封装单元的周围，且令该基板的第二表面外露该金属层。
8.如权利要求7所述的半导体封装件的制法，其特征在于，该半导体封装件为射频模组。
9.如权利要求7所述的半导体封装件的制法，其特征在于，该封装件预制品的制程，包括：
提供一承载件；
接置各该半导体元件于该承载件上；
将该封装胶体覆盖于该承载件上，以包覆各该半导体元件；以及
切割该封装胶体及承载件，以形成多个分离的该封装件预制品，其中，经切割的承载件为该封装件预制品的基板。
10.如权利要求7所述的半导体封装件的制法，其特征在于，该半导体元件为射频芯片。
11.如权利要求7所述的半导体封装件的制法，其特征在于，该封装胶体具有外露的顶面与侧面、及结合至该基板的第一表面的底面，且该沟槽贯穿该封装胶体以连通该顶面与该基板的第一表面。
12.如权利要求11所述的半导体封装件的制法，其特征在于，该金属层形成于该封装胶体的顶面与侧面上。
13.如权利要求7所述的半导体封装件的制法，其特征在于，形成该沟槽的方式为镭射或机械切割。
14.如权利要求7所述的半导体封装件的制法，其特征在于，该金属层选自铜、镍、铁、铝或不锈钢材质。
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