CN105097784A - 半导体封装件及其制法 - Google Patents
半导体封装件及其制法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 title 1
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- 238000012856 packing Methods 0.000 claims description 27
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- 239000002184 metal Substances 0.000 claims description 22
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 11
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 9
- 239000010949 copper Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
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- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 229910052742 iron Inorganic materials 0.000 claims description 4
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- 231100000719 pollutant Toxicity 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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Abstract
一种半导体封装件及其制法,该半导体封装件包括:基板、设于该基板上的多个半导体元件、位于各该半导体元件之间的至少一屏蔽件、以及包覆各该半导体元件与该屏蔽件的封装胶体,藉由该屏蔽件的设计,以避免各该半导体元件之间相互电磁波干扰。
Description
技术领域
本发明涉及一种半导体封装件,尤指一种具防内部电子元件相互电磁波干扰的半导体封装件及其制法。
背景技术
随着半导体技术的演进,半导体产品已开发出不同封装产品型态,而为提升电性品质,多种半导体产品具有屏蔽的功能,以防止电磁干扰(ElectromagneticInterference,EMI)产生。
现有避免EMI的射频(Radiofrequency,RF)模组,如图1A至图1C所示,该射频模组1用于将多个射频晶片11a,11b与非射频式电子元件11电性连接在一基板10上,再以如环氧树脂的封装胶体13包覆各该射频晶片11a,11b与该非射频式电子元件11,并于该封装胶体13上形成一金属薄膜14。该射频模组1藉由该封装胶体13保护该射频晶片11a,11b、非射频式电子元件11及基板10,并避免外界水气或污染物的侵害,且藉由该金属薄膜14保护该些射频晶片11a,11b免受外界EMI影响。
然而,现有射频模组1的外围虽可藉由包覆该金属薄膜14以达到避免EMI的目的,但却无法避免其内部各该射频晶片11a,11b之间的电磁波干扰(EMI),导致讯号容易发生错误。
因此,如何提供一种能避免射频模组内部的电子元件相互电磁波干扰的半导体封装件,实为一重要课题。
发明内容
为克服现有技术的种种缺失,本发明的目的为提供一种半导体封装件及其制法,以避免各该半导体元件之间相互电磁波干扰。
本发明的半导体封装件,包括:基板;多个半导体元件,其设于该基板上;至少一屏蔽件,其立设于该基板上并位于各该半导体元件之间;以及封装胶体,其设于该基板上,以包覆各该半导体元件与该屏蔽件。
本发明还提供一种半导体封装件的制法,包括:设置多个半导体元件与至少一屏蔽件于一基板上,且该屏蔽件位于各该半导体元件之间;以及形成封装胶体于该基板上,以包覆各该半导体元件与该屏蔽件。
前述的半导体封装件及其制法中,该些半导体元件的至少一者为射频晶片。例如,该射频晶片为蓝牙晶片或Wi-Fi晶片。
前述的半导体封装件及其制法中,该屏蔽件外露于该封装胶体。例如,该屏蔽件的外露表面齐平该封装胶体的表面。
前述的半导体封装件及其制法中,该屏蔽件为板体。
前述的半导体封装件及其制法中,还包括金属层,其形成于该封装胶体上。例如,该金属层电性连接该屏蔽件,且该金属层由铜、镍、铁、铝及不锈钢所组成的群组的材质所制成。又该基板具有用于电性连接该金属层的线路。
由上可知,本发明的半导体封装件及其制法,藉由该屏蔽件位于各该半导体元件之间,以避免各该半导体元件之间发生电磁波相互干扰的问题。
附图说明
图1A至图1C为现有射频模组的制法的剖面示意图;以及
图2A至图2C为本发明半导体封装件的制法的剖面示意图;其中,图2A’为图2A的立体图,图2C’为图2C的另一实施例。
符号说明
1射频模组
10,20基板
11非射频式电子元件
11a,11b射频晶片
13,23封装胶体
14金属薄膜
2,2’半导体封装件
20a上表面
20b下表面
20c侧表面
200电性接触垫
201接地部
202内部线路
21半导体元件
21’电子元件
210焊线
210’焊球
22屏蔽件
22a外露表面
23a顶面
23b底面
23c侧面
24金属层。
具体实施方式
以下藉由特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其他优点及功效。
须知,本说明书所附图式所绘示的结构、比例、大小等,均仅用于配合说明书所揭示的内容,以供本领域技术人员的了解与阅读,并非用于限定本发明可实施的限定条件,所以不具技术上的实质意义,任何结构的修饰、比例关系的改变或大小的调整,在不影响本发明所能产生的功效及所能达成的目的下,均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时,本说明书中所引用的如“上”、“一”及“下”等的用语,也仅为便于叙述的明了,而非用于限定本发明可实施的范围,其相对关系的改变或调整,在无实质变更技术内容下,当也视为本发明可实施的范畴。
请参阅图2A至图2C,其为本发明半导体封装件的制法的示意图。于本实施例中,所述的半导体封装件2可发出电磁波者,例如为射频(Radiofrequency,RF)模组。
如图2A及图2A’所示,提供一具有上表面20a及下表面20b的基板20;接着,接置多个半导体元件21与至少一屏蔽件22于该基板20的上表面20a上,且该屏蔽件22位于各该半导体元件21之间。
所述的基板20的上表面20a上具有线路层,该线路层包含多个电性接触垫200与至少一接地部201。于本实施例中,该基板20的种类繁多,例如,该基板20的线路层具有至少一内部线路202(如图2C’所示),且该内部线路202可选择性地电性连接该电性接触垫200与该接地部201,因而该基板20的构造并无特别限制。
所述的半导体元件21为射频晶片,例如:蓝牙晶片或Wi-Fi(WirelessFidelity)晶片。于本实施例中,该些半导体元件21的其中一者为蓝牙晶片,而另一者为Wi-Fi晶片,且也可于该基板20的上表面20a上设置其它无影响电磁波干扰的电子元件21’。
此外,该半导体元件21为打线式晶片,即藉由多个焊线210对应电性连接该基板20上表面20a上的电性接触垫200;或者,该半导体元件21为覆晶式晶片,即藉由多个焊球210’对应电性连接至该基板20上表面20a上的电性接触垫200。
所述的屏蔽件22为导电材板体,其立设于该接地部201上并电性连接该接地部201,以将该基板20的上表面20a隔成多个置放室。
于本实施例中,该屏蔽件22的形状并无限制,如不规则状或几何形状,而该些半导体元件21分别置放于各该置放室内,且藉由该屏蔽件22作为电磁波屏障(EMIShielding),以防止各该半导体元件21之间相互电磁波干扰,例如,防止蓝牙晶片与Wi-Fi晶片之间的讯号相互干扰。
如图2B所示,形成封装胶体23覆盖于该基板20的上表面20a上,以包覆各该半导体元件21、电子元件21’与该屏蔽件22。
于本实施例中,该封装胶体23具有顶面23a及相对该顶面23a且结合至该基板20的上表面20a的底面23b,且该屏蔽件22外露于该封装胶体23的顶面23a。具体地,该屏蔽件22的外露表面22a齐平该封装胶体23的顶面23a。
此外,各该半导体元件21与电子元件21’并未外露于该封装胶体23的顶面23a。
如图2C所示,以例如化学镀膜的方式,如溅镀(sputtering),形成金属层24于该基板20的侧表面20c、该屏蔽件22的外露表面22a、该封装胶体23的顶面23a与侧面23c上,以形成该半导体封装件2。
于本实施例中,该金属层24电性连接该屏蔽件22,且也藉由该金属层24作为电磁波屏障,以防止各该半导体元件21之间相互电磁波干扰,例如,防止蓝牙晶片与Wi-Fi晶片之间的讯号相互干扰。
此外,也可藉由涂布(coating)与回焊(reflow)方式形成该金属层24。
又,形成该金属层24的材质如铜(Cu)、镍(Ni)、铁(Fe)、铝(Al)、不锈钢(Sus)等。
另外,于其它实施例中,如图2C’所示,该金属层24电性连接该屏蔽件22与该基板20的内部线路202(因该内部线路202外露于该侧面20c)。
因此,本发明的制法中,藉由该屏蔽件22分隔各该半导体元件21,以避免各该半导体元件21之间发生电磁波相互干扰的问题。
本发明还提供一种半导体封装件2,2’,包括:一基板20、多个半导体元件21、至少一屏蔽件22以及封装胶体23。
所述的半导体封装件2为射频模组。
所述的基板20具有内部线路202、多个电性接触垫200与至少一接地部201。
所述的半导体元件21设于该基板20上且电性连接该些电性接触垫200。于一实施例中,该半导体元件21为射频晶片,例如,蓝牙晶片或Wi-Fi晶片。
所述的屏蔽件22立设于该基板20上并位于各该半导体元件21之间,且该屏蔽件22电性连接该接地部201。
所述的封装胶体23设于该基板20上,以包覆各该半导体元件21与该屏蔽件22。于一实施例中,该屏蔽件22外露于该封装胶体23。
于一实施例中,所述的半导体封装件2还包括金属层24,其形成于该封装胶体23上并电性连接该屏蔽件22,且该金属层24选自铜、镍、铁、铝或不锈钢的材质。又,该金属层24可选择性电性连接该内部线路202。
综上所述,本发明的半导体封装件及其制法,主要藉由该屏蔽件的设计,以避免各该半导体元件之间发生电磁波相互干扰的问题。
上述实施例仅用于例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下,对上述实施例进行修改。因此本发明的权利保护范围,应如权利要求书所列。
Claims (20)
1.一种半导体封装件,包括:
基板;
多个半导体元件,其设于该基板上;
至少一屏蔽件,其立设于该基板上并位于各该半导体元件之间;以及
封装胶体,其形成于该基板上,以包覆各该半导体元件与该屏蔽件。
2.如权利要求1所述之半导体封装件,其特征在于,该些半导体元件的至少一者为射频晶片。
3.如权利要求2所述的半导体封装件,其特征在于,该射频晶片为蓝牙晶片或Wi-Fi晶片。
4.如权利要求1所述的半导体封装件,其特征在于,该屏蔽件外露于该封装胶体。
5.如权利要求4所述的半导体封装件,其特征在于,该屏蔽件的外露表面齐平该封装胶体的表面。
6.如权利要求1所述的半导体封装件,其特征在于,该屏蔽件为板体。
7.如权利要求1所述的半导体封装件,其特征在于,该半导体封装件还包括形成于该封装胶体上的金属层。
8.如权利要求7所述的半导体封装件,其特征在于,该金属层电性连接该屏蔽件。
9.如权利要求7所述的半导体封装件,其特征在于,该基板具有用于电性连接该金属层的线路。
10.如权利要求7所述的半导体封装件,其特征在于,该金属层选自由铜、镍、铁、铝及不锈钢所组成的群组的材质所制成。
11.一种半导体封装件的制法,包括:
设置多个半导体元件与至少一屏蔽件于一基板上,且该屏蔽件位于各该半导体元件之间;以及
形成封装胶体于该基板上,以包覆各该半导体元件与该屏蔽件。
12.如权利要求11所述的半导体封装件的制法,其特征在于,该些半导体元件的至少一者为射频晶片。
13.如权利要求12所述的半导体封装件的制法,其特征在于,该射频晶片为蓝牙晶片或Wi-Fi晶片。
14.如权利要求11所述的半导体封装件的制法,其特征在于,该屏蔽件外露于该封装胶体。
15.如权利要求14所述的半导体封装件的制法,其特征在于,该屏蔽件的外露表面齐平该封装胶体的表面。
16.如权利要求11所述的半导体封装件的制法,其特征在于,该屏蔽件为板体。
17.如权利要求11所述的半导体封装件的制法,其特征在于,该制法还包括形成金属层于该封装胶体上。
18.如权利要求17所述的半导体封装件的制法,其特征在于,该金属层电性连接该屏蔽件。
19.如权利要求17所述的半导体封装件的制法,其特征在于,该基板具有用于电性连接该金属层的线路。
20.如权利要求17所述的半导体封装件的制法,其特征在于,该金属层选自由铜、镍、铁、铝及不锈钢所组成的群组的材质所制成。
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