CN102382587B - 倒装芯片型半导体背面用膜及其用途 - Google Patents

倒装芯片型半导体背面用膜及其用途 Download PDF

Info

Publication number
CN102382587B
CN102382587B CN201110217073.2A CN201110217073A CN102382587B CN 102382587 B CN102382587 B CN 102382587B CN 201110217073 A CN201110217073 A CN 201110217073A CN 102382587 B CN102382587 B CN 102382587B
Authority
CN
China
Prior art keywords
film
back surface
semiconductor
adhesive layer
semiconductor back
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201110217073.2A
Other languages
English (en)
Chinese (zh)
Other versions
CN102382587A (zh
Inventor
高本尚英
志贺豪士
浅井文辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to CN201510557774.9A priority Critical patent/CN105153954B/zh
Publication of CN102382587A publication Critical patent/CN102382587A/zh
Application granted granted Critical
Publication of CN102382587B publication Critical patent/CN102382587B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3164—Partial encapsulation or coating the coating being a foil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the bump connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009—Pre-treatment of the bump connector or the bonding area
    • H01L2224/81024—Applying flux to the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81909—Post-treatment of the bump connector or bonding area
    • H01L2224/8191—Cleaning, e.g. oxide removal step, desmearing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2804—Next to metal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31721—Of polyimide
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31855—Of addition polymer from unsaturated monomers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Dicing (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
CN201110217073.2A 2010-07-29 2011-07-28 倒装芯片型半导体背面用膜及其用途 Expired - Fee Related CN102382587B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510557774.9A CN105153954B (zh) 2010-07-29 2011-07-28 倒装芯片型半导体背面用膜及其用途

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010170807A JP5419226B2 (ja) 2010-07-29 2010-07-29 フリップチップ型半導体裏面用フィルム及びその用途
JP2010-170807 2010-07-29

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN201510557774.9A Division CN105153954B (zh) 2010-07-29 2011-07-28 倒装芯片型半导体背面用膜及其用途

Publications (2)

Publication Number Publication Date
CN102382587A CN102382587A (zh) 2012-03-21
CN102382587B true CN102382587B (zh) 2015-09-30

Family

ID=45527155

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201110217073.2A Expired - Fee Related CN102382587B (zh) 2010-07-29 2011-07-28 倒装芯片型半导体背面用膜及其用途
CN201510557774.9A Expired - Fee Related CN105153954B (zh) 2010-07-29 2011-07-28 倒装芯片型半导体背面用膜及其用途

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN201510557774.9A Expired - Fee Related CN105153954B (zh) 2010-07-29 2011-07-28 倒装芯片型半导体背面用膜及其用途

Country Status (5)

Country Link
US (2) US20120028416A1 (enExample)
JP (1) JP5419226B2 (enExample)
KR (2) KR20120024386A (enExample)
CN (2) CN102382587B (enExample)
TW (1) TWI465543B (enExample)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5419226B2 (ja) 2010-07-29 2014-02-19 日東電工株式会社 フリップチップ型半導体裏面用フィルム及びその用途
WO2013031499A1 (ja) * 2011-08-30 2013-03-07 日東電工株式会社 導電性粘着テープ
EP2636712A1 (en) * 2012-03-07 2013-09-11 Nitto Denko Corporation Pressure-sensitive adhesive tape for resin encapsulation and method for producing resin encapsulation type semiconductor device
WO2014192630A1 (ja) * 2013-05-29 2014-12-04 三井化学東セロ株式会社 半導体ウエハ保護用フィルム及び半導体装置の製造方法
KR102270480B1 (ko) * 2014-02-28 2021-06-29 닛토덴코 가부시키가이샤 도전성 점착 테이프 및 도전성 점착 테이프가 부착된 표시 장치
JP6638217B2 (ja) * 2014-06-05 2020-01-29 宇部興産株式会社 電極の製造方法
JP6379389B2 (ja) * 2014-12-15 2018-08-29 リンテック株式会社 ダイシングダイボンディングシート
JP6571398B2 (ja) 2015-06-04 2019-09-04 リンテック株式会社 半導体用保護フィルム、半導体装置及び複合シート
JP6265954B2 (ja) 2015-09-16 2018-01-24 古河電気工業株式会社 半導体裏面用フィルム
WO2017057009A1 (ja) * 2015-09-29 2017-04-06 太陽インキ製造株式会社 保護膜形成用フィルム
JP6872313B2 (ja) 2015-10-13 2021-05-19 リンテック株式会社 半導体装置および複合シート
CN105336581A (zh) * 2015-11-04 2016-02-17 株洲南车时代电气股份有限公司 功率半导体器件制作方法及装置
JP6660156B2 (ja) * 2015-11-13 2020-03-04 日東電工株式会社 積層体および合同体・半導体装置の製造方法
WO2017105520A1 (en) * 2015-12-18 2017-06-22 Intel Corporation Transmissive composite film for application to the backside of a microelectronic device
SG11201708850VA (en) * 2015-12-25 2018-07-30 Furukawa Electric Co Ltd Tape for semiconductor processing
JP6800167B2 (ja) * 2015-12-25 2020-12-16 古河電気工業株式会社 半導体加工用テープ
CN106997900A (zh) * 2016-01-22 2017-08-01 中芯国际集成电路制造(上海)有限公司 半导体结构、其形成方法及测试方法
KR102466267B1 (ko) * 2016-03-31 2022-11-14 후루카와 덴키 고교 가부시키가이샤 전자 디바이스 패키지용 테이프
KR102056178B1 (ko) * 2016-03-31 2019-12-16 후루카와 덴키 고교 가부시키가이샤 전자 디바이스 패키지용 테이프
JP6310492B2 (ja) * 2016-03-31 2018-04-11 古河電気工業株式会社 電子デバイスパッケージ用テープ
JP6429824B2 (ja) 2016-03-31 2018-11-28 古河電気工業株式会社 電子デバイスパッケージ用テープ
JP6422462B2 (ja) * 2016-03-31 2018-11-14 古河電気工業株式会社 電子デバイスパッケージ用テープ
TWI772293B (zh) * 2016-04-28 2022-08-01 日商琳得科股份有限公司 附有保護膜的半導體晶片的製造方法以及半導體裝置的製造方法
KR101654510B1 (ko) * 2016-05-06 2016-09-05 주식회사 티에스피글로벌 반도체 칩 패키지 마킹 방법
JP6616738B2 (ja) * 2016-06-09 2019-12-04 積水化学工業株式会社 積層シート及び半導体装置の製造方法
JP2017217882A (ja) * 2016-06-10 2017-12-14 積水化学工業株式会社 積層体、接着層及び金属材付き半導体チップ、及び半導体装置の製造方法
JP6440657B2 (ja) * 2016-07-27 2018-12-19 古河電気工業株式会社 電子デバイス用テープ
CN109743877B (zh) * 2016-10-03 2022-06-10 琳得科株式会社 半导体加工用粘着胶带以及半导体装置的制造方法
KR102019943B1 (ko) * 2017-04-25 2019-09-11 (주) 씨앤아이테크놀로지 전자 부품 캐리어 시트 및 이를 이용한 박막 형성장치
JP6961387B2 (ja) * 2017-05-19 2021-11-05 日東電工株式会社 ダイシングダイボンドフィルム
US11795103B2 (en) 2017-10-17 2023-10-24 PGBC Intellectual Holdings, LLC Chemically-strengthened thin glass substrates new paradigms for modified curvature and methods of manufacture
CN111725066B (zh) * 2019-03-22 2025-01-24 东莞新科技术研究开发有限公司 一种半导体表面去除氟杂质的方法
JP7311284B2 (ja) * 2019-03-22 2023-07-19 日東電工株式会社 バックグラインドテープ
CN113035720B (zh) * 2021-03-01 2024-08-09 宏茂微电子(上海)有限公司 芯片上片方法
JP7635038B2 (ja) * 2021-03-23 2025-02-25 リンテック株式会社 保護膜形成フィルム、保護膜形成用シート、保護膜形成用複合シートおよび装置の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1954015A (zh) * 2004-05-20 2007-04-25 东丽株式会社 聚酰亚胺树脂、层压薄膜、带金属层的层压薄膜及半导体装置
JP2007235022A (ja) * 2006-03-03 2007-09-13 Mitsui Chemicals Inc 接着フィルム
CN101130670A (zh) * 2006-08-22 2008-02-27 日东电工株式会社 激光加工用粘接片
CN101617395A (zh) * 2007-03-01 2009-12-30 日东电工株式会社 热固化型芯片接合薄膜

Family Cites Families (62)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566935A (en) * 1984-07-31 1986-01-28 Texas Instruments Incorporated Spatial light modulator and method
US4596992A (en) * 1984-08-31 1986-06-24 Texas Instruments Incorporated Linear spatial light modulator and printer
US4956619A (en) * 1988-02-19 1990-09-11 Texas Instruments Incorporated Spatial light modulator
US5028939A (en) * 1988-08-23 1991-07-02 Texas Instruments Incorporated Spatial light modulator system
JP2681167B2 (ja) * 1988-10-12 1997-11-26 株式会社半導体エネルギー研究所 電子装置作製方法
US5250329A (en) * 1989-04-06 1993-10-05 Microelectronics And Computer Technology Corporation Method of depositing conductive lines on a dielectric
US5073423A (en) * 1990-01-04 1991-12-17 Corning Incorporated Decalcomania
JPH04315452A (ja) * 1991-04-15 1992-11-06 Fuji Electric Co Ltd 半導体装置チップの標識賦与方法
JPH0677283A (ja) 1992-08-26 1994-03-18 Kyocera Corp 配線基板へのｉｃ素子の実装方法
US5496691A (en) * 1994-02-08 1996-03-05 Fuji Photo Film Co., Ltd. Process for producing silver halide photographic material
JP3307207B2 (ja) 1995-12-25 2002-07-24 松下電器産業株式会社 半導体装置およびその製造方法
JPH10256431A (ja) * 1997-03-06 1998-09-25 Sony Corp 半導体装置及びその製造方法
US6235387B1 (en) * 1998-03-30 2001-05-22 3M Innovative Properties Company Semiconductor wafer processing tapes
US6284122B1 (en) * 1998-06-09 2001-09-04 International Lead Zinc Research Organization, Inc. Production of a zinc-aluminum alloy coating by immersion into molten metal baths
US7038310B1 (en) * 1999-06-09 2006-05-02 Matsushita Electric Industrial Co., Ltd. Power module with improved heat dissipation
JP2001196642A (ja) * 2000-01-11 2001-07-19 Toyoda Gosei Co Ltd 発光装置
JP4351348B2 (ja) * 2000-01-27 2009-10-28 リンテック株式会社 保護層を有するｉｃカードの製造方法
JP3631956B2 (ja) * 2000-05-12 2005-03-23 富士通株式会社 半導体チップの実装方法
JP3906653B2 (ja) * 2000-07-18 2007-04-18 ソニー株式会社 画像表示装置及びその製造方法
US6562454B2 (en) * 2000-12-04 2003-05-13 Yupo Corporation Tag and label comprising same
TW511405B (en) * 2000-12-27 2002-11-21 Matsushita Electric Industrial Co Ltd Device built-in module and manufacturing method thereof
JP3649129B2 (ja) 2001-01-12 2005-05-18 松下電器産業株式会社 半導体装置の製造方法および半導体装置
JP2002313914A (ja) * 2001-04-18 2002-10-25 Sony Corp 配線形成方法及びこれを用いた素子の配列方法、画像表示装置の製造方法
TW508987B (en) * 2001-07-27 2002-11-01 Phoenix Prec Technology Corp Method of forming electroplated solder on organic printed circuit board
KR101029235B1 (ko) * 2001-08-10 2011-04-18 닛토덴코 가부시키가이샤 다이싱용 점착 시트 및 다이싱 방법
JP2003108008A (ja) * 2001-09-27 2003-04-11 Oji Paper Co Ltd 粘着シート
US6974659B2 (en) * 2002-01-16 2005-12-13 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming a solder ball using a thermally stable resinous protective layer
EP1489657A4 (en) * 2002-02-06 2011-06-29 Ibiden Co Ltd SEMICONDUCTOR CHIP MOUNTING PLATE, METHOD FOR THE PRODUCTION THEREOF AND SEMICONDUCTOR MODULE
JP2004231932A (ja) * 2002-12-02 2004-08-19 Nitto Denko Corp 接着剤組成物、接着フィルムおよびこれを用いた半導体装置
JP3892359B2 (ja) 2002-07-25 2007-03-14 松下電器産業株式会社 半導体チップの実装方法
CN100548840C (zh) * 2002-07-30 2009-10-14 日立化成工业株式会社 粘接材料带连接体及粘接材料带的连接方法
AU2003252359A1 (en) * 2002-08-01 2004-02-23 Nichia Corporation Semiconductor light-emitting device, method for manufacturing same and light-emitting apparatus using same
CN100477891C (zh) * 2003-01-16 2009-04-08 富士通株式会社 多层布线基板及其制造方法、纤维强化树脂基板制造方法
JP2004364041A (ja) * 2003-06-05 2004-12-24 Fujitsu Media Device Kk 弾性表面波デバイス及びその製造方法
TW200532259A (en) * 2003-12-25 2005-10-01 Nitto Denko Corp Method of manufacturing laminated polarizing plate, laminated polarizing plate obtained by the method, and image display including the same
JP2005340761A (ja) * 2004-04-27 2005-12-08 Seiko Epson Corp 半導体装置の実装方法、回路基板、電気光学装置並びに電子機器
US7109591B2 (en) * 2004-06-04 2006-09-19 Hack Jonathan A Integrated circuit device
JP4165467B2 (ja) * 2004-07-12 2008-10-15 セイコーエプソン株式会社 ダイシングシート、半導体装置の製造方法
JP4642436B2 (ja) * 2004-11-12 2011-03-02 リンテック株式会社 マーキング方法および保護膜形成兼ダイシング用シート
TWI286454B (en) * 2005-03-09 2007-09-01 Phoenix Prec Technology Corp Electrical connector structure of circuit board and method for fabricating the same
JP4876451B2 (ja) 2005-06-27 2012-02-15 日立化成工業株式会社 接着シート
JP4865312B2 (ja) 2005-12-05 2012-02-01 古河電気工業株式会社 チップ用保護膜形成用シート
US7932615B2 (en) * 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers
JP4844168B2 (ja) * 2006-02-28 2011-12-28 パナソニック株式会社 部品接合方法および部品積層方法
JP2008166451A (ja) 2006-12-27 2008-07-17 Furukawa Electric Co Ltd:The チップ保護用フィルム
JP5196838B2 (ja) * 2007-04-17 2013-05-15 リンテック株式会社 接着剤付きチップの製造方法
JP4607153B2 (ja) * 2007-07-12 2011-01-05 株式会社日立製作所 微小電気機械システム素子の製造方法
KR20120002556A (ko) * 2007-10-09 2012-01-05 히다치 가세고교 가부시끼가이샤 접착 필름이 부착된 반도체칩의 제조 방법 및 이 제조 방법에 사용되는 반도체용 접착 필름, 및 반도체 장치의 제조 방법
JP2009237489A (ja) * 2008-03-28 2009-10-15 Sumitomo Chemical Co Ltd 表面保護フィルム付き偏光板の製造方法
JP2009277719A (ja) * 2008-05-12 2009-11-26 Nec Electronics Corp 半導体装置及びその製造方法
KR101485105B1 (ko) * 2008-07-15 2015-01-23 삼성전자주식회사 반도체 패키지
JP2010031183A (ja) 2008-07-30 2010-02-12 Furukawa Electric Co Ltd:The エネルギー線硬化型チップ保護用フィルム
JP5556070B2 (ja) 2008-08-20 2014-07-23 日立化成株式会社 ダイシングテープ一体型接着シートを用いた半導体装置の製造方法
EP2352168A1 (en) * 2008-11-25 2011-08-03 Sumitomo Bakelite Co., Ltd. Electronic component package and electronic component package manufacturing method
US9082806B2 (en) * 2008-12-12 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US7642128B1 (en) * 2008-12-12 2010-01-05 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US9070662B2 (en) * 2009-03-05 2015-06-30 Volterra Semiconductor Corporation Chip-scale packaging with protective heat spreader
US9420707B2 (en) * 2009-12-17 2016-08-16 Intel Corporation Substrate for integrated circuit devices including multi-layer glass core and methods of making the same
JP5501938B2 (ja) * 2009-12-24 2014-05-28 日東電工株式会社 フリップチップ型半導体裏面用フィルム
JP5419226B2 (ja) 2010-07-29 2014-02-19 日東電工株式会社 フリップチップ型半導体裏面用フィルム及びその用途
US20130256269A1 (en) * 2012-03-29 2013-10-03 Apple Inc. Methods and apparatus for modifying surface energy of laminate stack up
JP5978246B2 (ja) * 2014-05-13 2016-08-24 日東電工株式会社 ダイシングテープ一体型半導体裏面用フィルム、及び、半導体装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1954015A (zh) * 2004-05-20 2007-04-25 东丽株式会社 聚酰亚胺树脂、层压薄膜、带金属层的层压薄膜及半导体装置
JP2007235022A (ja) * 2006-03-03 2007-09-13 Mitsui Chemicals Inc 接着フィルム
CN101130670A (zh) * 2006-08-22 2008-02-27 日东电工株式会社 激光加工用粘接片
CN101617395A (zh) * 2007-03-01 2009-12-30 日东电工株式会社 热固化型芯片接合薄膜

Also Published As

Publication number Publication date
KR101581643B1 (ko) 2016-01-11
CN105153954B (zh) 2018-12-21
JP2012033626A (ja) 2012-02-16
US10211083B2 (en) 2019-02-19
CN105153954A (zh) 2015-12-16
KR20120024386A (ko) 2012-03-14
TW201213487A (en) 2012-04-01
US20140178680A1 (en) 2014-06-26
JP5419226B2 (ja) 2014-02-19
KR20150094581A (ko) 2015-08-19
TWI465543B (zh) 2014-12-21
CN102382587A (zh) 2012-03-21
US20120028416A1 (en) 2012-02-02

Similar Documents

Publication Publication Date Title
CN102382587B (zh) 倒装芯片型半导体背面用膜及其用途
CN102344646B (zh) 倒装芯片型半导体背面用膜及其用途
CN101794724B (zh) 切割带集成晶片背面保护膜
CN104465515B (zh) 切割带集成晶片背面保护膜
CN101794722B (zh) 切割带集成晶片背面保护膜
CN102153960B (zh) 倒装芯片型半导体背面用膜
CN102161869B (zh) 半导体背面用切割带集成膜
CN101901775B (zh) 半导体背面用切割带集成膜
CN102347264B (zh) 半导体器件生产用膜、半导体器件生产用膜的生产方法和半导体器件的生产方法
CN102376616B (zh) 倒装芯片型半导体背面用膜、半导体背面用切割带集成膜、半导体器件的生产方法和倒装芯片型半导体器件
CN102947930B (zh) 倒装芯片型半导体背面用膜、半导体背面用切割带集成膜、半导体器件的生产方法和倒装芯片型半导体器件
CN102347263B (zh) 半导体背面用切割带集成膜和生产半导体器件的方法
CN102146265B (zh) 半导体背面用切割带集成膜
CN102373020A (zh) 半导体背面用切割带集成膜和生产所述膜的方法,及生产半导体器件的方法
CN105047597B (zh) 半导体背面用切割带集成膜
CN106057722A (zh) 倒装芯片型半导体背面用膜和半导体背面用切割带集成膜
TW201704409A (zh) 半導體背面用膜及其用途
CN101924055A (zh) 半导体背面用切割带集成膜
CN102376611A (zh) 半导体背面用膜、半导体背面用切割带集成膜、用于生产半导体器件的方法和半导体器件

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150930