CN101728340B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN101728340B
CN101728340B CN2009102066271A CN200910206627A CN101728340B CN 101728340 B CN101728340 B CN 101728340B CN 2009102066271 A CN2009102066271 A CN 2009102066271A CN 200910206627 A CN200910206627 A CN 200910206627A CN 101728340 B CN101728340 B CN 101728340B
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semiconductor chip
substrate
semiconductor device
girth member
heating panel
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CN2009102066271A
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CN101728340A (zh
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草野英俊
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Sony Corp
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Sony Corp
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Abstract

本发明提供一种半导体装置及其制造方法，该半导体装置能够充分确保基板和散热板的粘合面积，同时能够消除因多余的粘合材料漏出所导致的不良情况。本发明的半导体装置包括：无芯基板(2)；倒装安装到无芯基板(2)上的半导体芯片(3)；以及通过TIM材料(17)与半导体芯片(3)连接同时通过密封环带材料(18)与密封树脂层(4)连接的盖(5)，并且，在盖(5)的与密封树脂层(4)连接的连接面上形成有多个凹陷(16a)。

Description

半导体装置及其制造方法
技术领域
本发明涉及半导体装置及其制造方法。更具体地，本发明涉及具有经由高热传导性材料与半导体芯片连接的散热板的半导体装置及其制造方法。
背景技术
近年来，电脑、便携式电话、PDA(Personal Digital Assistance，个人数字助理)等电子设备的小型化、多功能化及高速化得到了发展。为此，要求装有面向这样的电子设备的IC(集成电路)、LSI(大规模集成电路)等半导体芯片的半导体装置更加小型化、高速化及高密度化。接着，伴随半导体装置的小型化、高速化及高密度化而来的是功耗的增加，且每单位体积的发热量也随之增加。
然而，作为半导体芯片的安装结构，公知一种在使半导体芯片的形成有电极的面处于面朝下状态下，利用焊锡凸块将半导体芯片倒装安装(flip-chip bond)到基板上的结构。但是，对于倒装安装的半导体装置，由于半导体芯片和基板的热膨胀系数的差异，也会出现发热导致在基于焊锡凸块的连接部上产生应力，并使连接可靠性降低的问题。
因此，提出了专利文献1中披露的技术，以应对通过焊锡凸块等连接部件连接热膨胀系数互不相同的半导体芯片和基板时在连接部分产生应力等问题。
具体而言，专利文献1中提议了一种利用热膨胀系数与基板的热膨胀系数为相同值或基本为相同值的部件(lid，盖)进行封装的技术。通过该技术，抑制了在连接部件中产生应力，其中，该连接部件是用于将设置于基板上的多个衬垫中的每一个与设置于半导体芯片上的多个输入端子中的每一个相连接。
下面，参照附图，对专利文献1中披露的技术进行说明。
图15是用于说明现有技术的半导体装置的示意图，在此所示的半导体装置101包括配线基板102、半导体芯片103、以及设于半导体芯片上面的盖104。
配线基板102具有多个衬垫105，这些衬垫105与配置在配线基板102的表面或内层上的配线相连。
半导体芯片103在表面朝下的状态下倒装安装到配线基板102上。并且，多个输入输出端子106被设置在半导体芯片的下面(表面)，各输入输出端子排列成栅格状，且设置在与配线基板102上的多个衬垫105中的各个相对应的位置。此外，多个输入输出端子106和多个衬垫105中的相互对应的两者之间通过焊料107连接。
盖104设置有凹部，盖104的截面呈凹陷形状，同时半导体芯片103的上面通过高热传导性粘合材料108与凹部的底面粘合。并且，盖104的端缘通过粘合材料109与配线基板102的上面粘合。因此，通过盖104、粘合材料109以及配线基板102，半导体芯片103处于完全被密封的状态。
在此，盖由铜或黄铜构成，铜的热膨胀系数为16.5×10-6/℃，而黄铜的热膨胀系数为17.3×10-6/℃，与配线基板102的热膨胀系数(15～20×10-6/℃)基本为相同值。
这样，在专利文献1所披露的技术中，由热膨胀系数与配线基板的热膨胀系数为相同值或基本为相同值的材料构成盖，从而抑制了向焊料107施加应力。
可是，当将半导体芯片倒装安装到配线基板上时，为保护配线基板和半导体芯片间的电连接部分，通常利用底填料(underfillmaterial)进行加固。具体而言，将以环氧树脂等为主成分的液状底填料填充到配线基板和半导体芯片间的间隙中，然后加热使底填料固化，从而实现对配线基板和半导体芯片间的电连接部分的加固。
但是，受用于固化底填料的加热的影响，在配线基板上会发生弯曲，以致每个封装的配线基板和盖间的间隔都不同，甚至在封装内也会产生差异。因此，为可靠地将盖固定在配线基板上，必须增大涂敷在配线基板和盖之间的粘合材料的份量，结果导致粘合材料泄漏的问题。
换句话说，当配线基板和盖间的间隔存在差异时，若预估配线基板和盖间的间隔小并进行粘合材料的涂敷，则可能粘合材料的份量变得不充分，使得盖的固定变得不充分。为此，不得不预估配线基板和盖间的间隔大而涂敷大量的粘合材料，结果粘合材料漏出，致使封装不良、或挤破气孔等诸如此类的问题。
因此，为确保盖和配线基板的充分连接、同时使粘合材料不从封装外表漏出，如图16所示，在盖上形成有比盖尺寸小一圈的粘合用凹部120。
即、即使预估配线基板和盖间的间隔大而涂敷大量的粘合材料而使粘合材料漏出，也会使漏出的粘合材料留在粘合用凹部120中，从而解决了封装不良、或挤破气孔等诸如此类的问题。需要说明的是，图16中的标记A表示漏出的粘合材料。
日本专利文献1：特开平11-354677号公报
然而，作为下一代的半导体封装，估计会采用无芯基板。若使用无芯基板，则会产生比现有技术基板(具有芯材C的基板)更大的弯曲变形量，所以即使采用设置有粘合用凹部的盖，可能也无法充分应对粘合材料的漏出。
而且，弯曲变形量大则意味着无芯基板和盖的粘合面积小，盖也不能完全固定到无芯基板上。
发明内容
鉴于上述问题，本发明的目的在于提供一种能够充分确保基板和散热板的粘合面积，同时能够消除因多余的粘合材料漏出所导致的不良情况的半导体装置及其制造方法。
为达到上述目的，本发明涉及的半导体装置包括：基板；半导体芯片，以表面朝下的状态安装到上述基板上；加固件，设置在上述基板的半导体芯片安装区域的外围区域；以及散热板，上述散热板通过高热传导性材料与上述半导体芯片连接，并通过粘合材料与上述加固件连接，从而被设置在上述半导体芯片和上述加固件上，并且，在上述散热板的与上述加固件连接的连接面上设有凹凸部。
在此，通过在散热板的与加固件连接的连接面上设置的凹凸部，可留存多余的粘合材料，并能消除因多余的粘合材料的漏出所导致的不良情况。并且，通过在散热板的与加固件连接的连接面上设置的凹凸部，散热板与粘合材料的接触面积增大，并且可充分确保基板和散热板的粘合面积。
并且，为达到上述目的，本发明涉及的半导体装置的制造方法包括：将表面朝下的半导体芯片倒装安装到设有配线图案的基板上的步骤；在被倒装安装的半导体芯片的外围区域形成加固件的步骤；以及在上述半导体芯片的背面涂敷高热传导性材料，并在上述加固件的表面涂敷粘合材料，然后将散热板连接到半导体芯片和加固件上的步骤，其中，在上述散热板的与上述加固件连接的连接面上设有凹凸部。
在此，通过连接在与上述加固件连接的连接面上设有凹凸部的散热板，从而能够将多余的粘合材料留存在凹凸部中，并能消除因多余的粘合材料的漏出所导致的不良情况。而且，能够增大散热板与粘合材料的接触面积，并能够充分确保基板和散热板的粘合面积。
根据应用了本发明的半导体装置及其制造方法，不但能够充分确保基板和散热板的粘合面积，而且还能消除因多余的粘合材料的漏出所导致的不良情况。
附图说明
图1是用于说明应用了本发明的半导体装置的一个实施例的示意图；
图2是用于详细说明无芯基板的结构的示意性截面图；
图3是应用了本发明的半导体装置的制造方法的一个实施例的简要流程图；
图4(a)～图4(c)是用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(1)；
图5(a)～图5(c)是用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(2)；
图6(a)～图6(d)是用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(3)；
图7(a)～图7(c)是用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(4)；
图8(a)和图8(b)是用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(5)；
图9(a)和图9(b)用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(6)；
图10(a)～图10(c)用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(7)；
图11(a)和图11(b)用于说明应用了本发明的半导体装置的制造方法的一个实施例的示意图(8)；
图12是用于说明应用了本发明的半导体装置的变形例(1)的示意图；
图13是用于说明应用了本发明的半导体装置的变形例(2)的示意图；
图14是用于说明应用了本发明的半导体装置的变形例(3)的示意图；
图15是用于说明现有技术的半导体装置的示意图(1)；以及
图16是用于说明现有技术的半导体装置的示意图(2)。
具体实施方式
下面，为便于对本发明的理解，参照附图对本发明的实施方式进行说明。
图1是用于说明应用了本发明的半导体装置的一个实施例的示意图。在此所示的半导体装置1包括：无芯基板2、以表面朝下的状态倒装安装到无芯基板2上的LSI等半导体芯片3、用于密封半导体芯片3周围的密封树脂层4、以及配置在半导体芯片3上的盖5。
在此，本实施例中所述的半导体装置1具有在无芯基板2的背面呈矩阵状排列有多个焊球6的BGA(Ball Grid Array，球栅阵列)型半导体封装结构，以此为例进行描述。此外，“无芯基板2的背面”是指安装有半导体芯片3的面的相反面。
而且，“半导体芯片3的表面”是指设置有导通部的面，该导通部与被安装的无芯基板2电耦合。而且，半导体芯片3以表面朝下的状态被安装到无芯基板上，从而有望缩短半导体芯片3和无芯基板2的导通路径，实现半导体装置的小型化。
进一步地，半导体芯片3的倒装安装是通过使用了焊锡凸块的C4(Controlled Collapse Chip Connection，可控坍塌芯片连接)技术将无芯基板2和半导体芯片3电连接。
并且，在半导体芯片3和无芯基板2间的间隙中填充有底填料(未图示)。通过填充底填料，能够分散温度循环时因无芯基板2和半导体芯片3之间的热膨胀系数的差而在焊料连接部分产生的应力，从而改善相对于温度变化的动作稳定性。
这样，底填料的目的在于保护焊料连接部，优选底填料具有填充间隙的适度粘性。但是，充分考虑到底填料的粘性、表面张力和制造方法可能使其从无芯基板2和半导体芯片3间的间隙中漏出到半导体芯片3的侧面。因此，优选后述的密封树脂层4对漏出到半导体芯片侧面的底填料进行密封，通过采用这种结构，可保护半导体芯片3不受光、热及湿度等环境影响。
而且，无芯基板2的背面设有球焊盘(ball land)部(未图示)，焊球6与各自的球焊盘部连接。进一步地，无芯基板2的背面设有电极垫(未图示)，电容器9被安装在各自的电极垫上。
图2是用于详细说明本实施例的无芯基板2的结构的示意性截面图。在此所示的无芯基板2具有层间绝缘膜10与配线层11交替层叠的多层配线结构，多个配线层11隔着层间绝缘膜10层叠。此外，对于配线层11使用诸如铜材料，不同层的配线层11之间经由设于层间绝缘膜10中的插塞12电连接。进一步地，无芯基板2背面的配线层11a周围形成有由耐热性良好的树脂材料构成的阻焊层(solder resist layer)13，最下层的层间绝缘膜10a被涂敷有阻焊层13，以使在对无芯基板2进行焊接时，焊料不会粘附在必要部位之外的地方。
并且，在无芯基板2的背面呈矩阵状地排列有多个与焊球6连接的球焊盘部7。进而，在安装电容器9的电极部分上形成有由锡(Sn)、银(Ag)、铜(Cu)或它们的合金构成的电极垫14。
另一方面，在无芯基板2的安装有半导体芯片3侧的表面上呈矩阵状地排列有多个通过电镀法形成的由镍(Ni)、铅(Pb)、金(Au)或它们的合金构成的电极垫15。并且，在电极垫15上设有由锡、铅或它们的合金构成的C4凸块22。
这样，在本实施例中由于使用的是无芯基板，所以即使是诸如六层结构也可以薄到300μm左右。此外，由于基板变薄降低了配线电阻，所以有望实现半导体装置的动作速度的高速化。
并且，电容器9与半导体芯片3正下方的无芯基板2的背面连接。由此，能够缩短从半导体芯片3到电容器9的配线路径，从而降低配线电阻。值得说明的是，电容器9的设置场所并不局限于半导体芯片3正下方的无芯基板的背面。例如，只要能够使配线路径足够短，也可将电容器9设置在偏离半导体芯片3正下方的无芯基板2的背面。或者，只要能够使配线路径足够短，也可将电容器9设置在无芯基板2的表面。
并且，密封树脂层4构成为与半导体芯片3大致为同一厚度。进一步地，优选密封树脂层4覆盖呈矩阵状排列的多个焊球6中的处于最外边位置的焊球6外侧的无芯基板2。这是因为由于借助密封树脂层4提高了无芯基板2的强度，所以能够抑制无芯基板2的变形，从而有望提高焊球6的电连接性。
进而，盖5由高热传导性材料(如铜材料)构成，通过涂敷在半导体芯片3背面的高热传导性材料、即TIM(Thermal InterfaceMaterial，热介面材料)材料17与半导体芯片3连接。并且，通过涂敷在密封树脂层4表面的粘合材料(密封环带材料)18，盖5与密封树脂层4连接。
在此，本实施例的TIM材料是通过在树脂材料中混入热传导性填充料而制成，作为树脂材料，例如可列举出加成固化型硅组合物。值得一提的是，加成固化型硅组合物由包含液态硅作为基础聚合物的固化型硅组合物构成，是在该固化型硅组合物中添加有例如热固化性的粘合赋予成分(adhesion providing component)的物质。具体而言，公知的有包含具有烷氧基甲硅烷基的有机氢硅氧烷的加成固化型硅橡胶组合物(如参照日本专利公开昭53-21026号公报)、包含具有环氧基的有机氢硅氧烷的加成固化型硅橡胶组合物(如参照日本专利公开昭53-13508号公报)等。
此外，热传导性填充料起到在半导体芯片3和盖5之间传递热的媒介物的作用。具体而言，可列举出由诸如银(Ag)、铝(Al)、氧化铝(Al2O3)、二氧化硅(SiO2)等的颗粒或粉末状物质等填充料构成的热传导性填充料。而且，热传导性填充料既可以由这些填充料中任一种构成，也可以由不同颗粒直径的多个填充料构成。
甚至，热传导性填充料除了发挥传递热的媒介物的作用之外，还可以起到保持半导体芯片3和盖5之间的间隔的隔离物的作用。由该作为隔离物的作用来确定混合有热传导性填充料的TIM材料、即介于半导体芯片3和盖5之间的TIM材料的厚度。
此外，在盖5的与密封树脂层4之间的连接面上形成有多个凹陷(凹部)16a。换句话说，在盖5的与密封树脂层4连接的连接面上设有凹凸部。
下面，对按上述这样构成的半导体装置的制造方法进行描述。即、对应用了本发明的半导体装置的制造方法的一个例子进行描述。
图3是应用了本发明的半导体装置的制造方法的一个实施例的简要流程图，首先，形成具有多层配线结构的无芯基板(S10)，并在该无芯基板上安装半导体芯片(S20)。接着，用密封树脂对半导体芯片进行密封(S30)，并装上盖(S40)。然后，将焊球、电容器等安装在无芯基板的背面(S50)。
下面，对无芯基板的形成方法、半导体芯片的安装方法以及密封树脂的形成方法进行详细描述。
(无芯基板的形成方法)
首先，如图4(a)及图4(b)所示，在铜基板50上涂敷保护膜52，照射激光，使保护膜52形成为具有预定开口形状的图案。接着，如图4(c)所示，以保护膜52作为掩膜，通过电解电镀法在铜基板50上形成由镍(Ni)、铅(Pb)、金(Au)或它们的合金等构成的电极垫15。
接着，如图5(a)所示，去除保护膜52之后，如图5(b)所示，在铜基板50上形成层间绝缘膜10。接着，如图5(c)所示，利用激光去除层间绝缘膜10的规定区域以形成导通孔62。需要说明的是，与钻孔加工的情况相比，利用激光加工形成各导通孔62更能降低制造成本。
接着，如图6(a)所示，通过化学镀(non-electrolytic plating)法在层间绝缘膜10的表面上、导通孔62的侧面以及底部形成由铜构成的晶种(seed)层70。在后述的铜的电解电镀时，晶种层70成为铜生长的核心。随后，如图6(b)所示，在晶种层70上涂敷保护膜72，照射激光，使其形成为具有预定开口形状的图案。
接着，如图6(c)所示，以保护膜72作为掩模，通过电解电镀法在导通孔62中埋入铜，形成插塞12，同时在层间绝缘膜10上形成配线层11。不同层间的配线层11通过插塞12电连接。接下来，如图6(d)所示，去除保护膜72之后，蚀刻去除存在于保护膜72下面的晶种层70，同时去除配线层11的最表面，以使配线层11的表面净化。
通过重复上述的图4至图6所示的步骤，可构筑图7(a)所示的多层配线结构的无芯基板。
接下来，如图7(b)所示，以保护膜(未图示)作为掩模，在层间绝缘膜10上形成阻焊层13，使最表面的配线层11露出。接着，如图7(c)所示，去除铜基板50，同时在与BGA球连接的球焊盘部7的表面覆盖有机表面保护涂料(OSP)21。
接着，如图8(a)所示，将用于倒装安装的C4凸块(bump)22焊接到电极垫15上。并且，在安装电容器的电极部分上通过焊接形成由锡(Sn)、银(Ag)、铜(Cu)或者它们的合金构成的电极垫14。接下来，如图8(b)所示，利用压力使C4凸块22平坦。另外，也可以采用机械研磨进行图8(b)所示的C4凸块的平坦化。
通过以上步骤，形成本实施例中使用的无芯基板2。此外，相对于图2所示的无芯基板而言，图8(b)所示的无芯基板被上下颠倒。
(半导体芯片的安装方法)
首先，如图9(a)所示，在使半导体芯片3的设有外部电极端子的表面朝下的状态下对各焊锡凸块32和与其对应的C4凸块22进行焊接，从而将半导体芯片3倒装安装。接着，如图9(b)所示，在半导体芯片3和无芯基板2之间填充底填料40。
通过以上步骤，从焊接部分产生的应力被底填料40分散，在这样的状态下，将半导体芯片3倒装安装到无芯基板2上。
(密封树脂形成方法)
首先，本密封树脂形成方法中使用的上模200包括流道202，该流道202作为熔融的密封树脂的流动通道。流道202具有开口部，该开口部面向上模200和下模210合模时所形成的空腔220。
在此，上模200的成型面包括：芯片接触面207，树脂成型时与半导体芯片3的背面接触；以及树脂成型面206，位于芯片接触面207的周围，用于对密封树脂层4进行成型。另外，通过树脂成型时芯片接触面207与半导体芯片3背面的接触，树脂成型时密封树脂不会流入到半导体芯片3的背面。进而，在上模200中设有与泵等抽气机构连通的抽气孔204。
另一方面，下模210具有形成为使得活塞212可往返移动的洞(pot)214。
使用这样的上模200和下模210，如图10(a)所示，将安装有半导体芯片3的无芯基板2放置在下模210上。此外，上模200和下模210之间放有离型膜230。
接着，如图10(b)所示，在洞214中投入使密封树脂固化后形成的树脂小块240。并且，开动吸气机构，排出离型膜230和上模200之间的空气，从而使离型膜230与上模200紧密接触。接下来，如图10(c)所示，将上模200和下模210合模并进行压制，在该状态下将上模200和下模210夹紧。
接着，如图11(a)所示，加热熔融树脂小块240，在该状态下将活塞212推入洞214中，从而将液体状的密封树脂241导入空腔220内。在形成于上模200和无芯基板2之间的空间被密封树脂241填充之后，加热一定时间，使密封树脂241固化。本实施例中，虽以热固化性的密封树脂为例进行了说明，但也可以采用通过冷却来固化的密封树脂。
接着，如图11(b)所示，使上模200和下模210分离，取出形成有密封树脂层4的无芯基板2。
根据上述的密封树脂形成方法，可在半导体芯片3的周围形成用于密封半导体芯片3的密封树脂层4。
并且，对密封树脂层4成型时，可以不使密封树脂241与空腔220的内表面等接触。而且，通过离型膜230可容易地使成型了密封树脂层4的无芯基板2脱模，所以无需在上模200中设置起模杆等。因此，由于简化了模具结构，所以可使半导体装置的制造成本降低，而且，由于可以使用最适合半导体装置的密封树脂材料，从而半导体装置的设计自由度得以提高。
(盖的装配方法)
首先，在半导体芯片3的背面涂敷TIM材料17，同时在密封树脂层4的表面涂敷粘合材料(密封环带材料(sealing bandmaterial))18。接下来，使在与密封树脂层4的连接面上设有凹陷16a的盖5与半导体芯片3的背面以及密封树脂层4的表面连接，从而获得如图1所示的半导体装置1。
在应用了本发明的半导体装置1中，在盖5的与密封树脂层4连接的连接面上设有多个凹陷16a，多余的密封环带材料18可被凹陷16a吸收。因此，密封环带材料18不会漏出到盖外或无芯基板外，从而能够消除因密封环带材料18的漏出所导致的不良情况。并且，由于设有凹陷16a，所以盖5与密封环带材料18的接触面积增大，从而可实现无芯基板2与盖5的牢固连接。
图12是用于说明应用了本发明的半导体装置的变形例(1)的示意图，在此所示的半导体装置1中，在盖5的与密封树脂层4的连接面上设有凹部16b。在此，凹部16b构成为从盖5的外围区域向中央区域深度逐渐加深。至于其它的结构，与上述的应用了本发明的半导体装置的一个例子相同。
在应用了本发明的半导体装置的变形例(1)中，在盖5的与密封树脂层4的连接面上设有其深度从外围区域向中央区域逐渐加深的凹部16b，多余的密封环带材料18变为向中央区域侧漏出。即、密封树脂层4和盖5之间的多余密封环带材料18朝间隙宽度大且压力不集中的中央区域侧漏出。因此，密封环带材料18不会漏出到盖外或无芯基板外，从而能够消除因密封环带材料18的漏出所导致的不良情况。
图13是用于说明应用了本发明的半导体装置的变形例(2)的示意图，在此所示的半导体装置1中，在盖5的与密封树脂层4的连接面上形成有多个通孔16c。此处的通孔16c是凹凸部的一例。至于其它的结构，与上述的应用了本发明的半导体装置的一个例子相同。
在应用了本发明的半导体装置的变形例(2)中，在盖5的与密封树脂层4的连接面上设有多个通孔16c，多余的密封环带材料18可由通孔16c吸收。因此，密封环带材料18不会漏出到盖外或无芯基板外，从而能够消除因密封环带材料18的漏出所导致的不良情况。并且，由于设有通孔16c，所以盖5与密封环带材料18的接触面积增大，从而可实现无芯基板2与盖5的牢固连接。
而且，因为通孔16c还能起到气孔的作用，所以有助于减少空气积留，可充分应对吸湿回流(absorption reflow)处理等时的爆米花现象。但是，考虑到盖5的表面通常要进行各种显示(印刷)，通孔16c可能会妨碍显示(印刷)。在这样的情况下，不设置通孔16c，而是优选如上述的应用了本发明的半导体装置那样，设置凹陷16a。
图14是用于说明应用了本发明的半导体装置的变形例(3)的示意图，在此所示的半导体装置1中，在密封树脂层4上设有突起部19。至于其它的结构，与上述的应用了本发明的半导体装置的一个例子相同。
在应用了本发明的半导体装置的变形例(3)中，由于设有突起部19，所以密封树脂层4与密封环带材料18的接触面积增大，可实现无芯基板2与盖5的牢固连接。此外，由于在上模200和下模210之间的空间中填充密封树脂241，从而对密封树脂层4进行成型，所以突起部19也能够容易地被成型。
需要强调的是，本实施例中以由树脂材料形成的加固件为例进行了说明，但加固件不必一定是由树脂材料形成，也可以采用粘合由金属材料构成的加固件而成的结构。
上述实施例中，可在所述加固件的与所述散热板连接的连接面上设有凹凸部。
附图标记
1 半导体装置  2  无芯基板
3 半导体芯片  4  密封树脂层
5 盖          6  焊球
7 球焊盘部    9  电容器
10  层间绝缘膜    10a 最下层的层间绝缘膜
11  配线层        11a 背面的配线层
12  插塞          13  阻焊层
14  电极垫        15  电极垫
16a 凹陷          16b 凹部
16c 通孔          17 TIM材料
18  密封环带材料  21 有机表面保护涂料
22C4 凸块         32 焊锡凸块
40  底填料        50 铜基板
52  保护膜        62 导通孔
70  保护层        72 保护膜
200 上模          202 流道
204 吸气孔        206 树脂成型面
207 芯片接触面    212 活塞
214 洞            220 空腔
230 离型膜        240 树脂小块
241 密封树脂

Claims (5)

1.一种半导体装置，包括：
基板；
半导体芯片，以表面朝下的状态安装到所述基板上；
加固件，设置在所述基板的半导体芯片安装区域的外围区域；以及
散热板，所述散热板通过高热传导性材料与所述半导体芯片连接，并通过粘合材料与所述加固件连接，从而被设置在所述半导体芯片和所述加固件上，并且，在所述散热板的与所述加固件连接的连接面上设有凹凸部，所述凹凸部用于吸收多余的所述粘合材料。
2.一种半导体装置，包括，
基板；
半导体芯片，以表面朝下的状态安装到所述基板上；
加固件，设置在所述基板的半导体芯片安装区域的外围区域；以及
散热板，所述散热板通过高热传导性材料与所述半导体芯片连接，并通过粘合材料与所述加固件连接，从而被设置在所述半导体芯片和所述加固件上，
在所述散热板的与所述加固件连接的连接面上设有有底的凹部，所述凹部的深度从所述散热板的外围区域向中央区域逐渐加深，所述凹部用于吸收多余的所述粘合材料。
3.根据权利要求1所述的半导体装置，其中，
在所述散热板的与所述加固件连接的连接面上设有通孔。
4.根据权利要求1～3中任一项所述的半导体装置，其中，
在所述加固件的与所述散热板连接的连接面上设有凹凸部。
5.一种半导体装置的制造方法，包括：
将表面朝下的半导体芯片倒装安装到设有配线图案的基板上的步骤；
在被倒装安装的半导体芯片的外围区域形成加固件的步骤；以及
在所述半导体芯片的背面涂敷高热传导性材料，并在所述加固件的表面涂敷粘合材料，然后将散热板连接到半导体芯片和加固件上的步骤，其中，在所述散热板的与所述加固件连接的连接面上设有凹凸部，所述凹凸部用于吸收多余的所述粘合材料。
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