CN101632166B - 柱籽晶沉积处理 - Google Patents

柱籽晶沉积处理 Download PDF

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Publication number
CN101632166B
CN101632166B CN200880004533XA CN200880004533A CN101632166B CN 101632166 B CN101632166 B CN 101632166B CN 200880004533X A CN200880004533X A CN 200880004533XA CN 200880004533 A CN200880004533 A CN 200880004533A CN 101632166 B CN101632166 B CN 101632166B
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crystal layer
resist
inculating crystal
wafer
photoresist
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Chinese (zh)
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CN101632166A (zh
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约翰·卡拉汉
约翰·特雷扎
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Cubic Wafer Inc
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Cubic Wafer Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
CN200880004533XA 2007-02-15 2008-02-14 柱籽晶沉积处理 Active CN101632166B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/675,268 US7598163B2 (en) 2007-02-15 2007-02-15 Post-seed deposition process
US11/675,268 2007-02-15
PCT/US2008/053982 WO2008101093A1 (en) 2007-02-15 2008-02-14 Post-seed deposition process

Publications (2)

Publication Number Publication Date
CN101632166A CN101632166A (zh) 2010-01-20
CN101632166B true CN101632166B (zh) 2012-11-28

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CN200880004533XA Active CN101632166B (zh) 2007-02-15 2008-02-14 柱籽晶沉积处理

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US (1) US7598163B2 (enExample)
EP (1) EP2111635A1 (enExample)
JP (1) JP5476127B2 (enExample)
KR (1) KR101118798B1 (enExample)
CN (1) CN101632166B (enExample)
WO (1) WO2008101093A1 (enExample)

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US9007273B2 (en) 2010-09-09 2015-04-14 Advances Semiconductor Engineering, Inc. Semiconductor package integrated with conformal shield and antenna
TWI434387B (zh) 2010-10-11 2014-04-11 日月光半導體製造股份有限公司 具有穿導孔之半導體裝置及具有穿導孔之半導體裝置之封裝結構及其製造方法
TWI527174B (zh) 2010-11-19 2016-03-21 日月光半導體製造股份有限公司 具有半導體元件之封裝結構
TWI445155B (zh) 2011-01-06 2014-07-11 日月光半導體製造股份有限公司 堆疊式封裝結構及其製造方法
US8853819B2 (en) 2011-01-07 2014-10-07 Advanced Semiconductor Engineering, Inc. Semiconductor structure with passive element network and manufacturing method thereof
US8541883B2 (en) 2011-11-29 2013-09-24 Advanced Semiconductor Engineering, Inc. Semiconductor device having shielded conductive vias
US8975157B2 (en) 2012-02-08 2015-03-10 Advanced Semiconductor Engineering, Inc. Carrier bonding and detaching processes for a semiconductor wafer
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US8786060B2 (en) 2012-05-04 2014-07-22 Advanced Semiconductor Engineering, Inc. Semiconductor package integrated with conformal shield and antenna
US9153542B2 (en) 2012-08-01 2015-10-06 Advanced Semiconductor Engineering, Inc. Semiconductor package having an antenna and manufacturing method thereof
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US8952542B2 (en) 2012-11-14 2015-02-10 Advanced Semiconductor Engineering, Inc. Method for dicing a semiconductor wafer having through silicon vias and resultant structures
US9406552B2 (en) 2012-12-20 2016-08-02 Advanced Semiconductor Engineering, Inc. Semiconductor device having conductive via and manufacturing process
KR101441632B1 (ko) * 2012-12-28 2014-09-23 (재)한국나노기술원 글라스 기반 프로브 카드용 스페이스 트랜스포머의 제조방법 및 이에 의해 제조된 글라스 기반 프로브 카드용 스페이스 트랜스포머
US8841751B2 (en) 2013-01-23 2014-09-23 Advanced Semiconductor Engineering, Inc. Through silicon vias for semiconductor devices and manufacturing method thereof
US9978688B2 (en) 2013-02-28 2018-05-22 Advanced Semiconductor Engineering, Inc. Semiconductor package having a waveguide antenna and manufacturing method thereof
US9089268B2 (en) 2013-03-13 2015-07-28 Advanced Semiconductor Engineering, Inc. Neural sensing device and method for making the same
US9173583B2 (en) 2013-03-15 2015-11-03 Advanced Semiconductor Engineering, Inc. Neural sensing device and method for making the same
US8987734B2 (en) 2013-03-15 2015-03-24 Advanced Semiconductor Engineering, Inc. Semiconductor wafer, semiconductor process and semiconductor package
US11758666B2 (en) * 2020-09-14 2023-09-12 Innolux Corporation Manufacturing method of metal structure
US20230096301A1 (en) * 2021-09-29 2023-03-30 Catlam, Llc. Circuit Board Traces in Channels using Electroless and Electroplated Depositions

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Also Published As

Publication number Publication date
WO2008101093A1 (en) 2008-08-21
WO2008101093B1 (en) 2008-10-30
KR20090115203A (ko) 2009-11-04
JP5476127B2 (ja) 2014-04-23
CN101632166A (zh) 2010-01-20
US7598163B2 (en) 2009-10-06
JP2010519738A (ja) 2010-06-03
US20080200022A1 (en) 2008-08-21
EP2111635A1 (en) 2009-10-28
KR101118798B1 (ko) 2012-03-21

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