KR101118798B1 - 포스트-시드 증착 공정 - Google Patents

포스트-시드 증착 공정 Download PDF

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Publication number
KR101118798B1
KR101118798B1 KR1020097018804A KR20097018804A KR101118798B1 KR 101118798 B1 KR101118798 B1 KR 101118798B1 KR 1020097018804 A KR1020097018804 A KR 1020097018804A KR 20097018804 A KR20097018804 A KR 20097018804A KR 101118798 B1 KR101118798 B1 KR 101118798B1
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seed layer
portions
resist
photoresist
exposed
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KR20090115203A (ko
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존 캘러한
존 트레자
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쿠퍼 에셋 엘티디. 엘.엘.씨.
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0238—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes through pads or through electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
KR1020097018804A 2007-02-15 2008-02-14 포스트-시드 증착 공정 Active KR101118798B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/675,268 US7598163B2 (en) 2007-02-15 2007-02-15 Post-seed deposition process
US11/675,268 2007-02-15
PCT/US2008/053982 WO2008101093A1 (en) 2007-02-15 2008-02-14 Post-seed deposition process

Publications (2)

Publication Number Publication Date
KR20090115203A KR20090115203A (ko) 2009-11-04
KR101118798B1 true KR101118798B1 (ko) 2012-03-21

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US (1) US7598163B2 (enExample)
EP (1) EP2111635A1 (enExample)
JP (1) JP5476127B2 (enExample)
KR (1) KR101118798B1 (enExample)
CN (1) CN101632166B (enExample)
WO (1) WO2008101093A1 (enExample)

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TWI446420B (zh) 2010-08-27 2014-07-21 日月光半導體製造股份有限公司 用於半導體製程之載體分離方法
TWI445152B (zh) 2010-08-30 2014-07-11 日月光半導體製造股份有限公司 半導體結構及其製作方法
US9007273B2 (en) 2010-09-09 2015-04-14 Advances Semiconductor Engineering, Inc. Semiconductor package integrated with conformal shield and antenna
TWI434387B (zh) 2010-10-11 2014-04-11 日月光半導體製造股份有限公司 具有穿導孔之半導體裝置及具有穿導孔之半導體裝置之封裝結構及其製造方法
TWI527174B (zh) 2010-11-19 2016-03-21 日月光半導體製造股份有限公司 具有半導體元件之封裝結構
TWI445155B (zh) 2011-01-06 2014-07-11 日月光半導體製造股份有限公司 堆疊式封裝結構及其製造方法
US8853819B2 (en) 2011-01-07 2014-10-07 Advanced Semiconductor Engineering, Inc. Semiconductor structure with passive element network and manufacturing method thereof
US8541883B2 (en) 2011-11-29 2013-09-24 Advanced Semiconductor Engineering, Inc. Semiconductor device having shielded conductive vias
US8975157B2 (en) 2012-02-08 2015-03-10 Advanced Semiconductor Engineering, Inc. Carrier bonding and detaching processes for a semiconductor wafer
US8963316B2 (en) 2012-02-15 2015-02-24 Advanced Semiconductor Engineering, Inc. Semiconductor device and method for manufacturing the same
US8786060B2 (en) 2012-05-04 2014-07-22 Advanced Semiconductor Engineering, Inc. Semiconductor package integrated with conformal shield and antenna
US9153542B2 (en) 2012-08-01 2015-10-06 Advanced Semiconductor Engineering, Inc. Semiconductor package having an antenna and manufacturing method thereof
US8937387B2 (en) 2012-11-07 2015-01-20 Advanced Semiconductor Engineering, Inc. Semiconductor device with conductive vias
US8952542B2 (en) 2012-11-14 2015-02-10 Advanced Semiconductor Engineering, Inc. Method for dicing a semiconductor wafer having through silicon vias and resultant structures
US9406552B2 (en) 2012-12-20 2016-08-02 Advanced Semiconductor Engineering, Inc. Semiconductor device having conductive via and manufacturing process
KR101441632B1 (ko) * 2012-12-28 2014-09-23 (재)한국나노기술원 글라스 기반 프로브 카드용 스페이스 트랜스포머의 제조방법 및 이에 의해 제조된 글라스 기반 프로브 카드용 스페이스 트랜스포머
US8841751B2 (en) 2013-01-23 2014-09-23 Advanced Semiconductor Engineering, Inc. Through silicon vias for semiconductor devices and manufacturing method thereof
US9978688B2 (en) 2013-02-28 2018-05-22 Advanced Semiconductor Engineering, Inc. Semiconductor package having a waveguide antenna and manufacturing method thereof
US9089268B2 (en) 2013-03-13 2015-07-28 Advanced Semiconductor Engineering, Inc. Neural sensing device and method for making the same
US8987734B2 (en) 2013-03-15 2015-03-24 Advanced Semiconductor Engineering, Inc. Semiconductor wafer, semiconductor process and semiconductor package
US9173583B2 (en) 2013-03-15 2015-11-03 Advanced Semiconductor Engineering, Inc. Neural sensing device and method for making the same
US11758666B2 (en) * 2020-09-14 2023-09-12 Innolux Corporation Manufacturing method of metal structure
US20230096301A1 (en) * 2021-09-29 2023-03-30 Catlam, Llc. Circuit Board Traces in Channels using Electroless and Electroplated Depositions

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US20060281363A1 (en) * 2005-06-14 2006-12-14 John Trezza Remote chip attachment

Also Published As

Publication number Publication date
EP2111635A1 (en) 2009-10-28
CN101632166B (zh) 2012-11-28
WO2008101093B1 (en) 2008-10-30
US7598163B2 (en) 2009-10-06
WO2008101093A1 (en) 2008-08-21
CN101632166A (zh) 2010-01-20
US20080200022A1 (en) 2008-08-21
JP5476127B2 (ja) 2014-04-23
KR20090115203A (ko) 2009-11-04
JP2010519738A (ja) 2010-06-03

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